Initial cut of the open ath9k htc firmware.
[open-ath9k-htc-firmware.git] / target_firmware / magpie_fw_dev / target / inc / k2 / k2_mem.h
1 /*************************************************************************/
2 /*  Copyright (c) 2006 Atheros Communications, Inc., All Rights Reserved */
3 /*                                                                       */
4 /*  Module Name : mem_addrs.h                                            */
5 /*                                                                       */
6 /*  Abstract                                                             */
7 /*      This file contains definition of the memory related information. */
8 /*                                                                       */
9 /*  NOTES                                                                */
10 /*      None                                                             */
11 /*                                                                       */
12 /*************************************************************************/
13
14 #ifndef _MEM_ADDRS_H_
15 #define _MEM_ADDRS_H_
16
17 #define SYS_ROM_BLOCK_SIZE              (24*1024)
18 #define SYS_ROM_BLOCK_NUM               1
19 #define SYS_ROM_SIZE                    (SYS_ROM_BLOCK_SIZE*SYS_ROM_BLOCK_NUM)
20
21 #define SYS_RAM_BLOCK_SIZE              (40*1024)
22
23 #define SYS_RAM_BLOCK_NUM               4
24 #define SYS_RAM_SZIE                    (SYS_RAM_BLOCK_SIZE*SYS_RAM_BLOCK_NUM)
25
26 /* instruction port area */
27 #define SYS_I_R0M_REGION_0_BASE         0x8e0000
28                                         
29 #define SYS_I_RAM_REGION_0_BASE         0x900000
30 #define SYS_I_RAM_REGION_1_BASE         (SYS_I_RAM_REGION_0_BASE+SYS_RAM_BLOCK_SIZE)
31 #define SYS_I_RAM_REGION_2_BASE         (SYS_I_RAM_REGION_1_BASE+SYS_RAM_BLOCK_SIZE)
32 #define SYS_I_RAM_REGION_3_BASE         (SYS_I_RAM_REGION_2_BASE+SYS_RAM_BLOCK_SIZE)
33                                         
34 /* data port area */                    
35 #define SYS_D_R0M_REGION_0_BASE         0x4e0000
36                                         
37 #define SYS_D_RAM_REGION_0_BASE         0x500000
38 #define SYS_D_RAM_REGION_1_BASE         (SYS_D_RAM_REGION_0_BASE+SYS_RAM_BLOCK_SIZE)
39 #define SYS_D_RAM_REGION_2_BASE         (SYS_D_RAM_REGION_1_BASE+SYS_RAM_BLOCK_SIZE)
40 #define SYS_D_RAM_REGION_3_BASE         (SYS_D_RAM_REGION_2_BASE+SYS_RAM_BLOCK_SIZE)
41
42 /* data and bss section */
43
44 #define SYS_D_RAM_DATA_BSS              SYS_D_RAM_REGION_0_BASE
45 #define SYS_D_RAM_DATA_BSS_SZ           SYS_RAM_BLOCK_SIZE
46 #define SYS_D_RAM_STACK_SIZE                (2*1024)
47 #define SYS_D_RAM_USB_DESC_BUFFER       (SYS_D_RAM_DATA_BSS+SYS_RAM_BLOCK_SIZE)
48
49 #define SYS_D_RAM_PCIE_DESC_BUFFER      (SYS_D_RAM_REGION_3_BASE)
50 #define SPI_FLASH_BASE  0x0F000000
51 #define SPI_FLASH_MAX_ADDR      0x0FFFFFFF
52 #define SPI_FLASH_MAX_SIZE      0x01000000
53 /////////////////////////////////////////////////////////////////////////////////////
54 #define EEPROM_CTRL_BASE                    0x10000000
55 #define EEPROM_ADDR_BASE                    (EEPROM_CTRL_BASE+0x2000)
56
57 #define EEPROM_SIZE                         0x1000  // 4K addressing space, each has 2 bytes, (a half word)
58 #define EEPROM_START_OFFSET                 0       // THIS SHOULD NOT MODIFY
59 #define EEPROM_END_OFFSET                   (EEPROM_START_OFFSET+EEPROM_SIZE-1)   // end of the eeprom offset
60
61 /////////////////////////////////////////////////////////////////////////////////////
62 #define EEPROM_USB_DESCRIPTOR_ADDR          ((uint32_t)&_bss_end)  // address at RAM to put descriptor data
63 #define USB_DESC_START_ADDR                 0x4
64 #define USB_DESCRIPTOR_ADDR                 USB_DESC_START_ADDR     // eeprom offset to sotre the descriptor data
65
66 #define USB_DESC_IN_EEPROM_SIZE             2                       // indicate eeprom is exist in eeprom
67 #define USB_DEVICE_DESCRIPTOR_SIZE          16                      // Device Descriptor
68 #define USB_STRING00_DESCRIPTOR_SIZE        6                       // 16 half word
69 #define USB_STRING10_DESCRIPTOR_SIZE        12                      // Manufacture data
70 #define USB_STRING20_DESCRIPTOR_SIZE        16                      // Product/Company data
71 #define USB_STRING30_DESCRIPTOR_SIZE        8                       // Serial Number
72
73 #define USB_DEVICE_PID_SIZE                 1                       // PID SIZE, 1 halfword offset
74 #define USB_DEVICE_VID_SIZE                 1                       // VID SIZE, 1 halfword offset
75     
76 #define USB_DESC_IN_EEPROM_FLAG_OFFSET      USB_DESCRIPTOR_ADDR
77 #define USB_DEVICE_DESCRIPTOR_OFFSET        (USB_DESC_IN_EEPROM_FLAG_OFFSET+USB_DESC_IN_EEPROM_SIZE)
78 #define USB_STRING00_DESCRIPTOR_OFFSET      (USB_DEVICE_DESCRIPTOR_OFFSET+USB_DEVICE_DESCRIPTOR_SIZE)
79 #define USB_STRING10_DESCRIPTOR_OFFSET      (USB_STRING00_DESCRIPTOR_OFFSET+USB_STRING00_DESCRIPTOR_SIZE)
80 #define USB_STRING20_DESCRIPTOR_OFFSET      (USB_STRING10_DESCRIPTOR_OFFSET+USB_STRING10_DESCRIPTOR_SIZE)
81 #define USB_STRING30_DESCRIPTOR_OFFSET      (USB_STRING20_DESCRIPTOR_OFFSET+USB_STRING20_DESCRIPTOR_SIZE)
82
83 #define USB_DEVICE_VID_OFFSET               (USB_DEVICE_DESCRIPTOR_OFFSET+4)
84 #define USB_DEVICE_PID_OFFSET               (USB_DEVICE_VID_OFFSET+USB_DEVICE_VID_SIZE)
85
86 #define USB_DESC_IN_EEPROM_FLAG_ADDR        EEPROM_USB_DESCRIPTOR_ADDR
87 #define USB_DEVICE_DESCRIPTOR_ADDR          (USB_DESC_IN_EEPROM_FLAG_ADDR+(USB_DESC_IN_EEPROM_SIZE*2))
88 #define USB_STRING00_DESCRIPTOR_ADDR        (USB_DEVICE_DESCRIPTOR_ADDR+(USB_DEVICE_DESCRIPTOR_SIZE*2))
89 #define USB_STRING10_DESCRIPTOR_ADDR        (USB_STRING00_DESCRIPTOR_ADDR+(USB_STRING00_DESCRIPTOR_SIZE*2))
90 #define USB_STRING20_DESCRIPTOR_ADDR        (USB_STRING10_DESCRIPTOR_ADDR+(USB_STRING10_DESCRIPTOR_SIZE*2))
91 #define USB_STRING30_DESCRIPTOR_ADDR        (USB_STRING20_DESCRIPTOR_ADDR+(USB_STRING20_DESCRIPTOR_SIZE*2))
92
93 #define USB_DEVICE_VID_ADDR                 (USB_DEVICE_DESCRIPTOR_ADDR+4)
94 #define USB_DEVICE_PID_ADDR                 (USB_DEVICE_VID_ADDR+USB_DEVICE_VID_SIZE)
95
96 #define USB_DESC_IN_EEP_PATTERN             0x41544852  //ATHR
97
98 /****************************** patch in eeprom *****************************************/
99 #define ROM_PATCH_EEPROM_SIZE                   2                       // 4 bytes
100
101 #define ROM_PATCH_EEPROM_OFFSET         0x3E
102 #define ROM_PATCH_BUF_ADDR              SYS_D_RAM_REGION_3_BASE
103
104 #endif /* _MEM_ADDRS_H_ */