Initial cut of the open ath9k htc firmware.
authorAdrian Chadd <adrian@freebsd.org>
Fri, 8 Mar 2013 22:45:06 +0000 (14:45 -0800)
committerAdrian Chadd <adrian@freebsd.org>
Fri, 8 Mar 2013 22:45:06 +0000 (14:45 -0800)
500 files changed:
LICENCE.TXT [new file with mode: 0644]
Makefile [new file with mode: 0644]
NOTICE.TXT [new file with mode: 0644]
build [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/include/xtensa/config/core-isa.h [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/include/xtensa/config/core-matmap.h [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/include/xtensa/config/specreg.h [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/include/xtensa/config/tie.h [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/builds_fusion_vista.ram [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/rom.addrs.ld [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/target.ram.ld [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/target.ram_debug.ld [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/lib/ram/dummy.txt [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/adf/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/adf/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/buf_pool/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/buf_pool/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/carrier_apd/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/carrier_apd/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/cmnos/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/cmnos/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/hif/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/hif/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/htc/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/htc/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/init/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/init/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/wlan/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/wlan/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/wmi/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/ram/wmi/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/merlin_fusion.ram [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/target.ram.ld [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/target_gmac.ram.ld [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.addrs.ld [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.bin [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.hex [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.map [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.objdump [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.out [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/fpga/rom.fpga.addrs.ld [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/fpga/rom.fpga.bin [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/fpga/rom.fpga.hex [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/fpga/rom.fpga.map [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/fpga/rom.fpga.objdump [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/fpga/rom.fpga.out [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/Magpie_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/adf_nbuf_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/allocram_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/athos_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/buf_pool_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/clock_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/cmnos_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/dma_engine_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/dma_lib.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/eeprom_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/hif_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/hif_gmac.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/hif_pci.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/hif_usb.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/htc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/intr_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/magpie/reg_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/magpie/rom_cfg.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/magpie_mem.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/magpie_regdump.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/mem_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/misc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/opt_ah.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/printf_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/regdump.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/romp_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/string_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/sys_cfg.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/tasklet_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/timer_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/uart_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_extr.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_pre.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_std.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_table.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_type.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usbfifo_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/vbuf_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/vdesc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/inc/wdt_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/lib/ram/dummy.txt [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/lib/rom/dummy.txt [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/lib/sboot/dummy.txt [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/adf/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/adf/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/carrier_apd/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/carrier_apd/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/cmnos/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/cmnos/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/init/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/init/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/rompatch/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/rompatch/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/wlan/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/wlan/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/wmi/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/ram/wmi/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/adf/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/adf/nbuf/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/adf/nbuf/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/adf/nbuf/inc/adf_nbuf_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/_vectors.o [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/athos_main.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/crt1-tiny.o [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/libhandlers-board.a [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/Makefile.src [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/_sharedvectors-for-reset.S [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/_sharedvectors.S [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/_vectors.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/checkvecsize [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/crt0-app.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/crt1-boards.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/crt1-sim.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/crt1-tiny.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/debug-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/deprecated.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/double-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-alloca-handler.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-c-wrapper-handler.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-return.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-sethandler.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-syscall-c-handler.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-syscall-handler.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-table.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exc-unhandled.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/exit.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/init.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-handler.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-highpri-dispatcher.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-highpri-template.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-initlevel.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-lowpri-dispatcher.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-medpri-dispatcher.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-sethandler.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/int-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/interrupt-pri.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/interrupt-table.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/intlevel-restore.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/intlevel-set.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/intlevel-setmin.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/ints-off.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/ints-on.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/kernel-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/memep-enable.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/memep-initrams.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/memerror-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/nmi-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/null-alloca.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/null-syscall.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/null-vectors.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/reloc-vectors.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/reset-unneeded.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/reset-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/shared-reset-vector.S [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/switch_context.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/textaddr [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/tiny-refs-min.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/tiny-refs.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/user-vector-min.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/user-vector.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/window-vectors.S [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/xtos-internal.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/athos/src/xtos/xtos-params.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/buf_pool/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/buf_pool/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/buf_pool/inc/buf_pool_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/buf_pool/src/buf_pool_static.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/buf_pool/src/buf_pool_static.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/allocram/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/allocram/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/allocram/inc/allocram_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/allocram/src/cmnos_allocram.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/clock/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/clock/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/clock/inc/clock_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/clock/src/cmnos_clock.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/eeprom/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/eeprom/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/eeprom/inc/eeprom_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/eeprom/src/cmnos_eeprom.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/inc/cmnos_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/intr/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/intr/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/intr/inc/intr_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/intr/src/cmnos_intr.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/mem/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/mem/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/mem/inc/mem_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/mem/src/cmnos_mem.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/misc/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/misc/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/misc/inc/misc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/misc/src/cmnos_misc.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/printf/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/printf/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/printf/inc/printf_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/printf/src/cmnos_printf.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/rompatch/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/rompatch/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/rompatch/inc/romp_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/rompatch/src/cmnos_rompatch.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/sflash/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/sflash/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/sflash/inc/sflash_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/sflash/src/cmnos_sflash.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/string/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/string/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/string/inc/string_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/string/src/cmnos_string.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/tasklet/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/tasklet/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/tasklet/inc/tasklet_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/tasklet/src/cmnos_tasklet.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/timer/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/timer/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/timer/inc/timer_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/timer/src/cmnos_timer.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/uart/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/uart/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/uart/inc/uart_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/uart/src/uart_api.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/wdt/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/wdt/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/wdt/inc/wdt_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/wdt/src/cmnos_wdt.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/dma_engine/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/dma_engine/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/dma_engine/inc/dma_engine_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/dma_engine/src/desc.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/dma_engine/src/desc.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/dma_engine/src/dma_engine.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/fwd/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/fwd/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/fwd/fwd.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/fwd/fwd.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/dma_lib/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/dma_lib/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/dma_lib/dma_lib.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/gmac/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/gmac/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/gmac/hif_gmac.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/inc/dma_lib.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/inc/hif_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/inc/hif_gmac.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/inc/hif_pci.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/inc/hif_usb.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/inc/usb_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/inc/usbfifo_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/pci/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/pci/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/pci/hif_pci.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/HIF_usb.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_api.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_extr.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_fifo.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_pre.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_std.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_table.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_table.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_type.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/htc/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/htc/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/htc/inc/htc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/htc/src/htc.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/htc/src/htc_internal.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/Magpie_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/athos_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/magpie/reg_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/magpie/rom_cfg.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/magpie_mem.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/magpie_regdump.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/opt_ah.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/regdump.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/inc/sys_cfg.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vbuf/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vbuf/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vbuf/inc/vbuf_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vbuf/src/vbuf.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vbuf/src/vbuf.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vdesc/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vdesc/Makefile.ss [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vdesc/inc/vdesc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vdesc/src/vdesc.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/vdesc/src/vdesc.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/make_opt/Makefile.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/make_opt/Rules.make [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/make_opt/RulesCPP.make [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/make_opt/lib/_vectors.o [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/make_opt/lib/crt1-tiny.o [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/make_opt/lib/libhandlers-board.a [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/adjust_dep/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/adjust_dep/adj_dep.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/adjust_time/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/adjust_time/adj_time.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/athfw2lnx/Makefile [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/utility/athfw2lnx/athfw2lnx.c [new file with mode: 0644]
target_firmware/magpie_fw_dev/build/utility/bin/adj_dep [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin/adj_time [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin/imghdr [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin/patch_gen [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin2hex.pl [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin2hex/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin2hex/bin2hex [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin2hex/bin2hex.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/bin2hex/bin2hex_swp.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/imghdr/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/imghdr/imghdr.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/patch_gen/Makefile [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/patch_gen/dt_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/patch_gen/main.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/patch_gen/patch.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/patch_gen/patch.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/sh/make_fw.sh [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/utility/sh/make_ld.sh [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_nbuf.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_nbuf_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_net.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_net_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_atomic_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_defer_pvt.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_defer_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_dma.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_dma_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_io_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_irq_pvt.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_irq_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_lock_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_mem_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_module_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_pci_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_time_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_timer.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_timer_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_types_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/adf/adf_os_util_pvt.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/buf_pool/buf_pool_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/buf_pool/buf_pool_dynamic.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/buf_pool/buf_pool_static.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/buf_pool/buf_pool_static.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/clock_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/cmnos_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/cmnos_clock.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/cmnos_printf.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/cmnos_sflash.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/dbg_api.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/dbg_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/k2_cmnos_clock_patch.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/k2_fw_cmnos_printf.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/printf_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/cmnos/sflash_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/hif/k2_HIF_usb_patch.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/hif/k2_fw_usb_api.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/htc/htc.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/htc/htc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/htc/htc_internal.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/htc/htc_tgt.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/OTUS/OTUS_htc.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/OTUS/OTUS_misc.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/OTUS/OTUS_soc.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_nbuf.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_net.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_net_sw.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_net_types.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_net_wcmd.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_atomic.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_bitops.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_crypto.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_defer.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_dma.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_io.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_irq.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_lock.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_mem.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_module.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_pci.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_pseudo.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_stdtypes.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_time.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_timer.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_types.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/adf_os_util.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/asf_bitmap.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/asf_queue.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/asf_sm.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/dt_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/Magpie_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/allocram_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/athos_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/clock_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/cmnos_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/dma_engine_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/dma_lib.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/eeprom_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/hif_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/hif_gmac.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/hif_pci.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/hif_usb.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/intr_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/k2/reg_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/k2/rom_cfg.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/k2_mem.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/magpie_mem.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/magpie_regdump.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/mem_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/misc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/opt_ah.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/printf_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/regdump.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/romp_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/string_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/sys_cfg.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/tasklet_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/timer_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/uart_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usb_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usb_defs.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usb_extr.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usb_pre.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usb_std.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usb_table.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usb_type.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/usbfifo_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/vbuf_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/vdesc_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/k2/wdt_api.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/inc/osapi.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/init/app_start.c [new file with mode: 0644]
target_firmware/magpie_fw_dev/target/init/init.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/init/init.h [new file with mode: 0644]
target_firmware/magpie_fw_dev/target/init/magpie.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/rompatch/HIF_usb_patch.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/rompatch/cmnos_clock_patch.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/rompatch/usb_api_patch.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/wlan/wlan_pci.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/wlan/wlan_pci.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/wmi/wmi_internal.h [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/wmi/wmi_svc.c [new file with mode: 0755]
target_firmware/magpie_fw_dev/target/wmi/wmi_svc_api.h [new file with mode: 0755]
target_firmware/wlan/_ieee80211.h [new file with mode: 0755]
target_firmware/wlan/ah.c [new file with mode: 0755]
target_firmware/wlan/ah.h [new file with mode: 0755]
target_firmware/wlan/ah_desc.h [new file with mode: 0755]
target_firmware/wlan/ah_internal.h [new file with mode: 0755]
target_firmware/wlan/ah_osdep.c [new file with mode: 0755]
target_firmware/wlan/ah_osdep.h [new file with mode: 0755]
target_firmware/wlan/ar5416.h [new file with mode: 0755]
target_firmware/wlan/ar5416Phy.c [new file with mode: 0755]
target_firmware/wlan/ar5416_hw.c [new file with mode: 0644]
target_firmware/wlan/ar5416_phy.c [new file with mode: 0755]
target_firmware/wlan/ar5416desc.h [new file with mode: 0755]
target_firmware/wlan/ar5416phy.h [new file with mode: 0755]
target_firmware/wlan/ar5416reg.h [new file with mode: 0755]
target_firmware/wlan/ieee80211.h [new file with mode: 0755]
target_firmware/wlan/ieee80211_linux.h [new file with mode: 0755]
target_firmware/wlan/ieee80211_node.h [new file with mode: 0755]
target_firmware/wlan/ieee80211_output.c [new file with mode: 0755]
target_firmware/wlan/ieee80211_proto.h [new file with mode: 0755]
target_firmware/wlan/ieee80211_var.h [new file with mode: 0755]
target_firmware/wlan/if_ath.c [new file with mode: 0755]
target_firmware/wlan/if_ath_pci.c [new file with mode: 0755]
target_firmware/wlan/if_ath_pci.h [new file with mode: 0755]
target_firmware/wlan/if_athrate.h [new file with mode: 0755]
target_firmware/wlan/if_athvar.h [new file with mode: 0755]
target_firmware/wlan/if_ethersubr.h [new file with mode: 0755]
target_firmware/wlan/if_llc.h [new file with mode: 0755]
target_firmware/wlan/if_owl.c [new file with mode: 0755]
target_firmware/wlan/include/athdefs.h [new file with mode: 0755]
target_firmware/wlan/include/htc.h [new file with mode: 0755]
target_firmware/wlan/include/htc_services.h [new file with mode: 0755]
target_firmware/wlan/include/k2/wlan_cfg.h [new file with mode: 0755]
target_firmware/wlan/include/magpie/wlan_cfg.h [new file with mode: 0755]
target_firmware/wlan/include/wlan_hdr.h [new file with mode: 0755]
target_firmware/wlan/include/wmi.h [new file with mode: 0755]
target_firmware/wlan/queue.h [new file with mode: 0755]
target_firmware/wlan/ratectrl.h [new file with mode: 0755]
target_firmware/wlan/ratectrl11n.h [new file with mode: 0755]
target_firmware/wlan/ratectrl_11n_ln.c [new file with mode: 0755]
toolchain/inst/xtensa-elf/include/xtensa/config/core.h [new file with mode: 0644]
toolchain/inst/xtensa-elf/include/xtensa/corebits.h [new file with mode: 0644]
toolchain/inst/xtensa-elf/include/xtensa/hal.h [new file with mode: 0644]
toolchain/inst/xtensa-elf/include/xtensa/xtruntime.h [new file with mode: 0644]

diff --git a/LICENCE.TXT b/LICENCE.TXT
new file mode 100644 (file)
index 0000000..ee2738e
--- /dev/null
@@ -0,0 +1,21 @@
+Files with a Qualcomm Atheros / Atheros licence fall under the following
+licence.  Please see NOTICES.TXT for information about other files in this
+repository.
+
+----
+
+Copyright (c) 2013 Qualcomm Atheros, Inc.
+
+Permission to use, copy, modify, and/or distribute this software for any
+purpose with or without fee is hereby granted, provided that the above
+copyright notice and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
+REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
+INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
+LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+PERFORMANCE OF THIS SOFTWARE.
+
+----
diff --git a/Makefile b/Makefile
new file mode 100644 (file)
index 0000000..81f4500
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,89 @@
+GMP_VER=5.0.5
+GMP_URL=http://ftp.gnu.org/gnu/gmp/gmp-$(GMP_VER).tar.bz2
+GMP_TAR=gmp-$(GMP_VER).tar.bz2
+
+MPFR_VER=3.1.1
+MPFR_URL=http://ftp.gnu.org/gnu/mpfr/mpfr-$(MPFR_VER).tar.bz2
+MPFR_TAR=mpfr-$(MPFR_VER).tar.bz2
+
+MPC_VER=1.0.1
+MPC_URL=http://ftp.gnu.org/gnu/mpc/mpc-$(MPC_VER).tar.gz
+MPC_TAR=mpc-$(MPC_VER).tar.gz
+
+BINUTILS_VER=2.23.1
+BINUTILS_URL=http://ftp.gnu.org/gnu/binutils/binutils-$(BINUTILS_VER).tar.bz2
+BINUTILS_TAR=binutils-$(BINUTILS_VER).tar.bz2
+
+GCC_VER=4.7.2
+GCC_URL=http://ftp.gnu.org/gnu/gcc/gcc-$(GCC_VER)/gcc-$(GCC_VER).tar.bz2
+GCC_TAR=gcc-$(GCC_VER).tar.bz2
+
+BASEDIR=$(shell pwd)
+TOOLCHAIN_DIR=$(BASEDIR)/toolchain
+TARGET=xtensa-elf
+
+all: toolchain
+
+gmp-$(GMP_VER):
+       wget -N -P $(TOOLCHAIN_DIR)/dl $(GMP_URL)
+       tar -C $(TOOLCHAIN_DIR)/dl -xjf $(TOOLCHAIN_DIR)/dl/$(GMP_TAR)
+
+gmp: gmp-$(GMP_VER)
+       mkdir -p $(TOOLCHAIN_DIR)/build/gmp
+       cd $(TOOLCHAIN_DIR)/build/gmp; \
+       $(TOOLCHAIN_DIR)/dl/$</configure --disable-shared --enable-static --prefix=$(TOOLCHAIN_DIR)/inst; \
+       $(MAKE); $(MAKE) check;$(MAKE) install
+
+mpfr-$(MPFR_VER):
+       wget -N -P $(TOOLCHAIN_DIR)/dl $(MPFR_URL)
+       tar -C $(TOOLCHAIN_DIR)/dl -xjf $(TOOLCHAIN_DIR)/dl/$(MPFR_TAR)
+
+mpfr: mpfr-$(MPFR_VER)
+       mkdir -p $(TOOLCHAIN_DIR)/build/mpfr
+       cd $(TOOLCHAIN_DIR)/build/mpfr; \
+       $(TOOLCHAIN_DIR)/dl/$</configure --disable-shared --enable-static --with-gmp=$(TOOLCHAIN_DIR)/inst \
+       --prefix=$(TOOLCHAIN_DIR)/inst; \
+       $(MAKE); $(MAKE) check;$(MAKE) install
+
+mpc-$(MPC_VER):
+       wget -N -P $(TOOLCHAIN_DIR)/dl $(MPC_URL)
+       tar -C $(TOOLCHAIN_DIR)/dl -zxvf $(TOOLCHAIN_DIR)/dl/$(MPC_TAR)
+
+mpc: mpc-$(MPC_VER)
+       mkdir -p $(TOOLCHAIN_DIR)/build/mpfc
+       cd $(TOOLCHAIN_DIR)/build/mpfc; \
+       $(TOOLCHAIN_DIR)/dl/$</configure --disable-shared --enable-static --with-gmp=$(TOOLCHAIN_DIR)/inst \
+       --with-mpfr=$(TOOLCHAIN_DIR)/inst --prefix=$(TOOLCHAIN_DIR)/inst; \
+       $(MAKE); $(MAKE) check;$(MAKE) install
+
+binutils-$(BINUTILS_VER):
+       wget -N -P $(TOOLCHAIN_DIR)/dl $(BINUTILS_URL)
+       tar -C $(TOOLCHAIN_DIR)/dl -xjf $(TOOLCHAIN_DIR)/dl/$(BINUTILS_TAR)
+       patch -d $(TOOLCHAIN_DIR)/dl/$@ -p1 < local/patches/binutils.patch
+
+binutils: binutils-$(BINUTILS_VER)
+       mkdir -p $(TOOLCHAIN_DIR)/build/binutils
+       cd $(TOOLCHAIN_DIR)/build/binutils; \
+       $(TOOLCHAIN_DIR)/dl/$</configure --target=$(TARGET) --prefix=$(TOOLCHAIN_DIR)/inst; \
+       $(MAKE) all; $(MAKE) install
+
+gcc-$(GCC_VER):
+       wget -N -P $(TOOLCHAIN_DIR)/dl $(GCC_URL)
+       tar -C $(TOOLCHAIN_DIR)/dl -xjf $(TOOLCHAIN_DIR)/dl/$(GCC_TAR)
+       patch -d $(TOOLCHAIN_DIR)/dl/$@ -p1 < local/patches/gcc.patch
+
+gcc: gcc-$(GCC_VER)
+       mkdir -p $(TOOLCHAIN_DIR)/build/gcc
+       cd $(TOOLCHAIN_DIR)/build/gcc; \
+       export PATH=$(TOOLCHAIN_DIR)/inst/bin:$(PATH); \
+       $(TOOLCHAIN_DIR)/dl/$</configure --target=$(TARGET) --prefix=$(TOOLCHAIN_DIR)/inst \
+       --enable-languages=c --disable-libssp --disable-shared --disable-libquadmath \
+       --with-gmp=$(TOOLCHAIN_DIR)/inst \
+       --with-mpfr=$(TOOLCHAIN_DIR)/inst \
+       --with-mpc=$(TOOLCHAIN_DIR)/inst --with-newlib; \
+       $(MAKE) all; $(MAKE) install
+
+toolchain: gmp mpfr mpc binutils gcc
+
+clean:
+       rm -rf $(TOOLCHAIN_DIR)/build $(TOOLCHAIN_DIR)/inst
diff --git a/NOTICE.TXT b/NOTICE.TXT
new file mode 100644 (file)
index 0000000..0e74083
--- /dev/null
@@ -0,0 +1,149 @@
+This NOTICE.TXT file contains certain notices of software components included
+with the software that QUALCOMM ATHEROS Incorporated ('Qualcomm Atheros') is
+required to provide you. Notwithstanding anything in the notices in this file,
+your use of these software components together with the Qualcomm Atheros
+software (Qualcomm Atheros software hereinafter referred to as 'Software') is
+subject to the terms of your license from Qualcomm Atheros.  Compliance with
+all copyright laws and software license agreements included in the notice
+section of this file are the responsibility of the user.  Except as may be
+granted by separate express written agreement, this file provides no license
+to any Qualcomm Atheros patents, trademarks, copyrights, or other intellectual
+property.
+
+Copyright (c) 2013 QUALCOMM ATHEROS Incorporated.  All rights reserved.
+
+QUALCOMM ATHEROSĀ® is a registered trademark and registered service mark of
+QUALCOMM ATHEROS Incorporated.  All other trademarks and service marks are
+the property of their respective owners.
+
+NOTICES:
+
+/*
+ * Copyright (c) 2005-2012 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
+ * Copyright (c) 2002-2005 Atheros Communications, Inc.
+ * Copyright (c) 2008-2010, Atheros Communications Inc.
+ *
+ * Redistribution and use in source and binary forms are permitted
+ * provided that the following conditions are met:
+ * 1. The materials contained herein are unmodified and are used
+ *    unmodified.
+ * 2. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following NO
+ *    ''WARRANTY'' disclaimer below (''Disclaimer''), without
+ *    modification.
+ * 3. Redistributions in binary form must reproduce at minimum a
+ *    disclaimer similar to the Disclaimer below and any redistribution
+ *    must be conditioned upon including a substantially similar
+ *    Disclaimer requirement for further binary redistribution.
+ * 4. Neither the names of the above-listed copyright holders nor the
+ *    names of any contributors may be used to endorse or promote
+ *    product derived from this software without specific prior written
+ *    permission.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT,
+ * MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE
+ * FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGES.
+ */
+
+----
+
+The following files are from ECoS with a GPLv2 licence with modification
+and linking caveats. Please see the licence below for more information:
+
+target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/cmnos/printf/src/cmnos_printf.c
+target_firmware/magpie_fw_dev/target/cmnos/cmnos_printf.c
+target_firmware/magpie_fw_dev/target/cmnos/k2_fw_cmnos_printf.c
+
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2002 Gary Thomas
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+
+----
+
+Some of the source code is sourced from Tensilica, Inc.
+
+Although most of the files fall under the MIT licence, some of the source
+files generated as part of the system development have a proprietary
+Tensilica licence.
+
+With permission from Tensilica, Inc, these files have been relicenced
+under the following licence:
+
+/*
+ * Copyright (c) 2013 Tensilica Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
diff --git a/build b/build
new file mode 100755 (executable)
index 0000000..07fdb2b
--- /dev/null
+++ b/build
@@ -0,0 +1,22 @@
+#!/usr/bin/env bash
+
+rm htc_9271.fw
+rm htc_7010.fw
+
+# MAKE=gmake
+MAKE?=make
+
+echo "*** AR9271 ***"
+( cd target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram   \
+    && source builds_fusion_vista.ram                          \
+    && ${MAKE} clean ; ${MAKE} && ${MAKE} build && ${MAKE} build )
+cp target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/htc_9271.fw .
+
+echo "*** AR7010 ***"
+( cd target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram   \
+    && source merlin_fusion.ram                                        \
+    && ${MAKE} clean ; ${MAKE} && ${MAKE} build && ${MAKE} build )
+
+cp target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/htc_7010.fw .
+
+echo "*** Done! ***"
diff --git a/target_firmware/magpie_fw_dev/build/include/xtensa/config/core-isa.h b/target_firmware/magpie_fw_dev/build/include/xtensa/config/core-isa.h
new file mode 100644 (file)
index 0000000..ccf9b2d
--- /dev/null
@@ -0,0 +1,424 @@
+/*
+ * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
+ *                             processor CORE configuration
+ *
+ *  See <xtensa/config/core.h>, which includes this file, for more details.
+ */
+
+/*
+ * Xtensa processor core configuration information.
+ *
+ * Customer ID=4748; Build=0x2230f; Copyright (c) 1999-2008 by Tensilica Inc.  ALL RIGHTS RESERVED.
+ * These coded instructions, statements, and computer programs are the
+ * copyrighted works and confidential proprietary information of Tensilica Inc.
+ * They may not be modified, copied, reproduced, distributed, or disclosed to
+ * third parties in any manner, medium, or form, in whole or in part, without
+ * the prior written consent of Tensilica Inc.
+ */
+
+#ifndef _XTENSA_CORE_CONFIGURATION_H
+#define _XTENSA_CORE_CONFIGURATION_H
+
+
+/****************************************************************************
+           Parameters Useful for Any Code, USER or PRIVILEGED
+ ****************************************************************************/
+
+/*
+ *  Note:  Macros of the form XCHAL_HAVE_*** have a value of 1 if the option is
+ *  configured, and a value of 0 otherwise.  These macros are always defined.
+ */
+
+
+/*----------------------------------------------------------------------
+                               ISA
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_HAVE_BE                  1       /* big-endian byte ordering */
+#define XCHAL_HAVE_WINDOWED            1       /* windowed registers option */
+#define XCHAL_NUM_AREGS                        32      /* num of physical addr regs */
+#define XCHAL_NUM_AREGS_LOG2           5       /* log2(XCHAL_NUM_AREGS) */
+#define XCHAL_MAX_INSTRUCTION_SIZE     3       /* max instr bytes (3..8) */
+#define XCHAL_HAVE_DEBUG               1       /* debug option */
+#define XCHAL_HAVE_DENSITY             1       /* 16-bit instructions */
+#define XCHAL_HAVE_LOOPS               1       /* zero-overhead loops */
+#define XCHAL_HAVE_NSA                 1       /* NSA/NSAU instructions */
+#define XCHAL_HAVE_MINMAX              1       /* MIN/MAX instructions */
+#define XCHAL_HAVE_SEXT                        1       /* SEXT instruction */
+#define XCHAL_HAVE_CLAMPS              0       /* CLAMPS instruction */
+#define XCHAL_HAVE_MUL16               1       /* MUL16S/MUL16U instructions */
+#define XCHAL_HAVE_MUL32               1       /* MULL instruction */
+#define XCHAL_HAVE_MUL32_HIGH          1       /* MULUH/MULSH instructions */
+#define XCHAL_HAVE_DIV32               0       /* QUOS/QUOU/REMS/REMU instructions */
+#define XCHAL_HAVE_L32R                        1       /* L32R instruction */
+#define XCHAL_HAVE_ABSOLUTE_LITERALS   1       /* non-PC-rel (extended) L32R */
+#define XCHAL_HAVE_CONST16             0       /* CONST16 instruction */
+#define XCHAL_HAVE_ADDX                        1       /* ADDX#/SUBX# instructions */
+#define XCHAL_HAVE_WIDE_BRANCHES       0       /* B*.W18 or B*.W15 instr's */
+#define XCHAL_HAVE_PREDICTED_BRANCHES  0       /* B[EQ/EQZ/NE/NEZ]T instr's */
+#define XCHAL_HAVE_CALL4AND12          1       /* (obsolete option) */
+#define XCHAL_HAVE_ABS                 1       /* ABS instruction */
+/*#define XCHAL_HAVE_POPC              0*/     /* POPC instruction */
+/*#define XCHAL_HAVE_CRC               0*/     /* CRC instruction */
+#define XCHAL_HAVE_RELEASE_SYNC                1       /* L32AI/S32RI instructions */
+#define XCHAL_HAVE_S32C1I              1       /* S32C1I instruction */
+#define XCHAL_HAVE_SPECULATION         0       /* speculation */
+#define XCHAL_HAVE_FULL_RESET          1       /* all regs/state reset */
+#define XCHAL_NUM_CONTEXTS             1       /* */
+#define XCHAL_NUM_MISC_REGS            2       /* num of scratch regs (0..4) */
+#define XCHAL_HAVE_TAP_MASTER          0       /* JTAG TAP control instr's */
+#define XCHAL_HAVE_PRID                        1       /* processor ID register */
+#define XCHAL_HAVE_THREADPTR           1       /* THREADPTR register */
+#define XCHAL_HAVE_BOOLEANS            0       /* boolean registers */
+#define XCHAL_HAVE_CP                  0       /* CPENABLE reg (coprocessor) */
+#define XCHAL_CP_MAXCFG                        0       /* max allowed cp id plus one */
+#define XCHAL_HAVE_MAC16               0       /* MAC16 package */
+#define XCHAL_HAVE_VECTORFPU2005       0       /* vector floating-point pkg */
+#define XCHAL_HAVE_FP                  0       /* floating point pkg */
+#define XCHAL_HAVE_VECTRA1             0       /* Vectra I  pkg */
+#define XCHAL_HAVE_VECTRALX            0       /* Vectra LX pkg */
+#define XCHAL_HAVE_HIFI2               0       /* HiFi2 Audio Engine pkg */
+
+
+/*----------------------------------------------------------------------
+                               MISC
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_NUM_WRITEBUFFER_ENTRIES  4       /* size of write buffer */
+#define XCHAL_INST_FETCH_WIDTH         4       /* instr-fetch width in bytes */
+#define XCHAL_DATA_WIDTH               4       /* data width in bytes */
+/*  In T1050, applies to selected core load and store instructions (see ISA): */
+#define XCHAL_UNALIGNED_LOAD_EXCEPTION 1       /* unaligned loads cause exc. */
+#define XCHAL_UNALIGNED_STORE_EXCEPTION        1       /* unaligned stores cause exc.*/
+
+#define XCHAL_CORE_ID                  "Magpie_P0"     /* alphanum core name
+                                                  (CoreID) set in the Xtensa
+                                                  Processor Generator */
+
+#define XCHAL_BUILD_UNIQUE_ID          0x0002230F      /* 22-bit sw build ID */
+
+/*
+ *  These definitions describe the hardware targeted by this software.
+ */
+#define XCHAL_HW_CONFIGID0             0xC280DBFF      /* ConfigID hi 32 bits*/
+#define XCHAL_HW_CONFIGID1             0x0D02230F      /* ConfigID lo 32 bits*/
+#define XCHAL_HW_VERSION_NAME          "LX2.1.0"       /* full version name */
+#define XCHAL_HW_VERSION_MAJOR         2210    /* major ver# of targeted hw */
+#define XCHAL_HW_VERSION_MINOR         0       /* minor ver# of targeted hw */
+#define XCHAL_HW_VERSION               221000  /* major*100+minor */
+#define XCHAL_HW_REL_LX2               1
+#define XCHAL_HW_REL_LX2_1             1
+#define XCHAL_HW_REL_LX2_1_0           1
+#define XCHAL_HW_CONFIGID_RELIABLE     1
+/*  If software targets a *range* of hardware versions, these are the bounds: */
+#define XCHAL_HW_MIN_VERSION_MAJOR     2210    /* major v of earliest tgt hw */
+#define XCHAL_HW_MIN_VERSION_MINOR     0       /* minor v of earliest tgt hw */
+#define XCHAL_HW_MIN_VERSION           221000  /* earliest targeted hw */
+#define XCHAL_HW_MAX_VERSION_MAJOR     2210    /* major v of latest tgt hw */
+#define XCHAL_HW_MAX_VERSION_MINOR     0       /* minor v of latest tgt hw */
+#define XCHAL_HW_MAX_VERSION           221000  /* latest targeted hw */
+
+
+/*----------------------------------------------------------------------
+                               CACHE
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_ICACHE_LINESIZE          16      /* I-cache line size in bytes */
+#define XCHAL_DCACHE_LINESIZE          16      /* D-cache line size in bytes */
+#define XCHAL_ICACHE_LINEWIDTH         4       /* log2(I line size in bytes) */
+#define XCHAL_DCACHE_LINEWIDTH         4       /* log2(D line size in bytes) */
+
+#define XCHAL_ICACHE_SIZE              0       /* I-cache size in bytes or 0 */
+#define XCHAL_DCACHE_SIZE              0       /* D-cache size in bytes or 0 */
+
+#define XCHAL_DCACHE_IS_WRITEBACK      0       /* writeback feature */
+
+
+
+
+/****************************************************************************
+    Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
+ ****************************************************************************/
+
+
+#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
+
+/*----------------------------------------------------------------------
+                               CACHE
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_HAVE_PIF                 1       /* any outbound PIF present */
+
+/*  If present, cache size in bytes == (ways * 2^(linewidth + setwidth)).  */
+
+/*  Number of cache sets in log2(lines per way):  */
+#define XCHAL_ICACHE_SETWIDTH          0
+#define XCHAL_DCACHE_SETWIDTH          0
+
+/*  Cache set associativity (number of ways):  */
+#define XCHAL_ICACHE_WAYS              1
+#define XCHAL_DCACHE_WAYS              1
+
+/*  Cache features:  */
+#define XCHAL_ICACHE_LINE_LOCKABLE     0
+#define XCHAL_DCACHE_LINE_LOCKABLE     0
+#define XCHAL_ICACHE_ECC_PARITY                0
+#define XCHAL_DCACHE_ECC_PARITY                0
+
+/*  Number of encoded cache attr bits (see <xtensa/hal.h> for decoded bits):  */
+#define XCHAL_CA_BITS                  4
+
+
+/*----------------------------------------------------------------------
+                       INTERNAL I/D RAM/ROMs and XLMI
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_NUM_INSTROM              0       /* number of core instr. ROMs */
+#define XCHAL_NUM_INSTRAM              1       /* number of core instr. RAMs */
+#define XCHAL_NUM_DATAROM              0       /* number of core data ROMs */
+#define XCHAL_NUM_DATARAM              1       /* number of core data RAMs */
+#define XCHAL_NUM_URAM                 0       /* number of core unified RAMs*/
+#define XCHAL_NUM_XLMI                 0       /* number of core XLMI ports */
+
+/*  Instruction RAM 0:  */
+#define XCHAL_INSTRAM0_VADDR           0x00800000
+#define XCHAL_INSTRAM0_PADDR           0x00800000
+#define XCHAL_INSTRAM0_SIZE            4194304
+#define XCHAL_INSTRAM0_ECC_PARITY      0
+
+/*  Data RAM 0:  */
+#define XCHAL_DATARAM0_VADDR           0x00400000
+#define XCHAL_DATARAM0_PADDR           0x00400000
+#define XCHAL_DATARAM0_SIZE            4194304
+#define XCHAL_DATARAM0_ECC_PARITY      0
+
+
+/*----------------------------------------------------------------------
+                       INTERRUPTS and TIMERS
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_HAVE_INTERRUPTS          1       /* interrupt option */
+#define XCHAL_HAVE_HIGHPRI_INTERRUPTS  1       /* med/high-pri. interrupts */
+#define XCHAL_HAVE_NMI                 1       /* non-maskable interrupt */
+#define XCHAL_HAVE_CCOUNT              1       /* CCOUNT reg. (timer option) */
+#define XCHAL_NUM_TIMERS               1       /* number of CCOMPAREn regs */
+#define XCHAL_NUM_INTERRUPTS           19      /* number of interrupts */
+#define XCHAL_NUM_INTERRUPTS_LOG2      5       /* ceil(log2(NUM_INTERRUPTS)) */
+#define XCHAL_NUM_EXTINTERRUPTS                17      /* num of external interrupts */
+#define XCHAL_NUM_INTLEVELS            4       /* number of interrupt levels
+                                                  (not including level zero) */
+#define XCHAL_EXCM_LEVEL               3       /* level masked by PS.EXCM */
+       /* (always 1 in XEA1; levels 2 .. EXCM_LEVEL are "medium priority") */
+
+/*  Masks of interrupts at each interrupt level:  */
+#define XCHAL_INTLEVEL1_MASK           0x00000001
+#define XCHAL_INTLEVEL2_MASK           0x00007FFE
+#define XCHAL_INTLEVEL3_MASK           0x00038000
+#define XCHAL_INTLEVEL4_MASK           0x00000000
+#define XCHAL_INTLEVEL5_MASK           0x00040000
+#define XCHAL_INTLEVEL6_MASK           0x00000000
+#define XCHAL_INTLEVEL7_MASK           0x00000000
+
+/*  Masks of interrupts at each range 1..n of interrupt levels:  */
+#define XCHAL_INTLEVEL1_ANDBELOW_MASK  0x00000001
+#define XCHAL_INTLEVEL2_ANDBELOW_MASK  0x00007FFF
+#define XCHAL_INTLEVEL3_ANDBELOW_MASK  0x0003FFFF
+#define XCHAL_INTLEVEL4_ANDBELOW_MASK  0x0003FFFF
+#define XCHAL_INTLEVEL5_ANDBELOW_MASK  0x0007FFFF
+#define XCHAL_INTLEVEL6_ANDBELOW_MASK  0x0007FFFF
+#define XCHAL_INTLEVEL7_ANDBELOW_MASK  0x0007FFFF
+
+/*  Level of each interrupt:  */
+#define XCHAL_INT0_LEVEL               1
+#define XCHAL_INT1_LEVEL               2
+#define XCHAL_INT2_LEVEL               2
+#define XCHAL_INT3_LEVEL               2
+#define XCHAL_INT4_LEVEL               2
+#define XCHAL_INT5_LEVEL               2
+#define XCHAL_INT6_LEVEL               2
+#define XCHAL_INT7_LEVEL               2
+#define XCHAL_INT8_LEVEL               2
+#define XCHAL_INT9_LEVEL               2
+#define XCHAL_INT10_LEVEL              2
+#define XCHAL_INT11_LEVEL              2
+#define XCHAL_INT12_LEVEL              2
+#define XCHAL_INT13_LEVEL              2
+#define XCHAL_INT14_LEVEL              2
+#define XCHAL_INT15_LEVEL              3
+#define XCHAL_INT16_LEVEL              3
+#define XCHAL_INT17_LEVEL              3
+#define XCHAL_INT18_LEVEL              5
+#define XCHAL_DEBUGLEVEL               4       /* debug interrupt level */
+#define XCHAL_HAVE_DEBUG_EXTERN_INT    1       /* OCD external db interrupt */
+#define XCHAL_NMILEVEL                 5       /* NMI "level" (for use with
+                                                  EXCSAVE/EPS/EPC_n, RFI n) */
+
+/*  Type of each interrupt:  */
+#define XCHAL_INT0_TYPE        XTHAL_INTTYPE_SOFTWARE
+#define XCHAL_INT1_TYPE        XTHAL_INTTYPE_TIMER
+#define XCHAL_INT2_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT3_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT4_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT5_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT6_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT7_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT8_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT9_TYPE        XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT10_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT11_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT12_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT13_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT14_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT15_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT16_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT17_TYPE       XTHAL_INTTYPE_EXTERN_LEVEL
+#define XCHAL_INT18_TYPE       XTHAL_INTTYPE_NMI
+
+/*  Masks of interrupts for each type of interrupt:  */
+#define XCHAL_INTTYPE_MASK_UNCONFIGURED        0xFFF80000
+#define XCHAL_INTTYPE_MASK_SOFTWARE    0x00000001
+#define XCHAL_INTTYPE_MASK_EXTERN_EDGE 0x00000000
+#define XCHAL_INTTYPE_MASK_EXTERN_LEVEL        0x0003FFFC
+#define XCHAL_INTTYPE_MASK_TIMER       0x00000002
+#define XCHAL_INTTYPE_MASK_NMI         0x00040000
+#define XCHAL_INTTYPE_MASK_WRITE_ERROR 0x00000000
+
+/*  Interrupt numbers assigned to specific interrupt sources:  */
+#define XCHAL_TIMER0_INTERRUPT         1       /* CCOMPARE0 */
+#define XCHAL_TIMER1_INTERRUPT         XTHAL_TIMER_UNCONFIGURED
+#define XCHAL_TIMER2_INTERRUPT         XTHAL_TIMER_UNCONFIGURED
+#define XCHAL_TIMER3_INTERRUPT         XTHAL_TIMER_UNCONFIGURED
+#define XCHAL_NMI_INTERRUPT            18      /* non-maskable interrupt */
+
+/*  Interrupt numbers for levels at which only one interrupt is configured:  */
+#define XCHAL_INTLEVEL1_NUM            0
+#define XCHAL_INTLEVEL5_NUM            18
+/*  (There are many interrupts each at level(s) 2, 3.)  */
+
+
+/*
+ *  External interrupt vectors/levels.
+ *  These macros describe how Xtensa processor interrupt numbers
+ *  (as numbered internally, eg. in INTERRUPT and INTENABLE registers)
+ *  map to external BInterrupt<n> pins, for those interrupts
+ *  configured as external (level-triggered, edge-triggered, or NMI).
+ *  See the Xtensa processor databook for more details.
+ */
+
+/*  Core interrupt numbers mapped to each EXTERNAL interrupt number:  */
+#define XCHAL_EXTINT0_NUM              2       /* (intlevel 2) */
+#define XCHAL_EXTINT1_NUM              3       /* (intlevel 2) */
+#define XCHAL_EXTINT2_NUM              4       /* (intlevel 2) */
+#define XCHAL_EXTINT3_NUM              5       /* (intlevel 2) */
+#define XCHAL_EXTINT4_NUM              6       /* (intlevel 2) */
+#define XCHAL_EXTINT5_NUM              7       /* (intlevel 2) */
+#define XCHAL_EXTINT6_NUM              8       /* (intlevel 2) */
+#define XCHAL_EXTINT7_NUM              9       /* (intlevel 2) */
+#define XCHAL_EXTINT8_NUM              10      /* (intlevel 2) */
+#define XCHAL_EXTINT9_NUM              11      /* (intlevel 2) */
+#define XCHAL_EXTINT10_NUM             12      /* (intlevel 2) */
+#define XCHAL_EXTINT11_NUM             13      /* (intlevel 2) */
+#define XCHAL_EXTINT12_NUM             14      /* (intlevel 2) */
+#define XCHAL_EXTINT13_NUM             15      /* (intlevel 3) */
+#define XCHAL_EXTINT14_NUM             16      /* (intlevel 3) */
+#define XCHAL_EXTINT15_NUM             17      /* (intlevel 3) */
+#define XCHAL_EXTINT16_NUM             18      /* (intlevel 5) */
+
+
+/*----------------------------------------------------------------------
+                       EXCEPTIONS and VECTORS
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_XEA_VERSION              2       /* Xtensa Exception Architecture
+                                                  number: 1 == XEA1 (old)
+                                                          2 == XEA2 (new)
+                                                          0 == XEAX (extern) */
+#define XCHAL_HAVE_XEA1                        0       /* Exception Architecture 1 */
+#define XCHAL_HAVE_XEA2                        1       /* Exception Architecture 2 */
+#define XCHAL_HAVE_XEAX                        0       /* External Exception Arch. */
+#define XCHAL_HAVE_EXCEPTIONS          1       /* exception option */
+#define XCHAL_HAVE_MEM_ECC_PARITY      0       /* local memory ECC/parity */
+#define XCHAL_HAVE_VECTOR_SELECT       1       /* relocatable vectors */
+#define XCHAL_HAVE_VECBASE             1       /* relocatable vectors */
+#define XCHAL_VECBASE_RESET_VADDR      0x008E0800  /* VECBASE reset value */
+#define XCHAL_VECBASE_RESET_PADDR      0x008E0800
+#define XCHAL_RESET_VECBASE_OVERLAP    0
+
+#define XCHAL_RESET_VECTOR0_VADDR      0x008E0000
+#define XCHAL_RESET_VECTOR0_PADDR      0x008E0000
+#define XCHAL_RESET_VECTOR1_VADDR      0x0F000000
+#define XCHAL_RESET_VECTOR1_PADDR      0x0F000000
+#define XCHAL_RESET_VECTOR_VADDR       0x008E0000
+#define XCHAL_RESET_VECTOR_PADDR       0x008E0000
+#define XCHAL_USER_VECOFS              0x00000620
+#define XCHAL_USER_VECTOR_VADDR                0x008E0E20
+#define XCHAL_USER_VECTOR_PADDR                0x008E0E20
+#define XCHAL_KERNEL_VECOFS            0x00000540
+#define XCHAL_KERNEL_VECTOR_VADDR      0x008E0D40
+#define XCHAL_KERNEL_VECTOR_PADDR      0x008E0D40
+#define XCHAL_DOUBLEEXC_VECOFS         0x00000720
+#define XCHAL_DOUBLEEXC_VECTOR_VADDR   0x008E0F20
+#define XCHAL_DOUBLEEXC_VECTOR_PADDR   0x008E0F20
+#define XCHAL_WINDOW_OF4_VECOFS                0x00000000
+#define XCHAL_WINDOW_UF4_VECOFS                0x00000040
+#define XCHAL_WINDOW_OF8_VECOFS                0x00000080
+#define XCHAL_WINDOW_UF8_VECOFS                0x000000C0
+#define XCHAL_WINDOW_OF12_VECOFS       0x00000100
+#define XCHAL_WINDOW_UF12_VECOFS       0x00000140
+#define XCHAL_WINDOW_VECTORS_VADDR     0x008E0800
+#define XCHAL_WINDOW_VECTORS_PADDR     0x008E0800
+#define XCHAL_INTLEVEL2_VECOFS         0x00000220
+#define XCHAL_INTLEVEL2_VECTOR_VADDR   0x008E0A20
+#define XCHAL_INTLEVEL2_VECTOR_PADDR   0x008E0A20
+#define XCHAL_INTLEVEL3_VECOFS         0x00000320
+#define XCHAL_INTLEVEL3_VECTOR_VADDR   0x008E0B20
+#define XCHAL_INTLEVEL3_VECTOR_PADDR   0x008E0B20
+#define XCHAL_INTLEVEL4_VECOFS         0x00000420
+#define XCHAL_INTLEVEL4_VECTOR_VADDR   0x008E0C20
+#define XCHAL_INTLEVEL4_VECTOR_PADDR   0x008E0C20
+#define XCHAL_DEBUG_VECOFS             XCHAL_INTLEVEL4_VECOFS
+#define XCHAL_DEBUG_VECTOR_VADDR       XCHAL_INTLEVEL4_VECTOR_VADDR
+#define XCHAL_DEBUG_VECTOR_PADDR       XCHAL_INTLEVEL4_VECTOR_PADDR
+#define XCHAL_NMI_VECOFS               0x000004E4
+#define XCHAL_NMI_VECTOR_VADDR         0x008E0CE4
+#define XCHAL_NMI_VECTOR_PADDR         0x008E0CE4
+#define XCHAL_INTLEVEL5_VECOFS         XCHAL_NMI_VECOFS
+#define XCHAL_INTLEVEL5_VECTOR_VADDR   XCHAL_NMI_VECTOR_VADDR
+#define XCHAL_INTLEVEL5_VECTOR_PADDR   XCHAL_NMI_VECTOR_PADDR
+
+
+/*----------------------------------------------------------------------
+                               DEBUG
+  ----------------------------------------------------------------------*/
+
+#define XCHAL_HAVE_OCD                 1       /* OnChipDebug option */
+#define XCHAL_NUM_IBREAK               2       /* number of IBREAKn regs */
+#define XCHAL_NUM_DBREAK               2       /* number of DBREAKn regs */
+#define XCHAL_HAVE_OCD_DIR_ARRAY       1       /* faster OCD option */
+
+
+/*----------------------------------------------------------------------
+                               MMU
+  ----------------------------------------------------------------------*/
+
+/*  See core-matmap.h header file for more details.  */
+
+#define XCHAL_HAVE_TLBS                        1       /* inverse of HAVE_CACHEATTR */
+#define XCHAL_HAVE_SPANNING_WAY                1       /* one way maps I+D 4GB vaddr */
+#define XCHAL_HAVE_IDENTITY_MAP                1       /* vaddr == paddr always */
+#define XCHAL_HAVE_CACHEATTR           0       /* CACHEATTR register present */
+#define XCHAL_HAVE_MIMIC_CACHEATTR     1       /* region protection */
+#define XCHAL_HAVE_XLT_CACHEATTR       0       /* region prot. w/translation */
+#define XCHAL_HAVE_PTP_MMU             0       /* full MMU (with page table
+                                                  [autorefill] and protection)
+                                                  usable for an MMU-based OS */
+/*  If none of the above last 4 are set, it's a custom TLB configuration.  */
+
+#define XCHAL_MMU_ASID_BITS            0       /* number of bits in ASIDs */
+#define XCHAL_MMU_RINGS                        1       /* number of rings (1..4) */
+#define XCHAL_MMU_RING_BITS            0       /* num of bits in RING field */
+
+#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
+
+
+#endif /* _XTENSA_CORE_CONFIGURATION_H */
diff --git a/target_firmware/magpie_fw_dev/build/include/xtensa/config/core-matmap.h b/target_firmware/magpie_fw_dev/build/include/xtensa/config/core-matmap.h
new file mode 100644 (file)
index 0000000..f0acaca
--- /dev/null
@@ -0,0 +1,301 @@
+/*
+ * xtensa/config/core-matmap.h -- Memory access and translation mapping
+ *     parameters (CHAL) of the Xtensa processor core configuration.
+ *
+ *  If you are using Xtensa Tools, see <xtensa/config/core.h> (which includes
+ *  this file) for more details.
+ *
+ *  In the Xtensa processor products released to date, all parameters
+ *  defined in this file are derivable (at least in theory) from
+ *  information contained in the core-isa.h header file.
+ *  In particular, the following core configuration parameters are relevant:
+ *     XCHAL_HAVE_CACHEATTR
+ *     XCHAL_HAVE_MIMIC_CACHEATTR
+ *     XCHAL_HAVE_XLT_CACHEATTR
+ *     XCHAL_HAVE_PTP_MMU
+ *     XCHAL_ITLB_ARF_ENTRIES_LOG2
+ *     XCHAL_DTLB_ARF_ENTRIES_LOG2
+ *     XCHAL_DCACHE_IS_WRITEBACK
+ *     XCHAL_ICACHE_SIZE               (presence of I-cache)
+ *     XCHAL_DCACHE_SIZE               (presence of D-cache)
+ *     XCHAL_HW_VERSION_MAJOR
+ *     XCHAL_HW_VERSION_MINOR
+ */
+
+/*
+ * Customer ID=4748; Build=0x2230f; Copyright (c) 1999-2008 by Tensilica Inc.  ALL RIGHTS RESERVED.
+ * These coded instructions, statements, and computer programs are the
+ * copyrighted works and confidential proprietary information of Tensilica Inc.
+ * They may not be modified, copied, reproduced, distributed, or disclosed to
+ * third parties in any manner, medium, or form, in whole or in part, without
+ * the prior written consent of Tensilica Inc.
+ */
+
+
+#ifndef XTENSA_CONFIG_CORE_MATMAP_H
+#define XTENSA_CONFIG_CORE_MATMAP_H
+
+
+/*----------------------------------------------------------------------
+                       CACHE (MEMORY ACCESS) ATTRIBUTES
+  ----------------------------------------------------------------------*/
+
+
+/*  Cache Attribute encodings -- lists of access modes for each cache attribute:  */
+#define XCHAL_FCA_LIST         XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_BYPASS        XCHAL_SEP \
+                               XTHAL_FAM_BYPASS        XCHAL_SEP \
+                               XTHAL_FAM_BYPASS        XCHAL_SEP \
+                               XTHAL_FAM_BYPASS        XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_FAM_EXCEPTION
+#define XCHAL_LCA_LIST         XTHAL_LAM_BYPASSG       XCHAL_SEP \
+                               XTHAL_LAM_BYPASSG       XCHAL_SEP \
+                               XTHAL_LAM_BYPASSG       XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_BYPASSG       XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_LAM_BYPASSG       XCHAL_SEP \
+                               XTHAL_LAM_EXCEPTION
+#define XCHAL_SCA_LIST         XTHAL_SAM_BYPASS        XCHAL_SEP \
+                               XTHAL_SAM_BYPASS        XCHAL_SEP \
+                               XTHAL_SAM_BYPASS        XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_BYPASS        XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION     XCHAL_SEP \
+                               XTHAL_SAM_BYPASS        XCHAL_SEP \
+                               XTHAL_SAM_EXCEPTION
+
+
+/*
+ *  Specific encoded cache attribute values of general interest.
+ *  If a specific cache mode is not available, the closest available
+ *  one is returned instead (eg. writethru instead of writeback,
+ *  bypass instead of writethru).
+ */
+#define XCHAL_CA_BYPASS        2       /* cache disabled (bypassed) mode */
+#define XCHAL_CA_WRITETHRU     2       /* cache enabled (write-through) mode */
+#define XCHAL_CA_WRITEBACK     2       /* cache enabled (write-back) mode */
+#define XCHAL_CA_BYPASS_RW     0       /* cache disabled (bypassed) mode (no exec) */
+#define XCHAL_CA_WRITETHRU_RW  0       /* cache enabled (write-through) mode (no exec) */
+#define XCHAL_CA_WRITEBACK_RW  0       /* cache enabled (write-back) mode (no exec) */
+#define XCHAL_CA_ILLEGAL       15      /* no access allowed (all cause exceptions) mode */
+#define XCHAL_CA_ISOLATE       0       /* cache isolate (accesses go to cache not memory) mode */
+
+
+/*----------------------------------------------------------------------
+                               MMU
+  ----------------------------------------------------------------------*/
+
+/*
+ *  General notes on MMU parameters.
+ *
+ *  Terminology:
+ *     ASID = address-space ID (acts as an "extension" of virtual addresses)
+ *     VPN  = virtual page number
+ *     PPN  = physical page number
+ *     CA   = encoded cache attribute (access modes)
+ *     TLB  = translation look-aside buffer (term is stretched somewhat here)
+ *     I    = instruction (fetch accesses)
+ *     D    = data (load and store accesses)
+ *     way  = each TLB (ITLB and DTLB) consists of a number of "ways"
+ *             that simultaneously match the virtual address of an access;
+ *             a TLB successfully translates a virtual address if exactly
+ *             one way matches the vaddr; if none match, it is a miss;
+ *             if multiple match, one gets a "multihit" exception;
+ *             each way can be independently configured in terms of number of
+ *             entries, page sizes, which fields are writable or constant, etc.
+ *     set  = group of contiguous ways with exactly identical parameters
+ *     ARF  = auto-refill; hardware services a 1st-level miss by loading a PTE
+ *             from the page table and storing it in one of the auto-refill ways;
+ *             if this PTE load also misses, a miss exception is posted for s/w.
+ *     min-wired = a "min-wired" way can be used to map a single (minimum-sized)
+ *             page arbitrarily under program control; it has a single entry,
+ *             is non-auto-refill (some other way(s) must be auto-refill),
+ *             all its fields (VPN, PPN, ASID, CA) are all writable, and it
+ *             supports the XCHAL_MMU_MIN_PTE_PAGE_SIZE page size (a current
+ *             restriction is that this be the only page size it supports).
+ *
+ *  TLB way entries are virtually indexed.
+ *  TLB ways that support multiple page sizes:
+ *     - must have all writable VPN and PPN fields;
+ *     - can only use one page size at any given time (eg. setup at startup),
+ *       selected by the respective ITLBCFG or DTLBCFG special register,
+ *       whose bits n*4+3 .. n*4 index the list of page sizes for way n
+ *       (XCHAL_xTLB_SETm_PAGESZ_LOG2_LIST for set m corresponding to way n);
+ *       this list may be sparse for auto-refill ways because auto-refill
+ *       ways have independent lists of supported page sizes sharing a
+ *       common encoding with PTE entries; the encoding is the index into
+ *       this list; unsupported sizes for a given way are zero in the list;
+ *       selecting unsupported sizes results in undefined hardware behaviour;
+ *     - is only possible for ways 0 thru 7 (due to ITLBCFG/DTLBCFG definition).
+ */
+
+#define XCHAL_MMU_ASID_INVALID         0       /* ASID value indicating invalid address space */
+#define XCHAL_MMU_ASID_KERNEL          0       /* ASID value indicating kernel (ring 0) address space */
+#define XCHAL_MMU_SR_BITS              0       /* number of size-restriction bits supported */
+#define XCHAL_MMU_CA_BITS              4       /* number of bits needed to hold cache attribute encoding */
+#define XCHAL_MMU_MAX_PTE_PAGE_SIZE    29      /* max page size in a PTE structure (log2) */
+#define XCHAL_MMU_MIN_PTE_PAGE_SIZE    29      /* min page size in a PTE structure (log2) */
+
+
+/***  Instruction TLB:  ***/
+
+#define XCHAL_ITLB_WAY_BITS            0       /* number of bits holding the ways */
+#define XCHAL_ITLB_WAYS                        1       /* number of ways (n-way set-associative TLB) */
+#define XCHAL_ITLB_ARF_WAYS            0       /* number of auto-refill ways */
+#define XCHAL_ITLB_SETS                        1       /* number of sets (groups of ways with identical settings) */
+
+/*  Way set to which each way belongs:  */
+#define XCHAL_ITLB_WAY0_SET            0
+
+/*  Ways sets that are used by hardware auto-refill (ARF):  */
+#define XCHAL_ITLB_ARF_SETS            0       /* number of auto-refill sets */
+
+/*  Way sets that are "min-wired" (see terminology comment above):  */
+#define XCHAL_ITLB_MINWIRED_SETS       0       /* number of "min-wired" sets */
+
+
+/*  ITLB way set 0 (group of ways 0 thru 0):  */
+#define XCHAL_ITLB_SET0_WAY                    0       /* index of first way in this way set */
+#define XCHAL_ITLB_SET0_WAYS                   1       /* number of (contiguous) ways in this way set */
+#define XCHAL_ITLB_SET0_ENTRIES_LOG2           3       /* log2(number of entries in this way) */
+#define XCHAL_ITLB_SET0_ENTRIES                        8       /* number of entries in this way (always a power of 2) */
+#define XCHAL_ITLB_SET0_ARF                    0       /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */
+#define XCHAL_ITLB_SET0_PAGESIZES              1       /* number of supported page sizes in this way */
+#define XCHAL_ITLB_SET0_PAGESZ_BITS            0       /* number of bits to encode the page size */
+#define XCHAL_ITLB_SET0_PAGESZ_LOG2_MIN                29      /* log2(minimum supported page size) */
+#define XCHAL_ITLB_SET0_PAGESZ_LOG2_MAX                29      /* log2(maximum supported page size) */
+#define XCHAL_ITLB_SET0_PAGESZ_LOG2_LIST       29      /* list of log2(page size)s, separated by XCHAL_SEP;
+                                                          2^PAGESZ_BITS entries in list, unsupported entries are zero */
+#define XCHAL_ITLB_SET0_ASID_CONSTMASK         0       /* constant ASID bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_VPN_CONSTMASK          0x00000000      /* constant VPN bits, not including entry index bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_PPN_CONSTMASK          0xE0000000      /* constant PPN bits, including entry index bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_CA_CONSTMASK           0       /* constant CA bits; 0 if all writable */
+#define XCHAL_ITLB_SET0_ASID_RESET             0       /* 1 if ASID reset values defined (and all writable); 0 otherwise */
+#define XCHAL_ITLB_SET0_VPN_RESET              0       /* 1 if VPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_ITLB_SET0_PPN_RESET              0       /* 1 if PPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_ITLB_SET0_CA_RESET               1       /* 1 if CA reset values defined (and all writable); 0 otherwise */
+/*  Constant VPN values for each entry of ITLB way set 0 (because VPN_CONSTMASK is non-zero):  */
+#define XCHAL_ITLB_SET0_E0_VPN_CONST           0x00000000
+#define XCHAL_ITLB_SET0_E1_VPN_CONST           0x20000000
+#define XCHAL_ITLB_SET0_E2_VPN_CONST           0x40000000
+#define XCHAL_ITLB_SET0_E3_VPN_CONST           0x60000000
+#define XCHAL_ITLB_SET0_E4_VPN_CONST           0x80000000
+#define XCHAL_ITLB_SET0_E5_VPN_CONST           0xA0000000
+#define XCHAL_ITLB_SET0_E6_VPN_CONST           0xC0000000
+#define XCHAL_ITLB_SET0_E7_VPN_CONST           0xE0000000
+/*  Constant PPN values for each entry of ITLB way set 0 (because PPN_CONSTMASK is non-zero):  */
+#define XCHAL_ITLB_SET0_E0_PPN_CONST           0x00000000
+#define XCHAL_ITLB_SET0_E1_PPN_CONST           0x20000000
+#define XCHAL_ITLB_SET0_E2_PPN_CONST           0x40000000
+#define XCHAL_ITLB_SET0_E3_PPN_CONST           0x60000000
+#define XCHAL_ITLB_SET0_E4_PPN_CONST           0x80000000
+#define XCHAL_ITLB_SET0_E5_PPN_CONST           0xA0000000
+#define XCHAL_ITLB_SET0_E6_PPN_CONST           0xC0000000
+#define XCHAL_ITLB_SET0_E7_PPN_CONST           0xE0000000
+/*  Reset CA values for each entry of ITLB way set 0 (because SET0_CA_RESET is non-zero):  */
+#define XCHAL_ITLB_SET0_E0_CA_RESET            0x02
+#define XCHAL_ITLB_SET0_E1_CA_RESET            0x02
+#define XCHAL_ITLB_SET0_E2_CA_RESET            0x02
+#define XCHAL_ITLB_SET0_E3_CA_RESET            0x02
+#define XCHAL_ITLB_SET0_E4_CA_RESET            0x02
+#define XCHAL_ITLB_SET0_E5_CA_RESET            0x02
+#define XCHAL_ITLB_SET0_E6_CA_RESET            0x02
+#define XCHAL_ITLB_SET0_E7_CA_RESET            0x02
+
+
+/***  Data TLB:  ***/
+
+#define XCHAL_DTLB_WAY_BITS            0       /* number of bits holding the ways */
+#define XCHAL_DTLB_WAYS                        1       /* number of ways (n-way set-associative TLB) */
+#define XCHAL_DTLB_ARF_WAYS            0       /* number of auto-refill ways */
+#define XCHAL_DTLB_SETS                        1       /* number of sets (groups of ways with identical settings) */
+
+/*  Way set to which each way belongs:  */
+#define XCHAL_DTLB_WAY0_SET            0
+
+/*  Ways sets that are used by hardware auto-refill (ARF):  */
+#define XCHAL_DTLB_ARF_SETS            0       /* number of auto-refill sets */
+
+/*  Way sets that are "min-wired" (see terminology comment above):  */
+#define XCHAL_DTLB_MINWIRED_SETS       0       /* number of "min-wired" sets */
+
+
+/*  DTLB way set 0 (group of ways 0 thru 0):  */
+#define XCHAL_DTLB_SET0_WAY                    0       /* index of first way in this way set */
+#define XCHAL_DTLB_SET0_WAYS                   1       /* number of (contiguous) ways in this way set */
+#define XCHAL_DTLB_SET0_ENTRIES_LOG2           3       /* log2(number of entries in this way) */
+#define XCHAL_DTLB_SET0_ENTRIES                        8       /* number of entries in this way (always a power of 2) */
+#define XCHAL_DTLB_SET0_ARF                    0       /* 1=autorefill by h/w, 0=non-autorefill (wired/constant/static) */
+#define XCHAL_DTLB_SET0_PAGESIZES              1       /* number of supported page sizes in this way */
+#define XCHAL_DTLB_SET0_PAGESZ_BITS            0       /* number of bits to encode the page size */
+#define XCHAL_DTLB_SET0_PAGESZ_LOG2_MIN                29      /* log2(minimum supported page size) */
+#define XCHAL_DTLB_SET0_PAGESZ_LOG2_MAX                29      /* log2(maximum supported page size) */
+#define XCHAL_DTLB_SET0_PAGESZ_LOG2_LIST       29      /* list of log2(page size)s, separated by XCHAL_SEP;
+                                                          2^PAGESZ_BITS entries in list, unsupported entries are zero */
+#define XCHAL_DTLB_SET0_ASID_CONSTMASK         0       /* constant ASID bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_VPN_CONSTMASK          0x00000000      /* constant VPN bits, not including entry index bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_PPN_CONSTMASK          0xE0000000      /* constant PPN bits, including entry index bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_CA_CONSTMASK           0       /* constant CA bits; 0 if all writable */
+#define XCHAL_DTLB_SET0_ASID_RESET             0       /* 1 if ASID reset values defined (and all writable); 0 otherwise */
+#define XCHAL_DTLB_SET0_VPN_RESET              0       /* 1 if VPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_DTLB_SET0_PPN_RESET              0       /* 1 if PPN reset values defined (and all writable); 0 otherwise */
+#define XCHAL_DTLB_SET0_CA_RESET               1       /* 1 if CA reset values defined (and all writable); 0 otherwise */
+/*  Constant VPN values for each entry of DTLB way set 0 (because VPN_CONSTMASK is non-zero):  */
+#define XCHAL_DTLB_SET0_E0_VPN_CONST           0x00000000
+#define XCHAL_DTLB_SET0_E1_VPN_CONST           0x20000000
+#define XCHAL_DTLB_SET0_E2_VPN_CONST           0x40000000
+#define XCHAL_DTLB_SET0_E3_VPN_CONST           0x60000000
+#define XCHAL_DTLB_SET0_E4_VPN_CONST           0x80000000
+#define XCHAL_DTLB_SET0_E5_VPN_CONST           0xA0000000
+#define XCHAL_DTLB_SET0_E6_VPN_CONST           0xC0000000
+#define XCHAL_DTLB_SET0_E7_VPN_CONST           0xE0000000
+/*  Constant PPN values for each entry of DTLB way set 0 (because PPN_CONSTMASK is non-zero):  */
+#define XCHAL_DTLB_SET0_E0_PPN_CONST           0x00000000
+#define XCHAL_DTLB_SET0_E1_PPN_CONST           0x20000000
+#define XCHAL_DTLB_SET0_E2_PPN_CONST           0x40000000
+#define XCHAL_DTLB_SET0_E3_PPN_CONST           0x60000000
+#define XCHAL_DTLB_SET0_E4_PPN_CONST           0x80000000
+#define XCHAL_DTLB_SET0_E5_PPN_CONST           0xA0000000
+#define XCHAL_DTLB_SET0_E6_PPN_CONST           0xC0000000
+#define XCHAL_DTLB_SET0_E7_PPN_CONST           0xE0000000
+/*  Reset CA values for each entry of DTLB way set 0 (because SET0_CA_RESET is non-zero):  */
+#define XCHAL_DTLB_SET0_E0_CA_RESET            0x02
+#define XCHAL_DTLB_SET0_E1_CA_RESET            0x02
+#define XCHAL_DTLB_SET0_E2_CA_RESET            0x02
+#define XCHAL_DTLB_SET0_E3_CA_RESET            0x02
+#define XCHAL_DTLB_SET0_E4_CA_RESET            0x02
+#define XCHAL_DTLB_SET0_E5_CA_RESET            0x02
+#define XCHAL_DTLB_SET0_E6_CA_RESET            0x02
+#define XCHAL_DTLB_SET0_E7_CA_RESET            0x02
+
+
+
+
+#endif /*XTENSA_CONFIG_CORE_MATMAP_H*/
diff --git a/target_firmware/magpie_fw_dev/build/include/xtensa/config/specreg.h b/target_firmware/magpie_fw_dev/build/include/xtensa/config/specreg.h
new file mode 100644 (file)
index 0000000..f342a9d
--- /dev/null
@@ -0,0 +1,84 @@
+/*
+ * Xtensa Special Register symbolic names
+ */
+
+/* $Id: //depot/rel/BadgerPass/Xtensa/SWConfig/hal/specreg.h.tpp#1 $ */
+
+/*
+ * Customer ID=4748; Build=0x2230f; Copyright (c) 1998-2002 by Tensilica Inc.  ALL RIGHTS RESERVED.
+ * These coded instructions, statements, and computer programs are the
+ * copyrighted works and confidential proprietary information of Tensilica Inc.
+ * They may not be modified, copied, reproduced, distributed, or disclosed to
+ * third parties in any manner, medium, or form, in whole or in part, without
+ * the prior written consent of Tensilica Inc.
+ */
+
+#ifndef XTENSA_SPECREG_H
+#define XTENSA_SPECREG_H
+
+/*  Include these special register bitfield definitions, for historical reasons:  */
+#include <xtensa/corebits.h>
+
+
+/*  Special registers:  */
+#define LBEG           0
+#define LEND           1
+#define LCOUNT         2
+#define SAR            3
+#define LITBASE                5
+#define SCOMPARE1      12
+#define WINDOWBASE     72
+#define WINDOWSTART    73
+#define IBREAKENABLE   96
+#define DDR            104
+#define IBREAKA_0      128
+#define IBREAKA_1      129
+#define DBREAKA_0      144
+#define DBREAKA_1      145
+#define DBREAKC_0      160
+#define DBREAKC_1      161
+#define EPC_1          177
+#define EPC_2          178
+#define EPC_3          179
+#define EPC_4          180
+#define EPC_5          181
+#define DEPC           192
+#define EPS_2          194
+#define EPS_3          195
+#define EPS_4          196
+#define EPS_5          197
+#define EXCSAVE_1      209
+#define EXCSAVE_2      210
+#define EXCSAVE_3      211
+#define EXCSAVE_4      212
+#define EXCSAVE_5      213
+#define INTERRUPT      226
+#define INTENABLE      228
+#define PS             230
+#define VECBASE                231
+#define EXCCAUSE       232
+#define DEBUGCAUSE     233
+#define CCOUNT         234
+#define PRID           235
+#define ICOUNT         236
+#define ICOUNTLEVEL    237
+#define EXCVADDR       238
+#define CCOMPARE_0     240
+#define MISC_REG_0     244
+#define MISC_REG_1     245
+
+/*  Special cases (bases of special register series):  */
+#define IBREAKA                128
+#define DBREAKA                144
+#define DBREAKC                160
+#define EPC            176
+#define EPS            192
+#define EXCSAVE                208
+#define CCOMPARE       240
+
+/*  Special names for read-only and write-only interrupt registers:  */
+#define INTREAD                226
+#define INTSET         226
+#define INTCLEAR       227
+
+#endif /* XTENSA_SPECREG_H */
diff --git a/target_firmware/magpie_fw_dev/build/include/xtensa/config/tie.h b/target_firmware/magpie_fw_dev/build/include/xtensa/config/tie.h
new file mode 100644 (file)
index 0000000..b53910c
--- /dev/null
@@ -0,0 +1,54 @@
+/*
+ * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
+ *
+ *  NOTE:  This header file is not meant to be included directly.
+ */
+
+/*
+ * This header file describes this specific Xtensa processor's TIE extensions
+ * that extend basic Xtensa core functionality.  It is customized to this
+ * Xtensa processor configuration.
+ *
+ * Customer ID=4748; Build=0x2230f; Copyright (C) 1999-2008 by Tensilica Inc.  ALL RIGHTS RESERVED.
+ * These coded instructions, statements, and computer programs are the
+ * copyrighted works and confidential proprietary information of Tensilica Inc.
+ * They may not be modified, copied, reproduced, distributed, or disclosed to
+ * third parties in any manner, medium, or form, in whole or in part, without
+ * the prior written consent of Tensilica Inc.
+ */
+
+#ifndef _XTENSA_CORE_TIE_H
+#define _XTENSA_CORE_TIE_H
+
+#define XCHAL_CP_NUM                   0       /* number of coprocessors */
+#define XCHAL_CP_MAX                   0       /* max CP ID + 1 (0 if none) */
+#define XCHAL_CP_MASK                  0x00    /* bitmask of all CPs by ID */
+#define XCHAL_CP_PORT_MASK             0x00    /* bitmask of only port CPs */
+
+/*  Save area for non-coprocessor optional and custom (TIE) state:  */
+#define XCHAL_NCP_SA_SIZE              4
+#define XCHAL_NCP_SA_ALIGN             4
+
+/*  Total save area for optional and custom state (NCP + CPn):  */
+#define XCHAL_TOTAL_SA_SIZE            16      /* with 16-byte align padding */
+#define XCHAL_TOTAL_SA_ALIGN           4       /* actual minimum alignment */
+
+/*
+ * Detailed contents of save areas.
+ * NOTE:  caller must define the XCHAL_SA_{UREG,SREG,REGF} macros (they
+ * are not defined here) before expanding the XCHAL_SA_xxx_LIST macros.
+ *
+ * XCHAL_SA_SREG(dbnum,offset,size,contentsz,align,name,sregnum,bitmask,x,x)
+ * XCHAL_SA_UREG(dbnum,offset,size,contentsz,align,name,uregnum,bitmask,x,x)
+ * XCHAL_SA_REGF(dbnum,offset,size,contentsz,align,name,index,span,x,x,
+ *               basename,regf_name,regf_numentries)
+ */
+
+#define XCHAL_SA_NCP_NUM       1
+#define XCHAL_SA_NCP_LIST      \
+  XCHAL_SA_SREG(0x020C,   0, 4, 4, 4,      scompare1, 12,0xFFFFFFFF,0,0)
+
+/* Byte length of instruction from its first nibble (op0 field), per FLIX.  */
+#define XCHAL_OP0_FORMAT_LENGTHS       3,3,3,3,3,3,3,3,2,2,2,2,2,2,3,3
+
+#endif /*_XTENSA_CORE_TIE_H*/
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/Makefile
new file mode 100755 (executable)
index 0000000..5870104
--- /dev/null
@@ -0,0 +1,80 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+DIRS =  \
+       $(PRJ_ROOT)/$(TARGET)/adf               \
+       $(PRJ_ROOT)/$(TARGET)/init              \
+       $(PRJ_ROOT)/$(TARGET)/wmi               \
+       $(PRJ_ROOT)/$(TARGET)/wlan              \
+       $(PRJ_ROOT)/$(TARGET)/carrier_apd       \
+       $(PRJ_ROOT)/$(TARGET)/cmnos             \
+       $(PRJ_ROOT)/$(TARGET)/htc               \
+       $(PRJ_ROOT)/$(TARGET)/hif               \
+       $(PRJ_ROOT)/$(TARGET)/buf_pool
+
+COMPONENTS_sw.ram =                    \
+       $(LIB_PATH)/libcmnos.a          \
+       $(LIB_PATH)/libadf.a            \
+       $(LIB_PATH)/libwmi.a            \
+       $(LIB_PATH)/libwlan.a           \
+       $(LIB_PATH)/libcarrier_apd.a    \
+       $(LIB_PATH)/libbuf_pool.a       \
+       $(LIB_PATH)/libhif.a            \
+       $(LIB_PATH)/libhtc.a
+
+
+ifeq ($(debug),1)
+LINKFLAGS_sw.ram =                     \
+       -T./target.ram_debug.ld         \
+       --start-group                   \
+       $(COMPONENTS_sw.ram)            \
+       --end-group
+else
+LINKFLAGS_sw.ram =                     \
+       -T./target.ram.ld               \
+       --start-group                   \
+       $(COMPONENTS_sw.ram)            \
+       --end-group
+endif
+
+all: util toolchain_prep
+       @for i in $(DIRS) ; do $(MAKE) -C $$i all CC=$(XCC) LD=$(XLD) AR=$(XAR) || exit ; done
+
+dep: util toolchain_prep
+       @for i in $(DIRS) ; do $(MAKE) -C $$i dep CC=$(XCC) LD=$(XLD) AR=$(XAR) || exit ; done
+
+clean:
+       find $(PRJ_ROOT)/ram -name "*.o" -exec rm -f {} \;
+       rm -rf $(PRJ_ROOT)/lib/ram/*.a
+       @for i in $(DIRS) ; do echo $$i; $(MAKE) -C $$i clean; done
+       rm -f *.bin *.hex *.objdump *.out *.map *.c *.fw *.fw.back *.c.back
+       rm -f ../../../utility/athfw2lnx/athfw2lnx
+
+init:  toolchain_prep
+       for i in $(DIRS) ; do $(MAKE) -C $$i init CC=$(XCC) LD=$(XLD) AR=$(XAR) ; done
+
+build: binary image
+
+binary:
+       $(XLD) $(PRJ_ROOT)/ram/init/obj/app_start.o $(PRJ_ROOT)/ram/init/obj/init.o $(PRJ_ROOT)/ram/init/obj/magpie.o $(LINKFLAGS_sw.ram) -Map $(PRJNAME).map -o $(PRJNAME).out
+
+toolchain_prep:
+ifeq ($(XTENSA_TOOL_INSTALLED),0)
+       @cd ../../../toolchain && \
+       (test -d tools) || tar xvzf toolchain.tgz
+endif
+
+image:
+       $(XOBJCOPY)                                             \
+               --change-section-lma .text-0x400000             \
+               --change-section-vma .text-0x400000             \
+               -O binary $(PRJNAME).out $(PRJNAME).bin
+       rm -f ../../../utility/athfw2lnx/athfw2lnx
+       $(shell cp -f fwu.c fwu.c.back 2> /dev/null)
+       $(shell cp -f htc_9271.fw htc_9271.fw.back 2> /dev/null)
+       $(BIN2HEX) $(PRJNAME).bin fwu.c 0 $(MAGPIE_IF)
+       $(MAKE) -C ../../../utility/athfw2lnx ATH_FW=$(PRJ_ROOT)/image/k2_ram/fwu.c
+       $(shell ../../../utility/athfw2lnx/athfw2lnx > htc_9271.fw)
+
+util:
+       $(MAKE) -C ../../../utility/ clean
+       $(MAKE) -C ../../../utility/ all
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/builds_fusion_vista.ram b/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/builds_fusion_vista.ram
new file mode 100755 (executable)
index 0000000..35f7fa1
--- /dev/null
@@ -0,0 +1,45 @@
+#!/bin/bash
+
+MAGPIE_ROOT=`pwd`/../../../../;export MAGPIE_ROOT
+PROJECT=k2; export PROJECT
+TARGET=ram; export TARGET
+
+PRJ_ROOT=$MAGPIE_ROOT/build/k2_1_0; export PRJ_ROOT
+PRJNAME=ram; export PRJNAME
+PRJPATH=$PRJ_ROOT/$PRJNAME; export PRJPATH
+PRJ_HPATH=$PRJPATH/inc; export PRJ_HPATH
+
+XTENSA_TOOLS_INC=$XTENSA_TOOLS_ROOT/xtensa-elf/include
+XTENSA_GCC_INC=$XTENSA_TOOLS_ROOT/lib/gcc/xtensa-elf/4.7.2/include
+
+HPATH=" -I$XTENSA_TOOLS_INC                            \
+       -I$XTENSA_GCC_INC                               \
+       -I$MAGPIE_ROOT/target/inc/k2                    \
+       -I$MAGPIE_ROOT/target/inc/k2/k2                 \
+        -I$MAGPIE_ROOT/../wlan/include                 \
+        -I$MAGPIE_ROOT/../wlan/include/k2              \
+        -I$MAGPIE_ROOT/../wlan/                         \
+       -I$MAGPIE_ROOT/target/cmnos/                    \
+       -I$MAGPIE_ROOT/target/wmi/                      \
+       -I$MAGPIE_ROOT/target/wlan/                     \
+       -I$MAGPIE_ROOT/target/buf_pool/                 \
+       -I$MAGPIE_ROOT/target/htc/                      \
+       -I$MAGPIE_ROOT/target/inc                       \
+       -I$MAGPIE_ROOT/target/inc/OTUS                  \
+       -I$MAGPIE_ROOT/target/adf/                      \
+       -I$MAGPIE_ROOT/build/include";
+
+
+export HPATH
+
+
+LIB_PATH=$PRJ_ROOT/lib/ram; export LIB_PATH
+CROSS_COMPILE=$XTENSA_TOOLS_ROOT/bin; export CROSS_COMPILE
+TARGET_PREFIX=xt-; export TARGET_PREFIX
+
+ARCH=""; export ARCH
+DEFS=""; export DEFS
+CCOPTS=" -g -Os -Wunused-label -Wunused-variable -Wunused-value -Wpointer-arith -Wundef -nostdlib -Wundef"; export CCOPTS
+ASOPTS="-Wa, --fatal-warnings"; export ASOPTS
+DFLAGS="-D_RAM_ -DPROJECT_K2 -DBIG_ENDIAN -D_BYTE_ORDER=_BIG_ENDIAN -D__XTENSA__ -DFUSION_USB_FW -DRX_SCATTER -DFUSION_USB_ENABLE_TX_STREAM -DFUSION_USB_ENABLE_RX_STREAM -DATH_ENABLE_CABQ"; export DFLAGS
+TARGET_LDFLAGS="-g -nostdlib"; export TARGET_LDFLAGS
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/rom.addrs.ld b/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/rom.addrs.ld
new file mode 100755 (executable)
index 0000000..936d4d4
--- /dev/null
@@ -0,0 +1,69 @@
+PROVIDE ( _indir_tbl = 0x00500000 );
+PROVIDE (athos_indirection_table_install = 0x008e1548);
+PROVIDE ( memcpy = 0x008e4eb8 );
+PROVIDE ( memset = 0x008e519c );
+PROVIDE ( __divsi3 = 0x008e4cec );
+PROVIDE ( __udivsi3 = 0x008e4da0 );
+PROVIDE ( __umodsi3 = 0x008e4df0 );
+PROVIDE ( __modsi3 = 0x008e4d54 );
+PROVIDE ( athos_interrupt_init = 0x008e1600 );
+PROVIDE ( athos_unblock_all_intrlvl = 0x008e1460 );
+PROVIDE ( athos_interrupt_handler = 0x008e15f0 );
+PROVIDE ( _xtos_set_interrupt_handler = 0x008e1230 );
+PROVIDE ( hif_module_install = 0x008e2bd4 );
+PROVIDE ( strcmp = 0x008e48b4 );
+PROVIDE ( strlen = 0x008e4a64 );
+PROVIDE ( strcpy = 0x008e49cc );
+PROVIDE ( strncpy = 0x008e4b90 );
+PROVIDE ( Xthal_num_ccompare = 0x004e5869 );
+PROVIDE ( cticks = 0x0050088c );
+PROVIDE ( UsbDeviceDescriptor = 0x004e0100 );
+PROVIDE ( String00Descriptor = 0x004e01a0 );
+PROVIDE ( String10Descriptor = 0x004e01b0 );
+PROVIDE ( String20Descriptor = 0x004e01c0 );
+PROVIDE ( String30Descriptor = 0x004e01e0 );
+PROVIDE ( HIFusb_DescTraceDump = 0x008e2c18 );
+PROVIDE ( xthal_get_intenable = 0x008e4cd4 );
+PROVIDE ( xthal_set_intenable = 0x008e4ce4 );
+PROVIDE ( xthal_get_interrupt = 0x008e4cdc );
+PROVIDE ( xthal_get_ccompare = 0x008e4cc4 );
+PROVIDE ( xthal_set_ccompare = 0x008e4cb4 );
+PROVIDE ( xthal_get_ccount = 0x008e4cac );
+PROVIDE ( Xthal_num_ccompare = 0x004e5869 );
+PROVIDE ( zfDmaReclaimPacket = 0x008e4568 );
+PROVIDE ( zfDmaPutPacket = 0x008e45fc );
+PROVIDE ( zfDmaGetPacket = 0x008e452c );
+PROVIDE ( handle_hp_rx_complete_isr = 0x008e2b18 );
+PROVIDE ( handle_mp_rx_complete_isr = 0x008e2b38 );
+PROVIDE ( handle_tx_complete_isr = 0x008e2adc );
+PROVIDE ( u16TxRxCounter = 0x005009e4 );
+PROVIDE ( pu8DescriptorEX = 0x005009e0 );
+PROVIDE ( fwCheckSum = 0x005009dc );
+PROVIDE ( eUsbCxCommand = 0x005009f0 );
+PROVIDE ( ControlCmd = 0x005009c0 );
+PROVIDE ( eUsbCxFinishAction = 0x005009ec );
+PROVIDE ( UsbChirpFinish = 0x005009f4 );
+PROVIDE ( cmnos_allocram_debug = 0x008e1ae8 );
+PROVIDE ( g_hifUSBCtx = 0x00500978 );
+PROVIDE ( _HIFusb_return_recv_buf = 0x008e2a74 );
+PROVIDE ( vdesc_module_install = 0x008e413c );
+PROVIDE ( vbuf_module_install = 0x008e408c );
+PROVIDE ( mUsbFIFOConfig = 0x008e3ca4 );
+PROVIDE ( mUsbEPMxPtSzHigh = 0x008e3cc4 );
+PROVIDE ( mUsbEPMxPtSzLow = 0x008e3cec );
+PROVIDE ( mUsbEPinHighBandSet = 0x008e3d10 );
+PROVIDE ( mUsbFIFOConfig = 0x008e3ca4 );
+PROVIDE ( mUsbFIFOMap = 0x008e3c84 );
+PROVIDE ( mUsbEPMap = 0x008e3c68 );
+PROVIDE ( usbFifoConf = 0x005009cc );
+PROVIDE ( u8UsbInterfaceValue = 0x005009f8 );
+PROVIDE ( u8UsbConfigValue = 0x005009f6 );
+PROVIDE ( u8UsbInterfaceAlternateSetting = 0x005009fa );
+PROVIDE ( ControlCmd = 0x005009c0 );
+PROVIDE ( vUsbFIFO_EPxCfg_HS = 0x008e3d5c );
+PROVIDE ( vUsbClrEPx = 0x008e2d00 );
+PROVIDE ( bSet_configuration = 0x008e2f7c );
+PROVIDE ( _HIFusb_isr_handler = 0x008e2b58 );
+PROVIDE ( bGet_descriptor = 0x008e2ec4 );
+PROVIDE ( u8ConfigDescriptorEX = 0x005009e8 );
+PROVIDE ( bStandardCommand = 0x008e328c );
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/target.ram.ld b/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/target.ram.ld
new file mode 100755 (executable)
index 0000000..0b2d62e
--- /dev/null
@@ -0,0 +1,264 @@
+
+/* Linker script for Magpie RAM-based applications */
+
+/*
+Currently, ROM code reserves the first 8KB of RAM for its data/bss.
+The next 12KB or RAM is used for RAM software's literals and read-only data.
+After that comes 64KB reserved for RAM software's data and bss.
+Then 92KB of RAM is reserved for text (code).
+The last 8KB of RAM is reserved for ROM patches, customer DataSets,
+and RAM software expansion. (There is also some additional RAM between
+segments that can be used, if needed.)
+  ROM reserved: 0x00500000..0x00501fff
+  Literals:     0x00502000..0x00504fff
+  Data:         0x00505000..0x00514fff
+  Text:         0x00915000..0x0092bfff
+TBD: May want to use a 2-pass link approach in order to
+eliminate fixed boundaries.  Support for physical addressing
+in Tensilica tools would be helpful, but it's not coming
+any time soon.
+*/
+
+/* dram_seg: 0x504000, see target.rom.ld */
+
+/* ***** */
+MEMORY
+{
+ lit_seg :            org = 0x004E5200,   len = 0x1DE00
+ iram_seg :           org = 0x00903000,   len = 0x9B40
+ dram_seg :           org = 0x0050CB40,   len = 0x1800
+
+}
+
+PHDRS
+{
+  lit_phdr PT_LOAD;
+  dram_phdr PT_LOAD;
+  iram_phdr PT_LOAD;
+}
+
+/*  Default entry point:  */
+ENTRY(app_start)
+
+SECTIONS
+{
+  /*
+   * This empty section is used to convince RAM linkage
+   * to share litbase with ROM code.
+   */
+  .lit4 (NOLOAD) :
+  {
+    _rom_literal_start = ABSOLUTE(.);
+    . += 0x1BE00; /* Reserved virtual space for physical mem gap and ROM */
+    _lit4_start = ABSOLUTE(.);
+    _lit4_end = ABSOLUTE(.);
+    _rom_literal_end = ABSOLUTE(.);
+  } >lit_seg :NONE
+
+  .dport0.rodata :
+  {
+    _dport0_rodata_start = ABSOLUTE(.); /* 0x505000 */
+    *(.dport0.rodata)
+    *(.dport.rodata)
+    _dport0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.literal :
+  {
+    _dport0_literal_start = ABSOLUTE(.);
+    *(.dport0.literal)
+    *(.dport.literal)
+    _dport0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.rodata :
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    *(.dram.rodata)
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .rodata :
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = ALIGN(4);              /* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_dport0_bss_start)
+    LONG(_dport0_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .literals :
+  {
+    _literals_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.gnu.linkonce.lit4.*)
+    _literals_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.literal :
+  {
+    _dram0_literal_start = ABSOLUTE(.);
+    *(.dram0.literal)
+    *(.dram.literal)
+    _dram0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.data :
+  {
+    _dport0_data_start = ABSOLUTE(.);
+    *(.dport0.data)
+    *(.dport.data)
+    _dport0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dport0.bss :
+  {
+    . = ALIGN (8);
+    _dport0_bss_start = ABSOLUTE(.);
+    *(.dport0.bss)
+    . = ALIGN (8);
+    _dport0_bss_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dram0.data :
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    *(.dram.data)
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+    *(.eh_frame)
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .bss :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.dram0.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+       _fw_image_end = ABSOLUTE(.);
+    /*_stack_sentry = ALIGN(0x8);*/
+  } >dram_seg :dram_phdr
+
+  .text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    *(.literal .text .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >iram_seg :iram_phdr
+
+  .iram0.text :
+  {
+    _iram0_text_start = ABSOLUTE(.);
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+    _iram0_text_end = ABSOLUTE(.);
+  } >iram_seg :iram_phdr
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+}
+
+INCLUDE "rom.addrs.ld"
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/target.ram_debug.ld b/target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/target.ram_debug.ld
new file mode 100755 (executable)
index 0000000..72b293f
--- /dev/null
@@ -0,0 +1,264 @@
+
+/* Linker script for Magpie RAM-based applications */
+
+/*
+Currently, ROM code reserves the first 8KB of RAM for its data/bss.
+The next 12KB or RAM is used for RAM software's literals and read-only data.
+After that comes 64KB reserved for RAM software's data and bss.
+Then 92KB of RAM is reserved for text (code).
+The last 8KB of RAM is reserved for ROM patches, customer DataSets,
+and RAM software expansion. (There is also some additional RAM between
+segments that can be used, if needed.)
+  ROM reserved: 0x00500000..0x00501fff
+  Literals:     0x00502000..0x00504fff
+  Data:         0x00505000..0x00514fff
+  Text:         0x00915000..0x0092bfff
+TBD: May want to use a 2-pass link approach in order to
+eliminate fixed boundaries.  Support for physical addressing
+in Tensilica tools would be helpful, but it's not coming
+any time soon.
+*/
+
+/* dram_seg: 0x504000, see target.rom.ld */
+
+/* ***** */
+MEMORY
+{
+ lit_seg :            org = 0x004E5200,   len = 0x1EE00
+ iram_seg :           org = 0x00904000,   len = 0xA800
+ dram_seg :           org = 0x0050E800,   len = 0x1800
+
+}
+
+PHDRS
+{
+  lit_phdr PT_LOAD;
+  dram_phdr PT_LOAD;
+  iram_phdr PT_LOAD;
+}
+
+/*  Default entry point:  */
+ENTRY(app_start)
+
+SECTIONS
+{
+  /*
+   * This empty section is used to convince RAM linkage
+   * to share litbase with ROM code.
+   */
+  .lit4 (NOLOAD) :
+  {
+    _rom_literal_start = ABSOLUTE(.);
+    . += 0x1BE00; /* Reserved virtual space for physical mem gap and ROM */
+    _lit4_start = ABSOLUTE(.);
+    _lit4_end = ABSOLUTE(.);
+    _rom_literal_end = ABSOLUTE(.);
+  } >lit_seg :NONE
+
+  .dport0.rodata :
+  {
+    _dport0_rodata_start = ABSOLUTE(.); /* 0x505000 */
+    *(.dport0.rodata)
+    *(.dport.rodata)
+    _dport0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.literal :
+  {
+    _dport0_literal_start = ABSOLUTE(.);
+    *(.dport0.literal)
+    *(.dport.literal)
+    _dport0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.rodata :
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    *(.dram.rodata)
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .rodata :
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = ALIGN(4);              /* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_dport0_bss_start)
+    LONG(_dport0_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .literals :
+  {
+    _literals_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.gnu.linkonce.lit4.*)
+    _literals_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.literal :
+  {
+    _dram0_literal_start = ABSOLUTE(.);
+    *(.dram0.literal)
+    *(.dram.literal)
+    _dram0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.data :
+  {
+    _dport0_data_start = ABSOLUTE(.);
+    *(.dport0.data)
+    *(.dport.data)
+    _dport0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dport0.bss :
+  {
+    . = ALIGN (8);
+    _dport0_bss_start = ABSOLUTE(.);
+    *(.dport0.bss)
+    . = ALIGN (8);
+    _dport0_bss_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dram0.data :
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    *(.dram.data)
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+    *(.eh_frame)
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .bss :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.dram0.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+       _fw_image_end = ABSOLUTE(.);
+    /*_stack_sentry = ALIGN(0x8);*/
+  } >dram_seg :dram_phdr
+
+  .text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    *(.literal .text .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >iram_seg :iram_phdr
+
+  .iram0.text :
+  {
+    _iram0_text_start = ABSOLUTE(.);
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+    _iram0_text_end = ABSOLUTE(.);
+  } >iram_seg :iram_phdr
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+}
+
+INCLUDE "rom.addrs.ld"
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/lib/ram/dummy.txt b/target_firmware/magpie_fw_dev/build/k2_1_0/lib/ram/dummy.txt
new file mode 100755 (executable)
index 0000000..e69de29
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/adf/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/adf/Makefile
new file mode 100755 (executable)
index 0000000..eee2bb6
--- /dev/null
@@ -0,0 +1,61 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+export LAYERNAME = adf
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(LAYERNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+# export SSOBJPATH = $(PRJ_ROOT)/build/$(TARGET)/$(LAYERNAME)/obj
+
+
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(LAYERNAME)/obj
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+#DIRS = net os nbuf
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libadf.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/adf/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/adf/Makefile.ss
new file mode 100755 (executable)
index 0000000..8611c2a
--- /dev/null
@@ -0,0 +1,48 @@
+#
+# Sub-system source search path for Adjust_Dep at this dir level
+#
+# !!Customize!!
+
+export SSPATH = $(SSMPATH)
+
+
+#
+# Extra include paths required by this module at this directory level
+#
+# !!Customize!!
+
+EXTRA_HPATH = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =
+EXTRA_ASFLAGS =
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH = $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory level
+#
+# !!Customize!!
+
+O_OBJS =       $(SSOBJPATH)/adf_nbuf.o \
+               $(SSOBJPATH)/adf_net.o  \
+               $(SSOBJPATH)/adf_os_defer_pvt.o \
+               $(SSOBJPATH)/adf_os_dma.o \
+               $(SSOBJPATH)/adf_os_irq_pvt.o \
+               $(SSOBJPATH)/adf_os_timer.o
+
+include $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by the tool adj_dep
+#
+
+### Dep
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/buf_pool/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/buf_pool/Makefile
new file mode 100755 (executable)
index 0000000..2eeb0ba
--- /dev/null
@@ -0,0 +1,59 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+export SSNAME = buf_pool
+
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(SSNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(SSNAME)/obj
+
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libbuf_pool.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/buf_pool/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/buf_pool/Makefile.ss
new file mode 100755 (executable)
index 0000000..1fe76f9
--- /dev/null
@@ -0,0 +1,44 @@
+#
+# Sub-system source search path for Adjust_Dep at this dir level
+#
+# !!Customize!!
+
+export SSPATH = $(SSMPATH)
+
+
+#
+# Extra include paths required by this module at this directory level
+#
+# !!Customize!!
+
+EXTRA_HPATH = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =
+EXTRA_ASFLAGS =
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH = $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory level
+#
+# !!Customize!!
+
+O_OBJS =       $(SSOBJPATH)/buf_pool_static.o
+
+
+include $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by the tool adj_dep
+#
+
+### Dep
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/carrier_apd/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/carrier_apd/Makefile
new file mode 100755 (executable)
index 0000000..d9b80f7
--- /dev/null
@@ -0,0 +1,59 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+export LAYERNAME = carrier_apd
+export SLAYERNAME = ../wlan
+
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/$(SLAYERNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+# export SSOBJPATH = $(PRJ_ROOT)/build/$(TARGET)/$(LAYERNAME)/usb/obj
+
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(LAYERNAME)/$(SLAYERNAME)/$(SSNAME)/obj
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libcarrier_apd.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/carrier_apd/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/carrier_apd/Makefile.ss
new file mode 100755 (executable)
index 0000000..bef6db9
--- /dev/null
@@ -0,0 +1,53 @@
+#
+# Sub-system source search path for Adjust_Dep at this dir level
+#
+# !!Customize!!
+
+export SSPATH = $(SSMPATH)
+
+
+#
+# Extra include paths required by this module at this directory level
+#
+# !!Customize!!
+
+EXTRA_HPATH = -I$(SSPATH) -I$(SSMPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =
+EXTRA_ASFLAGS =
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH = $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory level
+#
+# !!Customize!!
+
+O_OBJS = $(SSOBJPATH)/ah.o \
+       $(SSOBJPATH)/ar5416_hw.o \
+       $(SSOBJPATH)/ar5416_phy.o \
+       $(SSOBJPATH)/ah_osdep.o \
+       $(SSOBJPATH)/if_ath.o  \
+       $(SSOBJPATH)/if_ath_pci.o \
+       $(SSOBJPATH)/if_owl.o \
+       $(SSOBJPATH)/ieee80211_output.o \
+       $(SSOBJPATH)/ar5416Phy.o \
+        $(SSOBJPATH)/ratectrl_11n_ln.o
+
+include $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by the tool adj_dep
+#
+
+### Dep
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/cmnos/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/cmnos/Makefile
new file mode 100755 (executable)
index 0000000..5fbf26b
--- /dev/null
@@ -0,0 +1,57 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+export LAYERNAME = cmnos
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(LAYERNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+# export SSOBJPATH = $(PRJ_ROOT)/build/$(TARGET)/$(LAYERNAME)/obj
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(LAYERNAME)/obj
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+#DIRS = dbg printf sflash clock
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libcmnos.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/cmnos/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/cmnos/Makefile.ss
new file mode 100755 (executable)
index 0000000..74f66c2
--- /dev/null
@@ -0,0 +1,48 @@
+#
+# Sub-system source    search path     for     Adjust_Dep at this dir level
+#
+# !!Customize!!        
+
+export SSPATH =        $(SSMPATH)
+
+
+#
+# Extra        include paths required by this module at this directory level
+#
+# !!Customize!!        
+
+EXTRA_HPATH    = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =        
+EXTRA_ASFLAGS =        
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH =        $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory        level
+#
+# !!Customize!!        
+
+O_OBJS =       $(SSOBJPATH)/k2_cmnos_clock_patch.o \
+               $(SSOBJPATH)/dbg_api.o \
+               $(SSOBJPATH)/k2_fw_cmnos_printf.o \
+               $(SSOBJPATH)/cmnos_sflash.o
+
+
+include        $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by        the     tool adj_dep
+#
+
+###    Dep     
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/hif/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/hif/Makefile
new file mode 100755 (executable)
index 0000000..52c578f
--- /dev/null
@@ -0,0 +1,59 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+export LAYERNAME = hif
+
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(LAYERNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+# export SSOBJPATH = $(PRJ_ROOT)/build/$(TARGET)/$(LAYERNAME)/obj
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(LAYERNAME)/obj
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+#DIRS = usb
+SUBDIRS = .
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libhif.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/hif/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/hif/Makefile.ss
new file mode 100755 (executable)
index 0000000..2a17993
--- /dev/null
@@ -0,0 +1,45 @@
+#
+# Sub-system source search path for Adjust_Dep at this dir level
+#
+# !!Customize!!
+
+export SSPATH = $(SSMPATH)
+
+
+#
+# Extra include paths required by this module at this directory level
+#
+# !!Customize!!
+
+EXTRA_HPATH = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =
+EXTRA_ASFLAGS =
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH = $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory level
+#
+# !!Customize!!
+
+O_OBJS =       $(SSOBJPATH)/k2_fw_usb_api.o        \
+            $(SSOBJPATH)/k2_HIF_usb_patch.o
+
+
+include $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by the tool adj_dep
+#
+
+### Dep
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/htc/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/htc/Makefile
new file mode 100755 (executable)
index 0000000..d1159ac
--- /dev/null
@@ -0,0 +1,60 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+export SSNAME = htc
+
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(SSNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(SSNAME)/obj
+
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libhtc.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+#      ar -rcs $(L_TARGET) `find . -name "*.o"`
+
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/htc/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/htc/Makefile.ss
new file mode 100755 (executable)
index 0000000..ae26c92
--- /dev/null
@@ -0,0 +1,44 @@
+#
+# Sub-system source search path for Adjust_Dep at this dir level
+#
+# !!Customize!!
+
+export SSPATH = $(SSMPATH)
+
+
+#
+# Extra include paths required by this module at this directory level
+#
+# !!Customize!!
+
+EXTRA_HPATH = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =
+EXTRA_ASFLAGS =
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH = $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory level
+#
+# !!Customize!!
+
+O_OBJS =       $(SSOBJPATH)/htc.o
+
+
+include $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by the tool adj_dep
+#
+
+### Dep
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/init/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/init/Makefile
new file mode 100755 (executable)
index 0000000..81da922
--- /dev/null
@@ -0,0 +1,60 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+#export LAYERNAME = ram
+export SSNAME = init
+
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(SSNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(SSNAME)/obj
+
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libinit.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/init/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/init/Makefile.ss
new file mode 100755 (executable)
index 0000000..642be84
--- /dev/null
@@ -0,0 +1,46 @@
+#
+# Sub-system source    search path     for     Adjust_Dep at this dir level
+#
+# !!Customize!!        
+
+export SSPATH =        $(SSMPATH)
+
+
+#
+# Extra        include paths required by this module at this directory level
+#
+# !!Customize!!        
+
+EXTRA_HPATH    = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =        
+EXTRA_ASFLAGS =        
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH =        $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory        level
+#
+# !!Customize!!        
+
+O_OBJS =       $(SSOBJPATH)/app_start.o    \
+               $(SSOBJPATH)/init.o         \
+            $(SSOBJPATH)/magpie.o
+
+
+include        $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by        the     tool adj_dep
+#
+
+###    Dep
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wlan/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wlan/Makefile
new file mode 100755 (executable)
index 0000000..c05e4e9
--- /dev/null
@@ -0,0 +1,61 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+#export LAYERNAME = ram
+export SSNAME = wlan
+
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(SSNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(SSNAME)/obj
+
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libwlan.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+#      ar -rcs $(L_TARGET) `find . -name "*.o"`
+
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wlan/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wlan/Makefile.ss
new file mode 100755 (executable)
index 0000000..aab1446
--- /dev/null
@@ -0,0 +1,44 @@
+#
+# Sub-system source search path for Adjust_Dep at this dir level
+#
+# !!Customize!!
+
+export SSPATH = $(SSMPATH)
+
+
+#
+# Extra include paths required by this module at this directory level
+#
+# !!Customize!!
+
+EXTRA_HPATH = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =
+EXTRA_ASFLAGS =
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH = $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory level
+#
+# !!Customize!!
+
+O_OBJS = $(SSOBJPATH)/wlan_pci.o
+
+
+include $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by the tool adj_dep
+#
+
+### Dep
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wmi/Makefile b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wmi/Makefile
new file mode 100755 (executable)
index 0000000..6a3704f
--- /dev/null
@@ -0,0 +1,59 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+
+#
+# Sub-system source main path
+#
+# !!Customize!!
+
+export SSNAME = wmi
+
+
+#
+# Sub-system source main path
+#
+
+export SSMPATH = $(MAGPIE_ROOT)/target/$(SSNAME)
+
+
+#
+# Sub-system object search path for GNU tool chain
+#
+# !!Customize!!
+
+export SSOBJPATH = $(PRJ_ROOT)/$(TARGET)/$(SSNAME)/obj
+
+
+#
+# Sub-system/module list at this layer
+#
+# !!Customize!!
+
+SUBDIRS = .
+
+
+#
+# Archive for this package
+#
+# !!Customize!!
+
+export L_TARGET = $(LIB_PATH)/libwmi.a
+
+
+#
+# Targets
+#
+
+all:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss all || exit $?; done
+
+
+dep:
+       for i in $(SUBDIRS) ; do $(MAKE) -C $$i -f Makefile.ss dep || exit $?; done
+
+clean:
+       $(MAKE) clean -f Makefile.ss
+
+init:
+       $(MAKE) -f Makefile.ss init
+
diff --git a/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wmi/Makefile.ss b/target_firmware/magpie_fw_dev/build/k2_1_0/ram/wmi/Makefile.ss
new file mode 100755 (executable)
index 0000000..dd4a587
--- /dev/null
@@ -0,0 +1,44 @@
+#
+# Sub-system source search path for Adjust_Dep at this dir level
+#
+# !!Customize!!
+
+export SSPATH = $(SSMPATH)
+
+
+#
+# Extra include paths required by this module at this directory level
+#
+# !!Customize!!
+
+EXTRA_HPATH = -I$(SSPATH)
+#EXTRA_HPATH =
+
+EXTRA_CFLAGS =
+EXTRA_CCFLAGS =
+EXTRA_ASFLAGS =
+CFLAGS +=
+
+
+#
+# Search path for GNU tool chain
+#
+
+VPATH = $(LIB_PATH):$(SSOBJPATH)
+
+
+#
+# Object list at this directory level
+#
+# !!Customize!!
+
+O_OBJS = $(SSOBJPATH)/wmi_svc.o
+
+
+include $(MAGPIE_ROOT)/build/make_opt/Rules.make
+
+#
+# The followings are automatically generated by the tool adj_dep
+#
+
+### Dep
diff --git a/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/Makefile b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/Makefile
new file mode 100755 (executable)
index 0000000..6193b99
--- /dev/null
@@ -0,0 +1,83 @@
+include $(MAGPIE_ROOT)/build/make_opt/Makefile.h
+
+ifeq ($(TGT_BUILD),)
+       TGT_BUILD=asic
+endif
+
+DIRS =                                         \
+       $(PRJ_ROOT)/$(TARGET)/adf               \
+       $(PRJ_ROOT)/$(TARGET)/init              \
+       $(PRJ_ROOT)/$(TARGET)/wmi               \
+       $(PRJ_ROOT)/$(TARGET)/wlan              \
+       $(PRJ_ROOT)/$(TARGET)/carrier_apd       \
+       $(PRJ_ROOT)/$(TARGET)/cmnos             \
+       $(PRJ_ROOT)/$(TARGET)/rompatch
+
+COMPONENTS_sw.ram =                    \
+       $(LIB_PATH)/libcmnos.a          \
+       $(LIB_PATH)/libadf.a            \
+       $(LIB_PATH)/libwmi.a            \
+       $(LIB_PATH)/libwlan.a           \
+       $(LIB_PATH)/libcarrier_apd.a    \
+       $(LIB_PATH)/librompatch.a
+
+
+LINKFLAGS_sw.ram =                     \
+       -T./target.ram.ld               \
+       --start-group                   \
+       $(COMPONENTS_sw.ram)            \
+       --end-group
+
+FW_LOAD_ADDR=`$(XREADELF) -l ram.out | grep LOAD | awk '/LOAD/ { if (NR==1) print $$3 }'`
+FW_EXEC_ADDR=`$(XREADELF) -l ram.out | grep 'Entry point' | awk '{ print $$3 }'`
+
+all: util toolchain_prep
+       @for i in $(DIRS) ; do $(MAKE) -C $$i all CC=$(XCC) LD=$(XLD) AR=$(XAR) || exit ; done
+
+dep: util toolchain_prep
+       for i in $(DIRS) ; do $(MAKE) -C $$i dep CC=$(XCC) LD=$(XLD) AR=$(XAR) || exit ; done
+
+clean: util_clean
+       find $(PRJ_ROOT)/ram -name "*.o" -exec rm -f {} \;
+       find $(PRJ_ROOT)/lib -name "*.a" -exec rm -f {} \;
+#      for i in $(DIRS) ; do $(MAKE) -C $$i clean; done
+       rm -f *.bin  *.objdump *.out *.map *.c rom.addrs.ld *.fw *.fw.back *.c.back
+       rm -f ../../../utility/athfw2lnx/athfw2lnx
+
+init:  toolchain_prep
+       for i in $(DIRS) ; do $(MAKE) -C $$i init CC=$(XCC) LD=$(XLD) AR=$(XAR) ; done
+
+build: binary image
+
+binary:
+       if [ -d $(OUTPUT_DIR)/$(TGT_BUILD) ]; \
+       then cp -vf $(OUTPUT_DIR)/$(TGT_BUILD)/rom.$(TGT_BUILD).addrs.ld rom.addrs.ld; \
+       fi
+
+       $(XLD) $(PRJ_ROOT)/ram/init/obj/app_start.o $(PRJ_ROOT)/ram/init/obj/init.o $(PRJ_ROOT)/ram/init/obj/magpie.o $(LINKFLAGS_sw.ram) -Map $(PRJNAME).map -o $(PRJNAME).out
+
+toolchain_prep:
+ifeq ($(XTENSA_TOOL_INSTALLED),0)
+       @cd ../../../toolchain && \
+       (test -d tools) || tar xvzf toolchain.tgz
+
+endif
+
+image:
+       $(XOBJCOPY)                                             \
+               --change-section-lma .text-0x400000             \
+               --change-section-vma .text-0x400000             \
+               -O binary $(PRJNAME).out $(PRJNAME).bin
+       $(XOBJDUMP) -Dlxs $(PRJNAME).out > $(PRJNAME).objdump
+       rm -f ../../../utility/athfw2lnx/athfw2lnx
+       $(shell cp -f fwu.c fwu.c.back 2> /dev/null)
+       $(shell cp -f htc_7010.fw htc_7010.fw.back 2> /dev/null)
+       $(BIN2HEX) $(PRJNAME).bin fwu.c 0 usb
+       $(MAKE) -C ../../../utility/athfw2lnx ATH_FW=$(PRJ_ROOT)/image/magpie_ram/fwu.c
+       $(shell ../../../utility/athfw2lnx/athfw2lnx > htc_7010.fw)
+
+util:
+       @cd ../../../utility && $(MAKE) all
+
+util_clean:
+       @cd ../../../utility && $(MAKE) clean
diff --git a/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/merlin_fusion.ram b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/merlin_fusion.ram
new file mode 100755 (executable)
index 0000000..07bde75
--- /dev/null
@@ -0,0 +1,39 @@
+#!/bin/bash
+
+MAGPIE_ROOT=`pwd`/../../../../;export MAGPIE_ROOT
+PROJECT=magpie; export PROJECT
+TARGET=ram; export TARGET
+
+PRJ_ROOT=$MAGPIE_ROOT/build/magpie_1_1; export PRJ_ROOT
+PRJNAME=ram; export PRJNAME
+PRJPATH=$PRJ_ROOT/$PRJNAME; export PRJPATH
+PRJ_HPATH=$PRJPATH/inc; export PRJ_HPATH
+OUTPUT_DIR=$PRJ_ROOT/image/output; export OUTPUT_DIR
+
+XTENSA_TOOLS_INC=$XTENSA_TOOLS_ROOT/xtensa-elf/include
+
+HPATH=" -I$XTENSA_TOOLS_INC                            \
+        -I$PRJ_ROOT/inc                                \
+        -I$PRJ_ROOT/inc/$PROJECT                               \
+        -I$MAGPIE_ROOT/../wlan/include                 \
+        -I$MAGPIE_ROOT/../wlan/include/magpie           \
+        -I$MAGPIE_ROOT/../wlan/                         \
+       -I$MAGPIE_ROOT/target/cmnos/                    \
+       -I$MAGPIE_ROOT/target/wmi/                      \
+       -I$MAGPIE_ROOT/target/wlan/                     \
+       -I$MAGPIE_ROOT/target/inc                       \
+       -I$MAGPIE_ROOT/target/inc/OTUS                  \
+       -I$MAGPIE_ROOT/target/adf/                      \
+       -I$MAGPIE_ROOT/build/include";
+
+export HPATH
+
+LIB_PATH=$PRJ_ROOT/lib/ram; export LIB_PATH
+CROSS_COMPILE=$XTENSA_TOOLS_ROOT/bin; export CROSS_COMPILE
+TARGET_PREFIX=xt-; export TARGET_PREFIX
+
+ARCH=""; export ARCH
+DEFS=""; export DEFS
+CCOPTS=" -g -Os -Wunused-label -Wunused-variable -Wunused-value -Wpointer-arith -Wundef -nostdlib -Wundef"; export CCOPTS
+ASOPTS="-Wa, --fatal-warnings"; export ASOPTS
+DFLAGS="-DROM_VER_1_1 -D_ROM_1_1_ -D_RAM_ -DPROJECT_MAGPIE -DBIG_ENDIAN -D_BYTE_ORDER=_BIG_ENDIAN -DATH_STATS_ENABLE -D__XTENSA__ -DFUSION_USB_FW -DMAGPIE_MERLIN -DRX_SCATTER -DFUSION_USB_ENABLE_TX_STREAM -DFUSION_USB_ENABLE_RX_STREAM -DATH_ENABLE_CABQ"; export DFLAGS
diff --git a/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/target.ram.ld b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/target.ram.ld
new file mode 100755 (executable)
index 0000000..0da8315
--- /dev/null
@@ -0,0 +1,264 @@
+
+/* Linker script for Magpie RAM-based applications */
+
+/*
+Currently, ROM code reserves the first 8KB of RAM for its data/bss.
+The next 12KB or RAM is used for RAM software's literals and read-only data.
+After that comes 64KB reserved for RAM software's data and bss.
+Then 92KB of RAM is reserved for text (code).
+The last 8KB of RAM is reserved for ROM patches, customer DataSets,
+and RAM software expansion. (There is also some additional RAM between
+segments that can be used, if needed.)
+  ROM reserved: 0x00500000..0x00501fff
+  Literals:     0x00502000..0x00504fff
+  Data:         0x00505000..0x00514fff
+  Text:         0x00915000..0x0092bfff
+TBD: May want to use a 2-pass link approach in order to
+eliminate fixed boundaries.  Support for physical addressing
+in Tensilica tools would be helpful, but it's not coming
+any time soon.
+*/
+
+/* dram_seg: 0x504000, see target.rom.ld */
+
+/* ***** */
+MEMORY
+{
+ lit_seg :            org = 0x004E8000,   len = 0x1f600
+ iram_seg :           org = 0x00906000,   len = 0xad00
+ dram_seg :           org = 0x00510d00,   len = 0x6000
+}
+
+PHDRS
+{
+  lit_phdr PT_LOAD;
+  dram_phdr PT_LOAD;
+  iram_phdr PT_LOAD;
+}
+
+/*  Default entry point:  */
+ENTRY(app_start)
+
+SECTIONS
+{
+  /*
+   * This empty section is used to convince RAM linkage
+   * to share litbase with ROM code.
+   */
+  .lit4 (NOLOAD) :
+  {
+    _rom_literal_start = ABSOLUTE(.);
+    . += 0x19000; /* Reserved virtual space for physical mem gap and ROM */
+    _lit4_start = ABSOLUTE(.);
+    _lit4_end = ABSOLUTE(.);
+    _rom_literal_end = ABSOLUTE(.);
+  } >lit_seg :NONE
+
+  .dport0.rodata :
+  {
+    _dport0_rodata_start = ABSOLUTE(.); /* 0x505000 */
+    *(.dport0.rodata)
+    *(.dport.rodata)
+    _dport0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.literal :
+  {
+    _dport0_literal_start = ABSOLUTE(.);
+    *(.dport0.literal)
+    *(.dport.literal)
+    _dport0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.rodata :
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    *(.dram.rodata)
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .rodata :
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = ALIGN(4);              /* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_dport0_bss_start)
+    LONG(_dport0_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .literals :
+  {
+    _literals_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.gnu.linkonce.lit4.*)
+    _literals_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.literal :
+  {
+    _dram0_literal_start = ABSOLUTE(.);
+    *(.dram0.literal)
+    *(.dram.literal)
+    _dram0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.data :
+  {
+    _dport0_data_start = ABSOLUTE(.);
+    *(.dport0.data)
+    *(.dport.data)
+    _dport0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dport0.bss :
+  {
+    . = ALIGN (8);
+    _dport0_bss_start = ABSOLUTE(.);
+    *(.dport0.bss)
+    . = ALIGN (8);
+    _dport0_bss_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dram0.data :
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    *(.dram.data)
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+    *(.eh_frame)
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .bss :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.dram0.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+       _fw_image_end = ABSOLUTE(.);
+    /*_stack_sentry = ALIGN(0x8);*/
+  } >dram_seg :dram_phdr
+
+  .text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    *(.literal .text .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >iram_seg :iram_phdr
+
+  .iram0.text :
+  {
+    _iram0_text_start = ABSOLUTE(.);
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+    _iram0_text_end = ABSOLUTE(.);
+  } >iram_seg :iram_phdr
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+}
+
+INCLUDE "rom.addrs.ld"
+
diff --git a/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/target_gmac.ram.ld b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/magpie_ram/target_gmac.ram.ld
new file mode 100755 (executable)
index 0000000..43a5d97
--- /dev/null
@@ -0,0 +1,267 @@
+
+/* Linker script for Magpie RAM-based applications */
+
+/*
+Currently, ROM code reserves the first 8KB of RAM for its data/bss.
+The next 12KB or RAM is used for RAM software's literals and read-only data.
+After that comes 64KB reserved for RAM software's data and bss.
+Then 92KB of RAM is reserved for text (code).
+The last 8KB of RAM is reserved for ROM patches, customer DataSets,
+and RAM software expansion. (There is also some additional RAM between
+segments that can be used, if needed.)
+  ROM reserved: 0x00500000..0x00501fff
+  Literals:     0x00502000..0x00504fff
+  Data:         0x00505000..0x00514fff
+  Text:         0x00915000..0x0092bfff
+TBD: May want to use a 2-pass link approach in order to
+eliminate fixed boundaries.  Support for physical addressing
+in Tensilica tools would be helpful, but it's not coming
+any time soon.
+*/
+
+/* dram_seg: 0x504000, see target.rom.ld */
+
+/* ***** */
+ /*lit_seg :            org = 0x00508000,   len = 0x9000 
+ iram_seg :           org = 0x00911000,   len = 0xb000
+ dram_seg :           org = 0x0051c000,   len = 0x6000 */
+MEMORY
+{
+ lit_seg :            org = 0x004E8000,   len = 0x1E600
+ iram_seg :           org = 0x00906600,   len = 0x9500
+ dram_seg :           org = 0x0050FB00,   len = 0x6000
+}
+
+PHDRS
+{
+  lit_phdr PT_LOAD;
+  dram_phdr PT_LOAD;
+  iram_phdr PT_LOAD;
+}
+
+/*  Default entry point:  */
+ENTRY(app_start)
+
+SECTIONS
+{
+  /*
+   * This empty section is used to convince RAM linkage
+   * to share litbase with ROM code.
+   */
+  .lit4 (NOLOAD) :
+  {
+    _rom_literal_start = ABSOLUTE(.);
+    . += 0x1a600; /* Reserved virtual space for physical mem gap and ROM */
+    _lit4_start = ABSOLUTE(.);
+    _lit4_end = ABSOLUTE(.);
+    _rom_literal_end = ABSOLUTE(.);
+  } >lit_seg :NONE
+
+  .dport0.rodata :
+  {
+    _dport0_rodata_start = ABSOLUTE(.); /* 0x505000 */
+    *(.dport0.rodata)
+    *(.dport.rodata)
+    _dport0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.literal :
+  {
+    _dport0_literal_start = ABSOLUTE(.);
+    *(.dport0.literal)
+    *(.dport.literal)
+    _dport0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.rodata :
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    *(.dram.rodata)
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .rodata :
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    *(.xt_except_table)
+    *(.gcc_except_table)
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    . = ALIGN(4);              /* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_dport0_bss_start)
+    LONG(_dport0_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    _rodata_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .literals :
+  {
+    _literals_start = ABSOLUTE(.);
+    *(*.lit4)
+    *(.gnu.linkonce.lit4.*)
+    _literals_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dram0.literal :
+  {
+    _dram0_literal_start = ABSOLUTE(.);
+    *(.dram0.literal)
+    *(.dram.literal)
+    _dram0_literal_end = ABSOLUTE(.);
+  } >lit_seg :lit_phdr
+
+  .dport0.data :
+  {
+    _dport0_data_start = ABSOLUTE(.);
+    *(.dport0.data)
+    *(.dport.data)
+    _dport0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dport0.bss :
+  {
+    . = ALIGN (8);
+    _dport0_bss_start = ABSOLUTE(.);
+    *(.dport0.bss)
+    . = ALIGN (8);
+    _dport0_bss_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .dram0.data :
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    *(.dram.data)
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .data :
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *(.jcr)
+    *(.eh_frame)
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    _data_end = ABSOLUTE(.);
+  } >dram_seg :dram_phdr
+
+  .bss :
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.dram0.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+       _fw_image_end = ABSOLUTE(.);
+    /*_stack_sentry = ALIGN(0x8);*/
+  } >dram_seg :dram_phdr
+
+  .text :
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    *(.literal .text .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >iram_seg :iram_phdr
+
+  .iram0.text :
+  {
+    _iram0_text_start = ABSOLUTE(.);
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+    _iram0_text_end = ABSOLUTE(.);
+  } >iram_seg :iram_phdr
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+}
+
+INCLUDE "rom.addrs.ld"
+
diff --git a/target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.addrs.ld b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.addrs.ld
new file mode 100755 (executable)
index 0000000..a54a98e
--- /dev/null
@@ -0,0 +1,74 @@
+PROVIDE ( _indir_tbl = 0x00500000 );
+PROVIDE ( memcpy = 0x008e6b64 );
+PROVIDE ( memset = 0x008e6e48 );
+PROVIDE ( __divsi3 = 0x008e6998 );
+PROVIDE ( __udivsi3 = 0x008e6a4c );
+PROVIDE ( __umodsi3 = 0x008e6a9c );
+PROVIDE ( __modsi3 = 0x008e6a00 );
+PROVIDE ( athos_interrupt_init = 0x008e1614 );
+PROVIDE ( athos_unblock_all_intrlvl = 0x008e1460 );
+PROVIDE ( athos_interrupt_handler = 0x008e1604 );
+PROVIDE ( _xtos_set_interrupt_handler = 0x008e1230 );
+PROVIDE ( generic_hif_module_install = 0x008e1548 );
+PROVIDE ( htc_module_install = 0x008e54a8 );
+PROVIDE ( buf_pool_module_install = 0x008e6264 );
+PROVIDE ( vbuf_module_install = 0x008e4f60 );
+PROVIDE ( vdesc_module_install = 0x008e5010 );
+PROVIDE ( strcmp = 0x008e6560 );
+PROVIDE ( strlen = 0x008e6710 );
+PROVIDE ( strcpy = 0x008e6678 );
+PROVIDE ( strncpy = 0x008e683c );
+PROVIDE ( Xthal_num_ccompare = 0x004e87f9 );
+PROVIDE ( cticks = 0x0050095c );
+PROVIDE ( UsbDeviceDescriptor = 0x004e0100 );
+PROVIDE ( String00Descriptor = 0x004e01a0 );
+PROVIDE ( String10Descriptor = 0x004e01b0 );
+PROVIDE ( String20Descriptor = 0x004e01c0 );
+PROVIDE ( String30Descriptor = 0x004e01e0 );
+PROVIDE ( HIFusb_DescTraceDump = 0x008e37e8 );
+PROVIDE ( xthal_get_intenable = 0x008e6980 );
+PROVIDE ( xthal_set_intenable = 0x008e6990 );
+PROVIDE ( xthal_get_interrupt = 0x008e6988 );
+PROVIDE ( xthal_get_ccompare = 0x008e6970 );
+PROVIDE ( xthal_set_ccompare = 0x008e6960 );
+PROVIDE ( xthal_get_ccount = 0x008e6958 );
+PROVIDE ( Xthal_num_ccompare = 0x004e87f9 );
+PROVIDE ( zfDmaReclaimPacket = 0x008e5d2c );
+PROVIDE ( zfDmaPutPacket = 0x008e5dc0 );
+PROVIDE ( zfDmaGetPacket = 0x008e5cf0 );
+PROVIDE ( fwd_init = 0x008e5e78 );
+PROVIDE ( usbFifoConf = 0x00500aa4 );
+PROVIDE ( _HIFusb_isr_handler = 0x008e36e4 );
+PROVIDE ( mUsbFIFOConfig = 0x008e4934 );
+PROVIDE ( mUsbEPMxPtSzHigh = 0x008e4954 );
+PROVIDE ( mUsbEPMxPtSzLow = 0x008e497c );
+PROVIDE ( mUsbEPinHighBandSet = 0x008e49a0 );
+PROVIDE ( mUsbFIFOConfig = 0x008e4934 );
+PROVIDE ( mUsbFIFOMap = 0x008e4914 );
+PROVIDE ( mUsbEPMap = 0x008e48f8 );
+PROVIDE ( u8UsbInterfaceValue = 0x00500ad0 );
+PROVIDE ( u8UsbConfigValue = 0x00500ace );
+PROVIDE ( u8UsbInterfaceAlternateSetting = 0x00500ad2 );
+PROVIDE ( ControlCmd = 0x00500a98 );
+PROVIDE ( vUsbFIFO_EPxCfg_HS = 0x008e49ec );
+PROVIDE ( vUsbClrEPx = 0x008e38d0 );
+PROVIDE ( bSet_configuration = 0x008e3b54 );
+PROVIDE ( eUsbCxFinishAction = 0x00500ac4 );
+PROVIDE ( pci_sc = 0x00500708 );
+PROVIDE ( __pci_reap_recv = 0x008e31e8 );
+PROVIDE ( __pci_reap_xmitted = 0x008e31bc );
+PROVIDE ( _HIFusb_start = 0x008e34a0 );
+PROVIDE ( g_hifUSBCtx = 0x00500a54 );
+PROVIDE ( _HIFusb_return_recv_buf = 0x008e367c );
+PROVIDE ( athos_indirection_table_install = 0x008e1574 );
+PROVIDE ( u8ConfigDescriptorEX = 0x00500ac0 );
+PROVIDE ( bStandardCommand = 0x008e3e64 );
+PROVIDE ( u16TxRxCounter = 0x00500abc );
+PROVIDE ( pu8DescriptorEX = 0x00500ab8 );
+PROVIDE ( bGet_descriptor = 0x008e3a9c );
+PROVIDE ( _xtos_set_exception_handler = 0x008e6348 );
+PROVIDE (HTCMsgRecvHandler = 0x008e581c);
+PROVIDE (HTCControlSvcProcessMsg = 0x008e56f4);
+PROVIDE (HTCFreeMsgBuffer = 0x008e54ec);
+PROVIDE ( u8UsbDeviceDescriptor = 0x00500ad8 );
+
diff --git a/target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.bin b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.bin
new file mode 100755 (executable)
index 0000000..f5e50fc
Binary files /dev/null and b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.bin differ
diff --git a/target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.hex b/target_firmware/magpie_fw_dev/build/magpie_1_1/image/output/asic/rom.asic.hex
new file mode 100755 (executable)
index 0000000..fc9920b
--- /dev/null
@@ -0,0 +1,9238 @@
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