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[linux-libre-firmware.git] / ath9k_htc / local / patches / gcc.patch
1 From c7162b8a3db42e7faf47606d3aa3dd61e64aea17 Mon Sep 17 00:00:00 2001
2 From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
3 Date: Mon, 7 Jan 2013 16:06:28 +0530
4 Subject: [PATCH] gcc: AR9271/AR7010 config
5
6 Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
7 ---
8  include/xtensa-config.h | 36 +++++++++++++++++-------------------
9  1 file changed, 17 insertions(+), 19 deletions(-)
10
11 diff --git a/include/xtensa-config.h b/include/xtensa-config.h
12 index 30f4f41..fe9b051 100644
13 --- a/include/xtensa-config.h
14 +++ b/include/xtensa-config.h
15 @@ -1,7 +1,7 @@
16  /* Xtensa configuration settings.
17 -   Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010
18 +   Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007
19     Free Software Foundation, Inc.
20 -   Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica.
21 +   Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
22  
23     This program is free software; you can redistribute it and/or modify
24     it under the terms of the GNU General Public License as published by
25 @@ -44,10 +44,7 @@
26  #define XCHAL_HAVE_L32R                        1
27  
28  #undef XSHAL_USE_ABSOLUTE_LITERALS
29 -#define XSHAL_USE_ABSOLUTE_LITERALS    0
30 -
31 -#undef XSHAL_HAVE_TEXT_SECTION_LITERALS
32 -#define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals.  */
33 +#define XSHAL_USE_ABSOLUTE_LITERALS    1
34  
35  #undef XCHAL_HAVE_MAC16
36  #define XCHAL_HAVE_MAC16               0
37 @@ -59,10 +56,10 @@
38  #define XCHAL_HAVE_MUL32               1
39  
40  #undef XCHAL_HAVE_MUL32_HIGH
41 -#define XCHAL_HAVE_MUL32_HIGH          0
42 +#define XCHAL_HAVE_MUL32_HIGH          1
43  
44  #undef XCHAL_HAVE_DIV32
45 -#define XCHAL_HAVE_DIV32               1
46 +#define XCHAL_HAVE_DIV32               0
47  
48  #undef XCHAL_HAVE_NSA
49  #define XCHAL_HAVE_NSA                 1
50 @@ -103,8 +100,6 @@
51  #undef XCHAL_HAVE_FP_RSQRT
52  #define XCHAL_HAVE_FP_RSQRT            0
53  
54 -#undef XCHAL_HAVE_DFP_accel
55 -#define XCHAL_HAVE_DFP_accel                   0
56  #undef XCHAL_HAVE_WINDOWED
57  #define XCHAL_HAVE_WINDOWED            1
58  
59 @@ -119,32 +114,32 @@
60  
61  
62  #undef XCHAL_ICACHE_SIZE
63 -#define XCHAL_ICACHE_SIZE              16384
64 +#define XCHAL_ICACHE_SIZE              0
65  
66  #undef XCHAL_DCACHE_SIZE
67 -#define XCHAL_DCACHE_SIZE              16384
68 +#define XCHAL_DCACHE_SIZE              0
69  
70  #undef XCHAL_ICACHE_LINESIZE
71 -#define XCHAL_ICACHE_LINESIZE          32
72 +#define XCHAL_ICACHE_LINESIZE          16
73  
74  #undef XCHAL_DCACHE_LINESIZE
75 -#define XCHAL_DCACHE_LINESIZE          32
76 +#define XCHAL_DCACHE_LINESIZE          16
77  
78  #undef XCHAL_ICACHE_LINEWIDTH
79 -#define XCHAL_ICACHE_LINEWIDTH         5
80 +#define XCHAL_ICACHE_LINEWIDTH         4
81  
82  #undef XCHAL_DCACHE_LINEWIDTH
83 -#define XCHAL_DCACHE_LINEWIDTH         5
84 +#define XCHAL_DCACHE_LINEWIDTH         4
85  
86  #undef XCHAL_DCACHE_IS_WRITEBACK
87 -#define XCHAL_DCACHE_IS_WRITEBACK      1
88 +#define XCHAL_DCACHE_IS_WRITEBACK      0
89  
90  
91  #undef XCHAL_HAVE_MMU
92  #define XCHAL_HAVE_MMU                 1
93  
94  #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
95 -#define XCHAL_MMU_MIN_PTE_PAGE_SIZE    12
96 +#define XCHAL_MMU_MIN_PTE_PAGE_SIZE    29
97  
98  
99  #undef XCHAL_HAVE_DEBUG
100 @@ -157,8 +152,11 @@
101  #define XCHAL_NUM_DBREAK               2
102  
103  #undef XCHAL_DEBUGLEVEL
104 -#define XCHAL_DEBUGLEVEL               6
105 +#define XCHAL_DEBUGLEVEL               4
106 +
107  
108 +#undef XCHAL_EXCM_LEVEL
109 +#define XCHAL_EXCM_LEVEL                3
110  
111  #undef XCHAL_MAX_INSTRUCTION_SIZE
112  #define XCHAL_MAX_INSTRUCTION_SIZE     3
113 -- 
114 1.8.1
115