Merge pull request #38 from olerem/next
authorAdrian Chadd <adrian.chadd@gmail.com>
Fri, 23 Aug 2013 07:48:04 +0000 (00:48 -0700)
committerAdrian Chadd <adrian.chadd@gmail.com>
Fri, 23 Aug 2013 07:48:04 +0000 (00:48 -0700)
Fixes for reboot issues

docs/atheros_ar7010.png [new file with mode: 0755]
docs/atheros_ar7010.svg [new file with mode: 0755]
docs/atheros_ar9271.png [new file with mode: 0755]
docs/atheros_ar9271.svg [new file with mode: 0755]
target_firmware/magpie_fw_dev/build/k2_1_0/image/k2_ram/rom.addrs.ld
target_firmware/magpie_fw_dev/target/hif/k2_fw_usb_api.c
target_firmware/magpie_fw_dev/target/init/app_start.c
target_firmware/magpie_fw_dev/target/rompatch/usb_api_patch.c
target_firmware/rom-addrs-k2.ld
target_firmware/wlan/if_ath.c

diff --git a/docs/atheros_ar7010.png b/docs/atheros_ar7010.png
new file mode 100755 (executable)
index 0000000..d6615c7
Binary files /dev/null and b/docs/atheros_ar7010.png differ
diff --git a/docs/atheros_ar7010.svg b/docs/atheros_ar7010.svg
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index 0000000..2af86f1
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index 936d4d43b789d8e27f09116f91abc16bb7b6185b..0a118fa1e2f9bed49061547ccf9903ade7942893 100755 (executable)
@@ -67,3 +67,4 @@ PROVIDE ( _HIFusb_isr_handler = 0x008e2b58 );
 PROVIDE ( bGet_descriptor = 0x008e2ec4 );
 PROVIDE ( u8ConfigDescriptorEX = 0x005009e8 );
 PROVIDE ( bStandardCommand = 0x008e328c );
+PROVIDE ( u8UsbDeviceDescriptor = 0x00500a00 );
index 47aa3804c87df0c5134f96f3cadabe2e5c41cd7e..7d4c4fff0576f0083b557ad2c085e3af1ed773eb 100755 (executable)
@@ -144,7 +144,7 @@ void _fw_usb_suspend_reboot()
                 
                //set all GPIO to input
         gpio_in = HAL_WORD_REG_READ(0x1000404c);
-        HAL_WORD_REG_WRITE(0x100404c, 0x0);
+        HAL_WORD_REG_WRITE(0x1000404c, 0x0);
                 
                //set PU/PD for all GPIO except two UART pins
         pupd = HAL_WORD_REG_READ(0x10004088);
@@ -197,6 +197,7 @@ void _fw_usb_suspend_reboot()
         HAL_WORD_REG_WRITE( MAGPIE_REG_RST_PWDN_CTRL_ADDR, (BIT1) );
         HAL_WORD_REG_WRITE( MAGPIE_REG_RST_PWDN_CTRL_ADDR, (HAL_WORD_REG_READ(MAGPIE_REG_RST_PWDN_CTRL_ADDR)|BIT0));
         HAL_WORD_REG_WRITE( MAGPIE_REG_RST_PWDN_CTRL_ADDR, 0x0 );
+       A_DELAY_USECS(1000);
     }
 
     //A_PRINTF("reg(0x10020)=(%x)\n", HAL_WORD_REG_READ(0x10020));
@@ -353,7 +354,7 @@ void _fw_usb_reset_fifo(void)
     volatile uint32_t   *reg_data;
 
     HAL_BYTE_REG_WRITE(0x100ae, (HAL_BYTE_REG_READ(0x100ae)|0x10));
-    HAL_BYTE_REG_WRITE(0x100ae, (HAL_BYTE_REG_READ(0x100af)|0x10));
+    HAL_BYTE_REG_WRITE(0x100af, (HAL_BYTE_REG_READ(0x100af)|0x10));
 
     // disable ep3 int enable, so that resume back won't send wdt magic pattern out!!!
     mUSB_STATUS_IN_INT_DISABLE();
@@ -401,6 +402,17 @@ void _fw_usb_reset_fifo(void)
     A_UART_HWINIT((22*1000*1000), 19200);
 }
 
+void cold_reboot(void)
+{
+       A_PRINTF("Cold reboot initiated.");
+#if defined(PROJECT_MAGPIE)
+       HAL_WORD_REG_WRITE(WATCH_DOG_MAGIC_PATTERN_ADDR, 0);
+#elif defined(PROJECT_K2)
+       HAL_WORD_REG_WRITE(MAGPIE_REG_RST_STATUS_ADDR, 0);
+#endif /* #if defined(PROJECT_MAGPIE) */
+       A_USB_JUMP_BOOT();
+}
+
 /*
  * -- support more than 64 bytes command on ep4 -- 
  */
@@ -417,6 +429,10 @@ void vUsb_Reg_Out_patch(void)
 
     // get the size of this transcation
     usbfifolen = USB_BYTE_REG_READ(ZM_EP4_BYTE_COUNT_LOW_OFFSET);
+    if (usbfifolen > 0x40) {
+        A_PRINTF("EP4 FIFO Bug? Buffer is too big: %x\n", usbfifolen);
+        cold_reboot();
+    }
 
     // check is command is new
     if( cmd_is_new ){
@@ -447,6 +463,11 @@ void vUsb_Reg_Out_patch(void)
     
     // accumulate the size
     cmdLen += usbfifolen;
+    if (cmdLen > buf->desc_list->buf_size) {
+        A_PRINTF("Data length on EP4 FIFO is bigger as allocated buffer data!"
+                 " Drop it!\n");
+        goto ERR;
+    }
     
     // round it to alignment
     if(usbfifolen % 4)
@@ -694,13 +715,18 @@ ERR_DONE:
     ;
 }
 
+extern uint16_t *u8UsbDeviceDescriptor;
 extern uint16_t *u8ConfigDescriptorEX;
 extern uint16_t *pu8DescriptorEX;
 extern uint16_t u16TxRxCounter;
 extern BOOLEAN bGet_descriptor(void);
 
+uint16_t DeviceDescriptorPatch[9];
 uint16_t ConfigDescriptorPatch[30];
 
+
+#define BCD_DEVICE                 6
+#define BCD_DEVICE_FW_SIGNATURE            0xffff
 #define EP3_TRANSFER_TYPE_OFFSET    17
 #define EP3_INT_INTERVAL            19
 #define EP4_TRANSFER_TYPE_OFFSET    21
@@ -708,19 +734,23 @@ uint16_t ConfigDescriptorPatch[30];
 
 BOOLEAN bGet_descriptor_patch(void)
 {
-    if (mDEV_REQ_VALUE_HIGH() == 2) {
-        uint8_t *p = (uint8_t *)u8ConfigDescriptorEX;
+    int i;
+    switch (mDEV_REQ_VALUE_HIGH()) {
+    case 1:
+        ath_hal_memcpy(DeviceDescriptorPatch,
+            u8UsbDeviceDescriptor, sizeof(DeviceDescriptorPatch));
 
-        /* Copy ConfigDescriptor */
-       ath_hal_memcpy(ConfigDescriptorPatch, p, sizeof(ConfigDescriptorPatch));
+        DeviceDescriptorPatch[BCD_DEVICE] = BCD_DEVICE_FW_SIGNATURE;
 
-        p = (uint8_t *)ConfigDescriptorPatch;
+        pu8DescriptorEX = DeviceDescriptorPatch;
+        u16TxRxCounter = mTABLE_LEN(DeviceDescriptorPatch[0]);
+        break;
+    case 2:
+        /* Copy ConfigDescriptor */
+       ath_hal_memcpy(ConfigDescriptorPatch,
+            u8ConfigDescriptorEX, sizeof(ConfigDescriptorPatch));
 
-        /* Patch the transfer type of EP3 and EP4 */
-        ConfigDescriptorPatch[EP3_TRANSFER_TYPE_OFFSET] = 0x0283;
-        ConfigDescriptorPatch[EP3_INT_INTERVAL] = 0x0700;
-        ConfigDescriptorPatch[EP4_TRANSFER_TYPE_OFFSET] = 0x4002;
-        ConfigDescriptorPatch[EP4_INT_INTERVAL] = 0x00;
+       /* place holder for EPx patches */
 
         switch (mDEV_REQ_VALUE_LOW())
         {
@@ -732,16 +762,16 @@ BOOLEAN bGet_descriptor_patch(void)
         default:
             return FALSE;
         }
-
-        if (u16TxRxCounter > mDEV_REQ_LENGTH())
-            u16TxRxCounter = mDEV_REQ_LENGTH();
-
-        A_USB_EP0_TX_DATA();
-        return TRUE;
-    }
-    else {
+        break;
+    default:
         return bGet_descriptor();
     }
+
+    if (u16TxRxCounter > mDEV_REQ_LENGTH())
+        u16TxRxCounter = mDEV_REQ_LENGTH();
+
+    A_USB_EP0_TX_DATA();
+    return TRUE;
 }
 
 extern BOOLEAN bStandardCommand(void);
index 136f966dfe8fd3fd4e04a7fd35f3139f85eb08c2..4b551521478b1ef15fe56bf85b17ec1d1bc7a754 100644 (file)
@@ -209,7 +209,8 @@ void app_start()
 
 #ifdef FUSION_USB_ENABLE_TX_STREAM
                // For K2, enable tx stream mode
-               A_PRINTF("Enable Tx Stream mode\r\n");
+               A_PRINTF("Enable Tx Stream mode: 0x%x\r\n",
+                       USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET));
 
                // Patch for K2 USB STREAM mode
                USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
@@ -266,6 +267,8 @@ void app_start()
        else if (hostif == HIF_PCI )
                hif_pci_patch_install(&_indir_tbl.hif);
 #endif
+               A_PRINTF("USB mode: 0x%x\r\n",
+                       USB_WORD_REG_READ(0x100));
 
        // patch the clock function
        if(1) {
index d9a394dedbefb0d670f6ba95482690e5cb8de6fc..542a715dbe021e77c53fdae41f12102a07bce498 100755 (executable)
@@ -749,9 +749,11 @@ extern BOOLEAN bGet_descriptor(void);
 
 uint16_t ConfigDescriptorPatch[30];
 
- uint16_t UsbDeviceDescriptorPatch[18];
- #define VENDOR_ID_OFFSET           8
- #define PRODUCT_ID_OFFSET          10
+uint16_t UsbDeviceDescriptorPatch[9];
+#define BCD_DEVICE_OFFSET              6
+#define BCD_DEVICE_FW_SIGNATURE                0xffff
+#define VENDOR_ID_OFFSET               4
+#define PRODUCT_ID_OFFSET              5
 
 #define EP3_TRANSFER_TYPE_OFFSET    17
 #define EP3_INT_INTERVAL            19
@@ -785,17 +787,25 @@ uint16_t ConfigDescriptorPatch[30];
  
 BOOLEAN bGet_descriptor_patch(void)
 {
-       /* Patch for custom id from flash */
-       if (bEepromExist == FALSE && mDEV_REQ_VALUE_HIGH() == 1)
+       if (mDEV_REQ_VALUE_HIGH() == 1)
        {
                uint8_t *p = (uint8_t *)u8UsbDeviceDescriptor;
                uint32_t u32Tmp=0;
                /* Copy Usb Device Descriptor */
                ath_hal_memcpy(UsbDeviceDescriptorPatch, p, sizeof(UsbDeviceDescriptorPatch));
 
-               A_SFLASH_READ_4B(u32Tmp, FLASH_SIZE - EE_DATA_RESERVED_LEN + FLASH_USB_VENDOR_ID_OFFSET*2);
-               UsbDeviceDescriptorPatch[VENDOR_ID_OFFSET] = mSWAP_BYTE(mLOW_WORD0(u32Tmp));
-               UsbDeviceDescriptorPatch[PRODUCT_ID_OFFSET] = mSWAP_BYTE(mHIGH_WORD0(u32Tmp));             
+               UsbDeviceDescriptorPatch[BCD_DEVICE_OFFSET] =
+                       BCD_DEVICE_FW_SIGNATURE;
+
+               /* Patch for custom id from flash */
+               if (bEepromExist == FALSE) {
+                       A_SFLASH_READ_4B(u32Tmp, FLASH_SIZE -
+                               EE_DATA_RESERVED_LEN + FLASH_USB_VENDOR_ID_OFFSET*2);
+                       UsbDeviceDescriptorPatch[VENDOR_ID_OFFSET] =
+                               mSWAP_BYTE(mLOW_WORD0(u32Tmp));
+                       UsbDeviceDescriptorPatch[PRODUCT_ID_OFFSET] =
+                               mSWAP_BYTE(mHIGH_WORD0(u32Tmp));
+               }
       
                pu8DescriptorEX = UsbDeviceDescriptorPatch;
                u16TxRxCounter = mTABLE_LEN(u8UsbDeviceDescriptor[0]);
@@ -814,13 +824,7 @@ BOOLEAN bGet_descriptor_patch(void)
                /* Copy ConfigDescriptor */
                ath_hal_memcpy(ConfigDescriptorPatch, p, sizeof(ConfigDescriptorPatch));
 
-               p = (uint8_t *)ConfigDescriptorPatch;
-
-               /* Patch the transfer type of EP3 and EP4 */
-               ConfigDescriptorPatch[EP3_TRANSFER_TYPE_OFFSET] = 0x0283;
-               ConfigDescriptorPatch[EP3_INT_INTERVAL] = 0x0700;
-               ConfigDescriptorPatch[EP4_TRANSFER_TYPE_OFFSET] = 0x4002;
-               ConfigDescriptorPatch[EP4_INT_INTERVAL] = 0x00;
+                /* place holder for EPx patches */
 
                switch (mDEV_REQ_VALUE_LOW())
                {
index 936d4d43b789d8e27f09116f91abc16bb7b6185b..0a118fa1e2f9bed49061547ccf9903ade7942893 100755 (executable)
@@ -67,3 +67,4 @@ PROVIDE ( _HIFusb_isr_handler = 0x008e2b58 );
 PROVIDE ( bGet_descriptor = 0x008e2ec4 );
 PROVIDE ( u8ConfigDescriptorEX = 0x005009e8 );
 PROVIDE ( bStandardCommand = 0x008e328c );
+PROVIDE ( u8UsbDeviceDescriptor = 0x00500a00 );
index fcbe9c3cd3631a3800ecf9f24a623fc528f43567..896e72b56ff8506d7658e27937150d8f04cb38af 100755 (executable)
@@ -1425,10 +1425,7 @@ static void ath_hal_reg_write_tgt(void *Context, A_UINT16 Command,
                t = (struct registerWrite *)(data+i);
 
                if( t->reg > 0xffff ) {
-                       a_uint32_t *pReg = (a_uint32_t *)t->reg;
-
-                       *pReg = t->val;
-
+                       HAL_WORD_REG_WRITE(t->reg, t->val);
 #if defined(PROJECT_K2)
                        if( t->reg == 0x50040 ) {
                                static uint8_t flg=0;
@@ -1444,20 +1441,19 @@ static void ath_hal_reg_write_tgt(void *Context, A_UINT16 Command,
 #if defined(PROJECT_K2)
                        if( t->reg == 0x7014 ) {
                                static uint8_t resetPLL = 0;
-                               a_uint32_t *pReg;
 
                                if( resetPLL == 0 ) {
-                                       t->reg = 0x50044;
-                                       pReg = (a_uint32_t *)t->reg;
-                                       *pReg = 0;
+                                       /* here we write to core register */
+                                       HAL_WORD_REG_WRITE(MAGPIE_REG_RST_PWDN_CTRL_ADDR, 0x0);
+                                       /* and here to mac register */
                                        ath_hal_reg_write_target(ah, 0x786c,
                                                 ath_hal_reg_read_target(ah,0x786c) | 0x6000000);
                                        ath_hal_reg_write_target(ah, 0x786c,
                                                 ath_hal_reg_read_target(ah,0x786c) & (~0x6000000));
-                                       *pReg = 0x20;
+
+                                       HAL_WORD_REG_WRITE(MAGPIE_REG_RST_PWDN_CTRL_ADDR, 0x20);
                                        resetPLL = 1;
                                }
-                               t->reg = 0x7014;
                        }
 #elif defined(PROJECT_MAGPIE) && !defined (FPGA)
                        if( t->reg == 0x7014 ){