#include <asf_bitmap.h>
extern struct ath_hal *ar5416Attach(a_uint32_t devid,HAL_SOFTC sc, adf_os_device_t dev,
- HAL_BUS_HANDLE sh, a_uint32_t flags, HAL_STATUS *status);
+ a_uint32_t flags, HAL_STATUS *status);
struct ath_hal*
ath_hal_attach_tgt(a_uint32_t devid,HAL_SOFTC sc,
- adf_os_device_t dev, HAL_BUS_HANDLE sh,
+ adf_os_device_t dev,
a_uint32_t flags, HAL_STATUS *error)
{
struct ath_hal *ah = AH_NULL;
devid = AR5416_DEVID_PCIE;
- ah = ar5416Attach(devid, sc, dev, sh, flags, error);
+ ah = ar5416Attach(devid, sc, dev, flags, error);
return ah;
}
{
a_uint32_t ah_magic;
HAL_SOFTC ah_sc;
- HAL_BUS_HANDLE ah_sh;
adf_os_device_t ah_dev;
a_uint32_t ah_macVersion;
HAL_BOOL __ahdecl(*ah_abortTxDma)(struct ath_hal *);
void __ahdecl(*ah_set11nTxDesc)(struct ath_hal *ah,
- struct ath_desc *ds,
+ struct ath_tx_desc *ds,
a_uint32_t pktLen, HAL_PKT_TYPE type,
a_uint32_t txPower, a_uint32_t keyIx,
HAL_KEY_TYPE keyType,
a_uint32_t flags);
void __ahdecl(*ah_set11nRateScenario)(struct ath_hal *ah,
- struct ath_desc *ds,
+ struct ath_tx_desc *ds,
a_uint32_t durUpdateEn,
a_uint32_t rtsctsRate,
a_uint32_t rtsctsDuration,
HAL_11N_RATE_SERIES series[],
a_uint32_t nseries, a_uint32_t flags);
void __ahdecl(*ah_set11nAggrFirst)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t aggrLen,
+ struct ath_tx_desc *ds, a_uint32_t aggrLen,
a_uint32_t numDelims);
void __ahdecl(*ah_set11nAggrMiddle)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t numDelims);
+ struct ath_tx_desc *ds, a_uint32_t numDelims);
void __ahdecl(*ah_set11nAggrLast)(struct ath_hal *ah,
- struct ath_desc *ds);
+ struct ath_tx_desc *ds);
void __ahdecl(*ah_clr11nAggr)(struct ath_hal *ah,
- struct ath_desc *ds);
+ struct ath_tx_desc *ds);
void __ahdecl(*ah_set11nBurstDuration)(struct ath_hal *ah,
- struct ath_desc *ds,
+ struct ath_tx_desc *ds,
a_uint32_t burstDuration);
void __ahdecl(*ah_set11nVirtualMoreFrag)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t vmf);
+ struct ath_tx_desc *ds, a_uint32_t vmf);
- HAL_BOOL __ahdecl(*ah_setupTxDesc)(struct ath_hal *, struct ath_desc *,
+ HAL_BOOL __ahdecl(*ah_setupTxDesc)(struct ath_hal *, struct ath_tx_desc *,
a_uint32_t pktLen, a_uint32_t hdrLen,
HAL_PKT_TYPE type, a_uint32_t txPower,
a_uint32_t txRate0, a_uint32_t txTries0,
a_uint32_t rtsctsRate, a_uint32_t rtsctsDuration,
a_uint32_t compicvLen, a_uint32_t compivLen,
a_uint32_t comp);
- HAL_BOOL __ahdecl(*ah_fillTxDesc)(struct ath_hal *, struct ath_desc *,
+ HAL_BOOL __ahdecl(*ah_fillTxDesc)(struct ath_hal *, struct ath_tx_desc *,
a_uint32_t segLen, HAL_BOOL firstSeg,
- HAL_BOOL lastSeg, const struct ath_desc *);
- HAL_BOOL __ahdecl (*ah_fillKeyTxDesc) (struct ath_hal *, struct ath_desc *, HAL_KEY_TYPE);
- HAL_STATUS __ahdecl(*ah_procTxDesc)(struct ath_hal *, struct ath_desc*);
+ HAL_BOOL lastSeg, const struct ath_tx_desc *);
+ HAL_BOOL __ahdecl (*ah_fillKeyTxDesc) (struct ath_hal *, struct ath_tx_desc *, HAL_KEY_TYPE);
+ HAL_STATUS __ahdecl(*ah_procTxDesc)(struct ath_hal *, struct ath_tx_desc *);
void __ahdecl(*ah_getTxIntrQueue)(struct ath_hal *, a_uint32_t *);
void __ahdecl(*ah_reqTxIntrDesc)(struct ath_hal *, struct ath_desc*);
HAL_BOOL __ahdecl(*ah_setBssIdMask)(struct ath_hal *, const a_uint8_t*);
extern struct ath_hal * __ahdecl ath_hal_attach_tgt(a_uint32_t devid, HAL_SOFTC,
- adf_os_device_t dev, HAL_BUS_HANDLE sh,
+ adf_os_device_t dev,
a_uint32_t flags, HAL_STATUS* status);
extern const HAL_RATE_TABLE * __ahdecl ath_hal_getratetable(struct ath_hal *,
struct ath_hal *
_ath_hal_attach_tgt(a_uint32_t devid, HAL_SOFTC sc,
- adf_os_device_t dev,HAL_BUS_HANDLE sh, a_uint32_t flags, void* s)
+ adf_os_device_t dev, a_uint32_t flags, void* s)
{
HAL_STATUS status;
- struct ath_hal *ah = ath_hal_attach_tgt(devid,sc,dev,sh, flags, &status);
+ struct ath_hal *ah = ath_hal_attach_tgt(devid, sc, dev, flags, &status);
adf_os_print(" ath_hal = %p \n",ah);
*(HAL_STATUS *)s = status;
return ah;
extern a_uint32_t __ahdecl ath_hal_reg_read_target(struct ath_hal *ah, a_uint32_t reg);
#define AH_USE_EEPROM 0x00000001
-extern struct ath_hal *_ath_hal_attach_tgt( a_uint32_t,HAL_SOFTC,adf_os_device_t,HAL_BUS_HANDLE,
+extern struct ath_hal *_ath_hal_attach_tgt( a_uint32_t, HAL_SOFTC, adf_os_device_t,
a_uint32_t flags, void* status);
extern void ath_hal_detach(struct ath_hal *);
#endif /* _ATH_AH_OSDEP_H_ */
struct ath_hal *
ar5416Attach(a_uint32_t devid,HAL_SOFTC sc, adf_os_device_t dev,
- HAL_BUS_HANDLE sh, a_uint32_t flags, HAL_STATUS *status)
+ a_uint32_t flags, HAL_STATUS *status)
{
struct ath_hal_5416 *ahp;
struct ath_hal *ah;
ah->ah_dev = dev;
ah->ah_sc = sc;
- ah->ah_sh = sh;
/* If its a Owl 2.0 chip then change the hal structure to
point to the Owl 2.0 ar5416_hal_20 structure */
OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
}
-HAL_BOOL ar5416SetupRxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+HAL_BOOL ar5416SetupRxDesc_20(struct ath_hal *ah, struct ath_rx_desc *ds,
a_uint32_t size, a_uint32_t flags)
{
struct ar5416_desc *ads = AR5416DESC(ds);
return AH_TRUE;
}
-HAL_STATUS ar5416ProcRxDescFast_20(struct ath_hal *ah, struct ath_desc *ds,
+HAL_STATUS ar5416ProcRxDescFast_20(struct ath_hal *ah, struct ath_rx_desc *ds,
a_uint32_t pa, struct ath_desc *nds,
struct ath_rx_status *rx_stats)
{
ads->ds_ctl0 |= AR_TxIntrReq;
}
-HAL_BOOL ar5416SetupTxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+HAL_BOOL ar5416SetupTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t pktLen,
a_uint32_t hdrLen,
HAL_PKT_TYPE type,
#undef RTSCTS
}
-HAL_BOOL ar5416FillTxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+HAL_BOOL ar5416FillTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t segLen, HAL_BOOL firstSeg, HAL_BOOL lastSeg,
- const struct ath_desc *ds0)
+ const struct ath_tx_desc *ds0)
{
struct ar5416_desc *ads = AR5416DESC(ds);
return AH_TRUE;
}
-HAL_BOOL ar5416FillKeyTxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+HAL_BOOL ar5416FillKeyTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
HAL_KEY_TYPE keyType)
{
struct ar5416_desc *ads = AR5416DESC(ds);
return AH_TRUE;
}
-HAL_STATUS ar5416ProcTxDesc_20(struct ath_hal *ah, struct ath_desc *gds)
+HAL_STATUS ar5416ProcTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *gds)
{
struct ar5416_desc *ads = AR5416DESC(gds);
struct ath_tx_desc *ds = (struct ath_tx_desc *)gds;
return HAL_OK;
}
-void ar5416Set11nTxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+void ar5416Set11nTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t pktLen, HAL_PKT_TYPE type, a_uint32_t txPower,
a_uint32_t keyIx, HAL_KEY_TYPE keyType,
a_uint32_t flags)
#ifdef MAGPIE_MERLIN
-void ar5416Set11nRateScenario_20(struct ath_hal *ah, struct ath_desc *ds,
+void ar5416Set11nRateScenario_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t durUpdateEn, a_uint32_t rtsctsRate,
a_uint32_t rtsctsDuration,
HAL_11N_RATE_SERIES series[], a_uint32_t nseries,
#else
-void ar5416Set11nRateScenario_20(struct ath_hal *ah, struct ath_desc *ds,
+void ar5416Set11nRateScenario_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t durUpdateEn, a_uint32_t rtsctsRate,
a_uint32_t rtsctsDuration,
HAL_11N_RATE_SERIES series[], a_uint32_t nseries,
#endif
-void ar5416Set11nAggrFirst_20(struct ath_hal *ah, struct ath_desc *ds, a_uint32_t aggrLen,
+void ar5416Set11nAggrFirst_20(struct ath_hal *ah, struct ath_tx_desc *ds, a_uint32_t aggrLen,
a_uint32_t numDelims)
{
struct ar5416_desc *ads = AR5416DESC(ds);
SM(numDelims, AR_PadDelim);
}
-void ar5416Set11nAggrMiddle_20(struct ath_hal *ah, struct ath_desc *ds, a_uint32_t numDelims)
+void ar5416Set11nAggrMiddle_20(struct ath_hal *ah, struct ath_tx_desc *ds, a_uint32_t numDelims)
{
struct ar5416_desc *ads = AR5416DESC(ds);
a_uint32_t ctl6;
ads->ds_ctl6 = ctl6;
}
-void ar5416Set11nAggrLast_20(struct ath_hal *ah, struct ath_desc *ds)
+void ar5416Set11nAggrLast_20(struct ath_hal *ah, struct ath_tx_desc *ds)
{
struct ar5416_desc *ads = AR5416DESC(ds);
ads->ds_ctl6 &= ~AR_PadDelim;
}
-void ar5416Clr11nAggr_20(struct ath_hal *ah, struct ath_desc *ds)
+void ar5416Clr11nAggr_20(struct ath_hal *ah, struct ath_tx_desc *ds)
{
struct ar5416_desc *ads = AR5416DESC(ds);
ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
}
-void ar5416Set11nBurstDuration_20(struct ath_hal *ah, struct ath_desc *ds,
+void ar5416Set11nBurstDuration_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t burstDuration)
{
struct ar5416_desc *ads = AR5416DESC(ds);
ads->ds_ctl2 |= SM(burstDuration, AR_BurstDur);
}
-void ar5416Set11nVirtualMoreFrag_20(struct ath_hal *ah, struct ath_desc *ds,
+void ar5416Set11nVirtualMoreFrag_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t vmf)
{
struct ar5416_desc *ads = AR5416DESC(ds);
extern HAL_BOOL ar5416UpdateCTSForBursting_20(struct ath_hal *, struct ath_desc *,
struct ath_desc *,struct ath_desc *, struct ath_desc *,
a_uint32_t, a_uint32_t);
-extern HAL_BOOL ar5416SetupTxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+extern HAL_BOOL ar5416SetupTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t pktLen, a_uint32_t hdrLen, HAL_PKT_TYPE type, a_uint32_t txPower,
a_uint32_t txRate0, a_uint32_t txTries0,
a_uint32_t keyIx, a_uint32_t antMode, a_uint32_t flags,
a_uint32_t rtsctsRate, a_uint32_t rtsctsDuration,
a_uint32_t compicvLen, a_uint32_t compivLen, a_uint32_t comp);
-extern HAL_BOOL ar5416FillTxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+extern HAL_BOOL ar5416FillTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t segLen, HAL_BOOL firstSeg, HAL_BOOL lastSeg,
- const struct ath_desc *ds0);
-extern HAL_BOOL ar5416FillKeyTxDesc_20(struct ath_hal *ah, struct ath_desc *,HAL_KEY_TYPE);
-extern HAL_STATUS ar5416ProcTxDesc_20(struct ath_hal *ah, struct ath_desc *);
+ const struct ath_tx_desc *ds0);
+extern HAL_BOOL ar5416FillKeyTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *,HAL_KEY_TYPE);
+extern HAL_STATUS ar5416ProcTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *);
extern void ar5416IntrReqTxDesc_20(struct ath_hal *ah, struct ath_desc *ds);
-extern void ar5416Set11nTxDesc_20(struct ath_hal *ah, struct ath_desc *ds,
+extern void ar5416Set11nTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t pktLen, HAL_PKT_TYPE type, a_uint32_t txPower,
a_uint32_t keyIx, HAL_KEY_TYPE keyType, a_uint32_t flags);
-extern void ar5416Set11nRateScenario_20(struct ath_hal *ah, struct ath_desc *ds,
+extern void ar5416Set11nRateScenario_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t durUpdateEn, a_uint32_t rtsctsRate, a_uint32_t rtsctsDuration, HAL_11N_RATE_SERIES series[],
a_uint32_t nseries, a_uint32_t flags);
-extern void ar5416Set11nAggrFirst_20(struct ath_hal *ah, struct ath_desc *ds,
+extern void ar5416Set11nAggrFirst_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t aggrLen, a_uint32_t numDelims);
-extern void ar5416Set11nAggrMiddle_20(struct ath_hal *ah, struct ath_desc *ds,
+extern void ar5416Set11nAggrMiddle_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t numDelims);
-extern void ar5416Set11nAggrLast_20(struct ath_hal *ah, struct ath_desc *ds);
-extern void ar5416Clr11nAggr_20(struct ath_hal *ah, struct ath_desc *ds);
-extern void ar5416Set11nBurstDuration_20(struct ath_hal *ah, struct ath_desc *ds,
+extern void ar5416Set11nAggrLast_20(struct ath_hal *ah, struct ath_tx_desc *ds);
+extern void ar5416Clr11nAggr_20(struct ath_hal *ah, struct ath_tx_desc *ds);
+extern void ar5416Set11nBurstDuration_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t burstDuration);
-extern void ar5416Set11nVirtualMoreFrag_20(struct ath_hal *ah, struct ath_desc *ds,
+extern void ar5416Set11nVirtualMoreFrag_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t vmf);
extern HAL_BOOL ar5416SetupRxDesc_20(struct ath_hal *,
- struct ath_desc *, a_uint32_t size, a_uint32_t flags);
+ struct ath_rx_desc *, a_uint32_t size, a_uint32_t flags);
extern HAL_STATUS ar5416ProcRxDescFast_20(struct ath_hal *ah,
- struct ath_desc *, a_uint32_t,
+ struct ath_rx_desc *, a_uint32_t,
struct ath_desc *,
struct ath_rx_status *);
#endif
{
adf_nbuf_t skb = bf->bf_skb;
struct ath_hal *ah = sc->sc_ah;
- struct ath_desc *ds;
+ struct ath_tx_desc *ds;
a_int32_t flags;
const HAL_RATE_TABLE *rt;
a_uint8_t rix, rate;
struct ath_descdma *dd,
ath_bufhead *head, a_int32_t dir)
{
- struct ath_tx_buf *bf;
+ struct ath_buf *bf;
struct ieee80211_node_target *ni;
asf_tailq_foreach(bf, head, bf_list) {
if (ath_numrxdescs == -1)
ath_numrxdescs = ATH_RXDESC;
- error = ath_descdma_setup(sc, &sc->sc_rxdma, &sc->sc_rxbuf,
+ error = ath_descdma_setup(sc, &sc->sc_rxdma, (ath_bufhead *)&sc->sc_rxbuf,
"rx", ath_numrxdescs, 1,
sizeof(struct ath_rx_buf),
sizeof(struct ath_rx_desc));
a_uint32_t i;
struct ath_descdma *dd = &sc->sc_rxdma;
- struct ath_rx_desc *ds = dd->dd_desc;
+ struct ath_rx_desc *ds = (struct ath_rx_desc *)dd->dd_desc;
struct ath_rx_desc *ds_prev = NULL;
asf_tailq_init(&sc->sc_rxdesc);
asf_tailq_insert_tail(&sc->sc_rxdesc, ds, ds_list);
}
- error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf,
+ error = ath_descdma_setup(sc, &sc->sc_txdma, (ath_bufhead *)&sc->sc_txbuf,
"tx", ATH_TXBUF + 1, ATH_TXDESC,
sizeof(struct ath_tx_buf),
sizeof(struct ath_tx_desc));
if (error != 0) {
- ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf,
+ ath_descdma_cleanup(sc, &sc->sc_rxdma, (ath_bufhead *)&sc->sc_rxbuf,
ADF_OS_DMA_FROM_DEVICE);
return error;
}
- error = ath_descdma_setup(sc, &sc->sc_bdma, &sc->sc_bbuf,
+ error = ath_descdma_setup(sc, &sc->sc_bdma, (ath_bufhead *)&sc->sc_bbuf,
"beacon", ATH_BCBUF, 1,
sizeof(struct ath_tx_buf),
sizeof(struct ath_tx_desc));
if (error != 0) {
- ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf,
+ ath_descdma_cleanup(sc, &sc->sc_txdma, (ath_bufhead *)&sc->sc_txbuf,
ADF_OS_DMA_TO_DEVICE);
- ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf,
+ ath_descdma_cleanup(sc, &sc->sc_rxdma, (ath_bufhead *)&sc->sc_rxbuf,
ADF_OS_DMA_FROM_DEVICE);
return error;
}
sc->sc_txbuf_held = NULL;
if (sc->sc_txdma.dd_desc_len != 0)
- ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf,
+ ath_descdma_cleanup(sc, &sc->sc_txdma, (ath_bufhead *)&sc->sc_txbuf,
ADF_OS_DMA_TO_DEVICE);
if (sc->sc_rxdma.dd_desc_len != 0)
- ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf,
+ ath_descdma_cleanup(sc, &sc->sc_rxdma, (ath_bufhead *)&sc->sc_rxbuf,
ADF_OS_DMA_FROM_DEVICE);
}
A_UINT16 SeqNo, A_UINT8 *data, a_int32_t datalen)
{
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
- struct ath_buf *bf;
+ struct ath_rx_buf *bf;
asf_tailq_foreach(bf, &sc->sc_rxbuf, bf_list)
if (bf->bf_skb != NULL) {
HTC_Ready(sc->tgt_htc_handle);
}
-a_int32_t ath_tgt_attach(a_uint32_t devid,a_uint32_t mem_start,
- struct ath_softc_tgt *sc, adf_os_device_t osdev)
+a_int32_t ath_tgt_attach(a_uint32_t devid, struct ath_softc_tgt *sc, adf_os_device_t osdev)
{
struct ath_hal *ah;
HAL_STATUS status;
ATH_INIT_TQUEUE(sc->sc_dev, &sc->sc_fataltq, ath_fatal_tasklet, sc);
flags |= AH_USE_EEPROM;
- ah = _ath_hal_attach_tgt(devid,sc,sc->sc_dev,mem_start, flags, &status);
+ ah = _ath_hal_attach_tgt(devid, sc, sc->sc_dev, flags, &status);
if (ah == NULL) {
error = ENXIO;
goto bad;
#include "if_athvar.h"
#include "if_ath_pci.h"
-extern a_int32_t ath_tgt_attach(a_uint32_t devid,a_uint32_t mem_start,
- struct ath_softc_tgt *sc, adf_os_device_t osdev);
+extern a_int32_t ath_tgt_attach(a_uint32_t devid, struct ath_softc_tgt *sc, adf_os_device_t osdev);
extern a_int32_t ath_detach(void *);
extern adf_os_irq_resp_t ath_intr(adf_drv_handle_t hdl);
};
#endif
-void bus_read_cachesize(struct ath_softc *sc, a_uint8_t *csz);
void exit_ath_pci(void);
a_int32_t init_ath_pci(void);
adf_os_print("ath_pci_probe %x\n",id->device);
- if (ath_tgt_attach(id->device, res->start, &sc->aps_sc, osdev) != 0)
+ if (ath_tgt_attach(id->device, &sc->aps_sc, osdev) != 0)
goto bad3;
/* ready to process interrupts */
{
}
-void
-bus_read_cachesize(struct ath_softc *sc, a_uint8_t *csz)
-{
- *csz = adf_os_cache_line_size();
-}
-
static adf_drv_info_t ath_drv_info = adf_os_pci_set_drv_info(ath_pci_tgt,&ath_pci_id_table[0], ath_pci_probe, ath_pci_remove, ath_pci_suspend, ath_pci_resume);
a_int32_t
#ifndef _ATH_RATECTRL_H_
#define _ATH_RATECTRL_H_
-struct ath_softc;
struct ath_softc_tgt;
struct ath_node;
struct ath_node_target;
#define ath_free_rx_skb(_sc,_skb) BUF_Pool_free_buf(_sc->pool_handle, POOL_ID_WLAN_RX_BUF, _skb)
#define ath_free_tx_skb(_htc_handle, endpt, _skb) HTC_ReturnBuffers(_htc_handle, endpt, _skb);
-typedef void (*ath_txq_add_fn_t)(struct ath_softc_tgt *sc, struct ath_buf *bf);
-typedef void (*ath_tx_comp_fn_t)(struct ath_softc_tgt *sc, struct ath_buf *bf);
+struct ath_tx_buf;
+
+typedef void (*ath_txq_add_fn_t)(struct ath_softc_tgt *sc, struct ath_tx_buf *bf);
+typedef void (*ath_tx_comp_fn_t)(struct ath_softc_tgt *sc, struct ath_tx_buf *bf);
struct ath_buf_state {
ath_tx_comp_fn_t bfs_comp; /* completion function */
#define bf_retries bf_state.bfs_retries
#define ATH_GENERIC_BUF \
- asf_tailq_entry(ath_buf) bf_list; \
- struct ath_buf *bf_next; \
- struct ath_desc *bf_desc; \
- struct ath_desc *bf_descarr; \
adf_os_dma_map_t bf_dmamap; \
adf_os_dmamap_info_t bf_dmamap_info; \
struct ieee80211_node_target *bf_node; \
adf_nbuf_queue_t bf_skbhead; \
- adf_nbuf_t bf_skb; \
- struct ath_desc *bf_lastds;
+ adf_nbuf_t bf_skb;
struct ath_buf
{
ATH_GENERIC_BUF
+ asf_tailq_entry(ath_buf) bf_list;
+ struct ath_buf *bf_next;
+ struct ath_desc *bf_lastds;
+ struct ath_desc *bf_desc;
+ struct ath_desc *bf_descarr;
};
struct ath_tx_buf
{
ATH_GENERIC_BUF
+ asf_tailq_entry(ath_tx_buf) bf_list;
+ struct ath_tx_buf *bf_next;
+ struct ath_tx_desc *bf_desc;
+ struct ath_tx_desc *bf_descarr;
+ struct ath_tx_desc *bf_lastds;
struct ath_buf_state bf_state;
a_uint16_t bf_flags;
HTC_ENDPOINT_ID bf_endpt;
struct ath_rx_buf
{
ATH_GENERIC_BUF
+ asf_tailq_entry(ath_rx_buf) bf_list;
+ struct ath_rx_buf *bf_next;
+ struct ath_rx_desc *bf_desc;
+ struct ath_rx_desc *bf_descarr;
+ struct ath_rx_desc *bf_lastds;
a_uint32_t bf_status;
struct ath_rx_status bf_rx_status;
};
-#define ATH_BUF_GET_DESC_PHY_ADDR(bf) bf->bf_desc
+#define ATH_BUF_GET_DESC_PHY_ADDR(bf) (a_uint32_t)bf->bf_desc
#define ATH_BUF_GET_DESC_PHY_ADDR_WITH_IDX(bf, idx) (adf_os_dma_addr_t)(&bf->bf_descarr[idx])
#define ATH_BUF_SET_DESC_PHY_ADDR(bf, addr)
#define ATH_BUF_SET_DESC_PHY_ADDR_WITH_IDX(bf, idx, addr)
typedef asf_tailq_head(ath_deschead_s, ath_rx_desc) ath_deschead;
typedef asf_tailq_head(ath_bufhead_s, ath_buf) ath_bufhead;
+typedef asf_tailq_head(ath_rx_bufhead_s, ath_rx_buf) ath_rx_bufhead;
+typedef asf_tailq_head(ath_tx_bufhead_s, ath_tx_buf) ath_tx_bufhead;
#define WME_NUM_TID 8
#define WME_BA_BMP_SIZE 64
a_int32_t baw_tail;
a_uint32_t tx_buf_bitmap[ATH_TID_MAX_BUFS/TX_BUF_BITMAP_SIZE];
asf_tailq_entry(ath_atx_tid) tid_qelem;
- asf_tailq_head(ath_tid_rbq,ath_buf) buf_q;
+ asf_tailq_head(ath_tid_rbq,ath_tx_buf) buf_q;
a_int8_t paused;
a_int8_t sched;
a_uint8_t flag;
struct ath_txq {
a_uint32_t axq_qnum;
a_uint32_t *axq_link;
- asf_tailq_head(,ath_buf) axq_q;
+ asf_tailq_head(,ath_tx_buf) axq_q;
a_uint32_t axq_depth;
- struct ath_buf *axq_linkbuf;
+ struct ath_tx_buf *axq_linkbuf;
asf_tailq_head(,ath_atx_tid) axq_tidq;
};
struct ath_vap_target {
struct ieee80211vap_target av_vap;
struct ath_txq av_mcastq;
- struct ath_buf *av_bcbuf;
+ struct ath_tx_buf *av_bcbuf;
a_uint32_t av_rate_mask[2]; /* 0 - 2G, 1 - 5G */
a_uint8_t av_minrateidx[2]; /* 0 - 2G, 1 - 5G */
a_int8_t av_valid;
tq_struct sc_txtotq;
tq_struct sc_fataltq;
- ath_bufhead sc_rxbuf;
+ ath_rx_bufhead sc_rxbuf;
ath_deschead sc_rxdesc_idle;
ath_deschead sc_rxdesc;
struct ath_rx_desc *sc_rxdesc_held;
- struct ath_buf *sc_txbuf_held;
+ struct ath_tx_buf *sc_txbuf_held;
struct ath_descdma sc_rxdma;
struct ath_descdma sc_txdma;
struct ath_descdma sc_bdma;
a_uint32_t *sc_rxlink;
- ath_bufhead sc_txbuf;
+ ath_tx_bufhead sc_txbuf;
a_uint8_t sc_txqsetup;
struct ath_txq sc_txq[HAL_NUM_TX_QUEUES];
struct ath_vap_target sc_vap[TARGET_VAP_MAX];
struct ieee80211com_target sc_ic;
- ath_bufhead sc_bbuf;
+ ath_tx_bufhead sc_bbuf;
a_uint64_t sc_swba_tsf;
WMI_TXSTATUS_EVENT tx_status[2];
void owltgt_tx_processq(struct ath_softc_tgt *sc, struct ath_txq *txq,
owl_txq_state_t txqstate);
static void ath_tgt_txqaddbuf(struct ath_softc_tgt *sc, struct ath_txq *txq,
- struct ath_buf *bf, struct ath_desc *lastds);
+ struct ath_tx_buf *bf, struct ath_tx_desc *lastds);
void ath_rate_findrate_11n_Hardcoded(struct ath_softc_tgt *sc,
struct ath_rc_series series[]);
void ath_buf_set_rate_Hardcoded(struct ath_softc_tgt *sc,
struct ath_tx_buf *bf, ath_data_hdr_t *dh);
static void ath_tx_freebuf(struct ath_softc_tgt *sc, struct ath_tx_buf *bf);
static void ath_tx_uc_comp(struct ath_softc_tgt *sc, struct ath_tx_buf *bf);
-static void ath_update_stats(struct ath_softc_tgt *sc, struct ath_buf *bf);
+static void ath_update_stats(struct ath_softc_tgt *sc, struct ath_tx_buf *bf);
void adf_print_buf(adf_nbuf_t buf);
static void ath_tgt_tx_enqueue(struct ath_txq *txq, struct ath_atx_tid *tid);
static void ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid);
extern a_int32_t ath_chainmask_sel_logic(void *);
-static a_int32_t ath_get_pktlen(struct ath_buf *bf, a_int32_t hdrlen);
-static void ath_tgt_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
+static a_int32_t ath_get_pktlen(struct ath_tx_buf *bf, a_int32_t hdrlen);
+static void ath_tgt_txq_schedule(struct ath_softc_tgt *sc, struct ath_txq *txq);
typedef void (*ath_ft_set_atype_t)(struct ath_softc_tgt *sc, struct ath_buf *bf);
ath_tx_update_baw(ath_atx_tid_t *tid, int seqno);
static void
ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf,
- ath_bufhead *bf_q, struct ath_tx_buf **bar);
+ ath_tx_bufhead *bf_q, struct ath_tx_buf **bar);
static void
ath_tx_comp_aggr_error(struct ath_softc_tgt *sc, struct ath_tx_buf *bf, ath_atx_tid_t *tid);
static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
- struct ath_desc *ds0, *ds = bf->bf_desc;
+ struct ath_tx_desc *ds0, *ds = bf->bf_desc;
a_uint8_t i;
ds0 = ds;
static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
- struct ath_desc *ds = bf->bf_desc;
+ struct ath_tx_desc *ds = bf->bf_desc;
switch (bf->bf_protmode) {
case IEEE80211_PROT_RTSCTS:
ath_filltxdesc(sc, bf);
}
-static struct ath_buf *ath_buf_toggle(struct ath_softc_tgt *sc,
+static struct ath_tx_buf *ath_buf_toggle(struct ath_softc_tgt *sc,
struct ath_tx_buf *bf,
a_uint8_t retry)
{
{
struct ath_hal *ah = sc->sc_ah;
const HAL_RATE_TABLE *rt;
- struct ath_desc *ds = bf->bf_desc;
+ struct ath_tx_desc *ds = bf->bf_desc;
HAL_11N_RATE_SERIES series[4];
a_int32_t i, flags;
a_uint8_t rix, cix, rtsctsrate;
return NULL;
}
-static struct ath_buf* ath_buf_alloc(struct ath_softc_tgt *sc)
+static struct ath_tx_buf* ath_tx_buf_alloc(struct ath_softc_tgt *sc)
{
struct ath_tx_buf *bf = NULL;
return NULL;
}
- bf = ath_buf_alloc(sc);
+ bf = ath_tx_buf_alloc(sc);
if (!bf) {
__stats(sc, tx_nobufs);
return NULL;
bf->bf_keytype = dh->keytype;
bf->bf_keyix = dh->keyix;
bf->bf_protmode = dh->flags & (IEEE80211_PROT_RTSCTS | IEEE80211_PROT_CTSONLY);
- bf->bf_node = (struct ath_node_target *)ni;
+ bf->bf_node = ni;
adf_nbuf_queue_add(&bf->bf_skbhead, skb);
skb = adf_nbuf_queue_first(&(bf->bf_skbhead));
ath_data_hdr_t *dh)
{
- struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
struct ieee80211_frame *wh = ATH_SKB2_WH(bf->bf_skb);
- struct ieee80211_node_target *ni = (struct ieee80211_node_target *)an;
- struct ieee80211vap_target *vap = ni->ni_vap;
- struct ieee80211com_target *ic = &sc->sc_ic;
- a_int32_t retval, fragno = 0;
+ a_int32_t retval;
a_uint32_t flags = adf_os_ntohl(dh->flags);
ath_tgt_tx_seqno_normal(bf);
}
static a_int32_t
-ath_get_pktlen(struct ath_buf *bf, a_int32_t hdrlen)
+ath_get_pktlen(struct ath_tx_buf *bf, a_int32_t hdrlen)
{
adf_nbuf_t skb = bf->bf_skb;
a_int32_t pktlen;
void
ath_tgt_tx_send_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
- struct ath_node_target *an = bf->bf_node;
+ struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
struct ath_rc_series rcs[4];
struct ath_rc_series mrcs[4];
a_int32_t shortPreamble = 0;
ath_tx_freebuf(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
a_int32_t i ;
- struct ath_desc *bfd = NULL;
+ struct ath_tx_desc *bfd = NULL;
for (bfd = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; bfd++, i++) {
ath_hal_clr11n_aggr(sc->sc_ah, bfd);
}
static void
-ath_update_stats(struct ath_softc_tgt *sc, struct ath_buf *bf)
+ath_update_stats(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
struct ath_tx_desc *ds = bf->bf_desc;
u_int32_t sr, lr;
a_uint8_t rix, txrate, ctsrate, cix = 0xff, *data;
a_uint32_t ivlen = 0, icvlen = 0, subtype, flags, ctsduration;
a_int32_t i, iswep, ismcast, hdrlen, pktlen, try0, len;
- struct ath_desc *ds=NULL;
+ struct ath_tx_desc *ds=NULL;
struct ath_txq *txq=NULL;
struct ath_tx_buf *bf;
HAL_PKT_TYPE atype;
static void
ath_tgt_txqaddbuf(struct ath_softc_tgt *sc,
- struct ath_txq *txq, struct ath_buf *bf,
- struct ath_desc *lastds)
+ struct ath_txq *txq, struct ath_tx_buf *bf,
+ struct ath_tx_desc *lastds)
{
struct ath_hal *ah = sc->sc_ah;
}
static void
-ath_tgt_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
+ath_tgt_txq_schedule(struct ath_softc_tgt *sc, struct ath_txq *txq)
{
struct ath_atx_tid *tid;
u_int8_t bdone;
static void
ath_tgt_tx_sched_normal(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
{
- struct ath_buf *bf;
+ struct ath_tx_buf *bf;
struct ath_txq *txq =TID_TO_ACTXQ(tid->tidno);;
do {
{
struct ath_tx_buf *bf, *bf_last;
ATH_AGGR_STATUS status;
- ath_bufhead bf_q;
+ ath_tx_bufhead bf_q;
struct ath_txq *txq = TID_TO_ACTXQ(tid->tidno);
- struct ath_desc *ds = NULL;
+ struct ath_tx_desc *ds = NULL;
int i;
break;
bf = asf_tailq_first(&bf_q);
- bf_last = asf_tailq_last(&bf_q, ath_bufhead_s);
+ bf_last = asf_tailq_last(&bf_q, ath_tx_bufhead_s);
if (bf->bf_nframes == 1) {
}
int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid,
- ath_bufhead *bf_q)
+ ath_tx_bufhead *bf_q)
{
struct ath_tx_buf *bf_first ,*bf_prev = NULL;
int nframes = 0, rl = 0;;
- struct ath_desc *ds = NULL;
+ struct ath_tx_desc *ds = NULL;
struct ath_tx_buf *bf;
u_int16_t aggr_limit = (64*1024 -1), al = 0, bpad = 0, al_delta;
u_int16_t h_baw = tid->baw_size/2, prev_al = 0, prev_frames = 0;
int ba_index;
int nbad = 0;
int nframes = bf->bf_nframes;
- struct ath_buf *bf_next;
- ath_bufhead bf_q;
+ struct ath_tx_buf *bf_next;
+ ath_tx_bufhead bf_q;
int tx_ok = 1;
- struct ath_buf *bar = NULL;
+ struct ath_tx_buf *bar = NULL;
struct ath_txq *txq;
txq = bf->bf_txq;
struct ath_tx_desc lastds;
- struct ath_desc *ds = &lastds;
+ struct ath_tx_desc *ds = &lastds;
struct ath_rc_series rcs[4];
- struct ath_buf *bar = NULL;
- struct ath_buf *bf_next;
+ struct ath_tx_buf *bar = NULL;
+ struct ath_tx_buf *bf_next;
int nframes = bf->bf_nframes;
- ath_bufhead bf_q;
+ ath_tx_bufhead bf_q;
struct ath_txq *txq;
asf_tailq_init(&bf_q);
int ba_index;
int nbad = 0;
int nframes = bf->bf_nframes;
- struct ath_buf *bf_next;
+ struct ath_tx_buf *bf_next;
int tx_ok = 1;
adf_os_mem_copy(ds, bf->bf_lastds, sizeof (struct ath_tx_desc));
static void
ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf,
- ath_bufhead *bf_q, struct ath_tx_buf **bar)
+ ath_tx_bufhead *bf_q, struct ath_tx_buf **bar)
{
struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno);
- struct ath_desc *ds = NULL;
+ struct ath_tx_desc *ds = NULL;
int i = 0;
__stats(sc, txaggr_compretries);
{
struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno);
- struct ath_desc *ds = bf->bf_lastds;
+ struct ath_tx_desc *ds = bf->bf_lastds;
ath_update_stats(sc, bf);
ath_rate_tx_complete(sc, an, ds, bf->bf_rcs, 1, 0);
static void ath_bar_tx_comp(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
- struct ath_desc *ds = bf->bf_lastds;
+ struct ath_tx_desc *ds = bf->bf_lastds;
struct ath_node_target *an;
ath_atx_tid_t *tid;
struct ath_txq *txq;
adf_nbuf_t skb;
struct ieee80211_frame_bar *bar;
u_int8_t min_rate;
- struct ath_desc *ds, *ds0;
+ struct ath_tx_desc *ds, *ds0;
HAL_11N_RATE_SERIES series[4];
int i = 0;
adf_nbuf_queue_t skbhead;
A_UINT32 bestThruput, thisThruput;
A_UINT32 nowMsec;
A_UINT8 rate, nextRate, bestRate;
- A_RSSI rssiLast, rssiReduce = 0;
A_UINT8 maxIndex, minIndex;
A_INT8 index;
TX_RATE_CTRL *pRc = NULL;
struct atheros_node *asn = ATH_NODE_ATHEROS(an);
A_UINT8 rix, nrix;
A_UINT8 dot11Rate;
- A_UINT8 rateCode;
WLAN_PHY phy;
rix = rcRateFind_ht(sc, asn, pRateTable, (rcflag & ATH_RC_PROBE_ALLOWED) ? 1 : 0,
{
TX_RATE_CTRL *pRc;
A_UINT32 nowMsec = A_MS_TICKGET();
- A_BOOL stateChange = FALSE;
A_UINT8 lastPer;
int rate,count;
struct atheros_node *pSib = ATH_NODE_ATHEROS(an);
struct atheros_softc *asc = (struct atheros_softc*)sc->sc_rc;
RATE_TABLE_11N *pRateTable = (RATE_TABLE_11N *)asc->hwRateTable[sc->sc_curmode];
- u_int32_t txRateKbps;
static A_UINT32 nRetry2PerLookup[10] = {
100 * 0 / 1, // 0
struct ath_rc_series series[],
int *isProbe)
{
- struct ieee80211vap *vap = an->ni.ni_vap;
- struct atheros_node *oan = ATH_NODE_ATHEROS(an);
- struct atheros_softc *asc = (struct atheros_softc *) sc->sc_rc;
- RATE_TABLE *pRateTable = (RATE_TABLE *)asc->hwRateTable[sc->sc_curmode];
- u_int32_t *retrySched;
-
*isProbe = 0;
if (!numRates || !numTries) {
struct ath_rc_series rcs[],
int nframes, int nbad)
{
- struct atheros_softc *asc = (struct atheros_softc *) sc->sc_rc;
- const RATE_TABLE *pRateTable = (RATE_TABLE *)asc->hwRateTable[sc->sc_curmode];
- u_int8_t txRate = ds->ds_txstat.ts_rate &~ HAL_TXSTAT_ALTRATE;
-
ath_rate_tx_complete_11n(sc, an, ds, rcs, nframes, nbad);
}
struct ath_rc_series series[],
int *isProbe)
{
- struct ieee80211vap *vap = an->ni.ni_vap;
- struct atheros_node *oan = ATH_NODE_ATHEROS(an);
-
*isProbe = 0;
if (!numRates || !numTries) {
return;
ath_rate_newassoc_11n(struct ath_softc_tgt *sc, struct ath_node_target *an, int isnew,
unsigned int capflag, struct ieee80211_rate *rs)
{
- struct ieee80211vap *vap = an->ni.ni_vap;
-
if (isnew) {
struct atheros_node *oan = ATH_NODE_ATHEROS(an);