target_firmware/magpie_fw_dev/target/inc/k2/k2/reg_defs.h

   1 /*************************************************************************/
   2 /*  Copyright (c) 2006 Atheros Communications, Inc., All Rights Reserved */
   3 /*                                                                       */
   4 /*  Module Name : reg_defs.h                                             */
   5 /*                                                                       */
   6 /*  Abstract                                                             */
   7 /*      This file contains the register addr and marco definition.       */
   8 /*                                                                       */
   9 /*  NOTES                                                                */
  10 /*      None                                                             */
  11 /*                                                                       */
  12 /*************************************************************************/
  13 #ifndef _REG_DEFS_H_
  14 #define _REG_DEFS_H_
  15
  16 #include "dt_defs.h"
  17
  18 #define BIT_SET(bit)    (1<<bit)
  19 #define BIT_CLR(bit)    (0<<bit)
  20
  21 #define HAL_WORD_REG_WRITE(addr, val)                                   \
  22         do {                                                            \
  23                 (*((volatile uint32_t *)(addr&0xfffffffc))) = (uint32_t)(val); \
  24         } while (0)
  25
  26 #define HAL_WORD_REG_READ(addr) (*((volatile uint32_t *)(addr&0xfffffffc)))
  27
  28
  29 #define HAL_HALF_WORD_REG_WRITE(addr, val)                              \
  30         do {                                                            \
  31                 (*((volatile uint16_t *)(addr&0xfffffffe))) = (uint16_t)(val); \
  32         } while (0)
  33
  34 #define HAL_HALF_WORD_REG_READ(addr) (*((volatile uint16_t *)(addr&0xfffffffe)))
  35
  36
  37 #define HAL_BYTE_REG_WRITE(addr, val)                                   \
  38         do {                                                            \
  39                 (*((volatile uint8_t *)(addr))) = (uint8_t)(val);       \
  40         } while (0)
  41
  42 #define HAL_BYTE_REG_READ(addr) (*((volatile uint8_t *)(addr)))
  43
  44 /***** REGISTER BASE ADDRESS DEFINITION *****/
  45 #define RESET_VECTOR_ADDRESS        0x8e0000
  46 /********************************************/
  47
  48 /***** REGISTER BASE ADDRESS DEFINITION *****/
  49 #define USB_CTRL_BASE_ADDRESS           0x00010000
  50 #define RST_BASE_ADDRESS                0x00050000
  51 #define UART_BASE_ADDRESS               0x00051000
  52 #define HOST_DMA_BASE_ADDRESS           0x00053000
  53 #define USB_DMA_BASE_ADDRESS            0x00055000
  54 #define SPI_REG_BASE_ADDRESS            0x0005B000
  55 #define WLAN_BASE_ADDRESS           0x10000000
  56 #define MAC_REG_BASE_ADDRESS        WLAN_BASE_ADDRESS
  57 /*******************************************************************************/
  58 /* Reset Register*/
  59 #define MAGPEI_REG_RST_BASE_ADDR                    RST_BASE_ADDRESS
  60
  61 #define REG_GENERAL_TIMER_OFFSET                    0x0
  62 #define REG_GENERAL_TIMER_RELOAD_OFFSET             0x4
  63 #define REG_WATCHDOG_TIMER_CONTROL_OFFSET           0x8
  64 #define REG_WATCHDOG_TIMER_OFFSET                   0xC
  65 #define REG_RESET_OFFSET                            0x10
  66 #define REG_BOOTSTRAP                               0x14
  67 #define REG_AHB_ARB                                 0x18
  68 #define REG_WATCHDOG_INTR_OFFSET                    0x1C
  69 #define REG_GENERAL_TIMER_INTR_OFFSET               0x20
  70 #define REG_REVISION_ID                             0x90
  71 #define REG_CLOCK_CONTROL_OFFSET                    0x40
  72 #define REG_RST_PWDN_CONTROL_OFFSET                 0x44
  73 #define REG_USB_PLL_OFFSET                          0x48
  74 #define REG_RST_STATUS_OFFSET                       0x4C
  75
  76
  77 #define MAGPEI_REG_RST_GENERAL_TIMER_ADDR       (RST_BASE_ADDRESS+REG_GENERAL_TIMER_OFFSET)
  78 #define MAGPIE_REG_RST_GENERAL_TIMER_RLD_ADDR   (RST_BASE_ADDRESS+REG_GENERAL_TIMER_RELOAD_OFFSET)
  79 #define MAGPIE_REG_RST_WDT_TIMER_CTRL_ADDR      (RST_BASE_ADDRESS+REG_WATCHDOG_TIMER_CONTROL_OFFSET)
  80 #define MAGPIE_REG_RST_WDT_TIMER_ADDR           (RST_BASE_ADDRESS+REG_WATCHDOG_TIMER_OFFSET)
  81 #define MAGPIE_REG_RST_RESET_ADDR               (RST_BASE_ADDRESS+REG_RESET_OFFSET)
  82 #define MAGPIE_REG_RST_BOOTSTRAP_ADDR           (RST_BASE_ADDRESS+REG_BOOTSTRAP)
  83 #define MAGPIE_REG_AHB_ARB_ADDR                 (RST_BASE_ADDRESS+REG_AHB_ARB)
  84 #define MAGPIE_REG_RST_WDT_INTR_ADDR            (RST_BASE_ADDRESS+REG_WATCHDOG_INTR_OFFSET)
  85 #define MAGPIE_REG_RST_GENERAL_TIMER_INTR_ADDR  (RST_BASE_ADDRESS+REG_GENERAL_TIMER_INTR_OFFSET)
  86 #define MAGPIE_REG_REVISION_ID_ADDR             (RST_BASE_ADDRESS+REG_REVISION_ID)
  87 #define MAGPIE_REG_CLOCK_CTRL_ADDR              (RST_BASE_ADDRESS+REG_CLOCK_CONTROL_OFFSET)
  88 #define MAGPIE_REG_RST_PWDN_CTRL_ADDR           (RST_BASE_ADDRESS+REG_RST_PWDN_CONTROL_OFFSET)
  89 #define MAGPIE_REG_USB_PLL_ADDR                 (RST_BASE_ADDRESS+REG_USB_PLL_OFFSET)
  90 #define MAGPIE_REG_RST_STATUS_ADDR              (RST_BASE_ADDRESS+REG_RST_STATUS_OFFSET)
  91
  92 #define MAGPEI_REG_RST_GENERAL_TIMER            (*((volatile u32_t*)(MAGPEI_REG_RST_GENERAL_TIMER_ADDR)))
  93 #define MAGPIE_REG_RST_GENERAL_TIMER_RLD        (*((volatile u32_t*)(MAGPIE_REG_RST_GENERAL_TIMER_RLD_ADDR)))
  94 #define MAGPIE_REG_RST_WDT_TIMER_CTRL           (*((volatile u32_t*)(MAGPIE_REG_RST_WDT_TIMER_CTRL_ADDR)))
  95 #define MAGPIE_REG_RST_WDT_TIMER                (*((volatile u32_t*)(MAGPIE_REG_RST_WDT_TIMER_ADDR)))
  96 #define MAGPIE_REG_RST_RESET                    (*((volatile u32_t*)(MAGPIE_REG_RST_RESET_ADDR)))
  97 #define MAGPIE_REG_RST_BOOTSTRAP                (*((volatile u32_t*)(MAGPIE_REG_RST_BOOTSTRAP_ADDR)))
  98 #define MAGPIE_REG_AHB_ARB                      (*((volatile u32_t*)(MAGPIE_REG_AHB_ARB_ADDR)))
  99 #define MAGPIE_REG_REVISION_ID                  (*((volatile u32_t*)(MAGPIE_REG_REVISION_ID_ADDR)))
 100 #define MAGPIE_REG_CLOCK_CTRL                   (*((volatile u32_t*)(MAGPIE_REG_CLOCK_CTRL_ADDR)))
 101 #define MAGPIE_REG_RST_PWDN_CTRL                (*((volatile u32_t*)(MAGPIE_REG_RST_PWDN_CTRL_ADDR)))
 102 #define MAGPIE_REG_USB_PLL                      (*((volatile u32_t*)(MAGPIE_REG_USB_PLL_ADDR)))
 103 #define MAGPIE_REG_RST_STATUS                   (*((volatile u32_t*)(MAGPIE_REG_RST_STATUS_ADDR)))
 104
 105
 106 /*******************************************************************************/
 107 /* USB DMA Register*/
 108
 109 #define MAGPIE_REG_USB_INTERRUPT_ADDR           USB_DMA_BASE_ADDRESS
 110 #define MAGPIE_REG_USB_INTERRUPT_MASK_ADDR      (USB_DMA_BASE_ADDRESS + 0x4)
 111
 112 #define MAGPIE_REG_USB_RX0_DESC_START_ADDR      (USB_DMA_BASE_ADDRESS + 0x800)
 113 #define MAGPIE_REG_USB_RX0_DMA_START_ADDR       (USB_DMA_BASE_ADDRESS + 0x804)
 114 #define MAGPIE_REG_USB_RX0_BURST_SIZE_ADDR      (USB_DMA_BASE_ADDRESS + 0x808)
 115 #define MAGPIE_REG_USB_RX0_STATE_ADDR           (USB_DMA_BASE_ADDRESS + 0x814)
 116 #define MAGPIE_REG_USB_RX0_CUR_TRACE_ADDR       (USB_DMA_BASE_ADDRESS + 0x818)
 117 #define MAGPIE_REG_USB_RX0_SWAP_DATA_ADDR       (USB_DMA_BASE_ADDRESS + 0x81C)
 118
 119 #define MAGPIE_REG_USB_RX1_DESC_START_ADDR      (USB_DMA_BASE_ADDRESS + 0x900)
 120 #define MAGPIE_REG_USB_RX1_DMA_START_ADDR       (USB_DMA_BASE_ADDRESS + 0x904)
 121 #define MAGPIE_REG_USB_RX1_BURST_SIZE_ADDR      (USB_DMA_BASE_ADDRESS + 0x908)
 122 #define MAGPIE_REG_USB_RX1_STATE_ADDR           (USB_DMA_BASE_ADDRESS + 0x914)
 123 #define MAGPIE_REG_USB_RX1_CUR_TRACE_ADDR       (USB_DMA_BASE_ADDRESS + 0x918)
 124 #define MAGPIE_REG_USB_RX1_SWAP_DATA_ADDR       (USB_DMA_BASE_ADDRESS + 0x91C)
 125
 126 #define MAGPIE_REG_USB_RX2_DESC_START_ADDR      (USB_DMA_BASE_ADDRESS + 0xa00)
 127 #define MAGPIE_REG_USB_RX2_DMA_START_ADDR       (USB_DMA_BASE_ADDRESS + 0xa04)
 128 #define MAGPIE_REG_USB_RX2_BURST_SIZE_ADDR      (USB_DMA_BASE_ADDRESS + 0xa08)
 129 #define MAGPIE_REG_USB_RX2_STATE_ADDR           (USB_DMA_BASE_ADDRESS + 0xa14)
 130 #define MAGPIE_REG_USB_RX2_CUR_TRACE_ADDR       (USB_DMA_BASE_ADDRESS + 0xa18)
 131 #define MAGPIE_REG_USB_RX2_SWAP_DATA_ADDR       (USB_DMA_BASE_ADDRESS + 0xa1C)
 132
 133 #define MAGPIE_REG_USB_TX0_DESC_START_ADDR      (USB_DMA_BASE_ADDRESS + 0xC00)
 134 #define MAGPIE_REG_USB_TX0_DMA_START_ADDR       (USB_DMA_BASE_ADDRESS + 0xC04)
 135 #define MAGPIE_REG_USB_TX0_BURST_SIZE_ADDR      (USB_DMA_BASE_ADDRESS + 0xC08)
 136 #define MAGPIE_REG_USB_TX0_STATE_ADDR           (USB_DMA_BASE_ADDRESS + 0xC10)
 137 #define MAGPIE_REG_USB_TX0_CUR_TRACE_ADDR       (USB_DMA_BASE_ADDRESS + 0xC14)
 138 #define MAGPIE_REG_USB_TX0_SWAP_DATA_ADDR       (USB_DMA_BASE_ADDRESS + 0xC18)
 139
 140 #define MAGPIE_REG_USB_INTERRUPT_TX0_END         (1<<24) //0x1000000
 141 #define MAGPIE_REG_USB_INTERRUPT_TX0_COMPL       (1<<16) //0x10000
 142 #define MAGPIE_REG_USB_INTERRUPT_RX2_END         (1<<10) //0x00400
 143 #define MAGPIE_REG_USB_INTERRUPT_RX1_END         (1<<9) //0x00200
 144 #define MAGPIE_REG_USB_INTERRUPT_RX0_END         (1<<8)  //0x0100
 145 #define MAGPIE_REG_USB_INTERRUPT_RX2_COMPL       (1<<2) //0x00004
 146
 147 #define MAGPIE_REG_USB_INTERRUPT_RX1_COMPL       (1<<1) //0x00002
 148 #define MAGPIE_REG_USB_INTERRUPT_RX0_COMPL       (1<<0)  //0x00001
 149
 150
 151 #define MAGPIE_REG_USB_INTERRUPT                (*((volatile u32_t*)(MAGPIE_REG_USB_INTERRUPT_ADDR)))
 152 #define MAGPIE_REG_USB_INTERRUPT_MASK           (*((volatile u32_t*)(MAGPIE_REG_USB_INTERRUPT_MASK_ADDR)))
 153
 154 #define MAGPIE_REG_USB_RX0_DESC_START           (*((volatile u32_t*)(MAGPIE_REG_USB_RX0_DESC_START_ADDR)))
 155 #define MAGPIE_REG_USB_RX0_DMA_START            (*((volatile u32_t*)(MAGPIE_REG_USB_RX0_DMA_START_ADDR)))
 156 #define MAGPIE_REG_USB_RX0_BURST_SIZE           (*((volatile u32_t*)(MAGPIE_REG_USB_RX0_BURST_SIZE_ADDR)))
 157 #define MAGPIE_REG_USB_RX0_STATE                    (*((volatile u32_t*)(MAGPIE_REG_USB_RX0_STATE_ADDR)))
 158 #define MAGPIE_REG_USB_RX0_CUR_TRACE            (*((volatile u32_t*)(MAGPIE_REG_USB_RX0_CUR_TRACE_ADDR)))
 159 #define MAGPIE_REG_USB_RX0_SWAP_DATA            (*((volatile u32_t*)(MAGPIE_REG_USB_RX0_SWAP_DATA_ADDR)))
 160
 161
 162 #define MAGPIE_REG_USB_RX1_DESC_START           (*((volatile u32_t*)(MAGPIE_REG_USB_RX1_DESC_START_ADDR)))
 163 #define MAGPIE_REG_USB_RX1_DMA_START            (*((volatile u32_t*)(MAGPIE_REG_USB_RX1_DMA_START_ADDR)))
 164 #define MAGPIE_REG_USB_RX1_BURST_SIZE           (*((volatile u32_t*)(MAGPIE_REG_USB_RX1_BURST_SIZE_ADDR)))
 165 #define MAGPIE_REG_USB_RX1_STATE                    (*((volatile u32_t*)(MAGPIE_REG_USB_RX1_STATE_ADDR)))
 166 #define MAGPIE_REG_USB_RX1_CUR_TRACE            (*((volatile u32_t*)(MAGPIE_REG_USB_RX1_CUR_TRACE_ADDR)))
 167 #define MAGPIE_REG_USB_RX1_SWAP_DATA            (*((volatile u32_t*)(MAGPIE_REG_USB_RX1_SWAP_DATA_ADDR)))
 168
 169 #define MAGPIE_REG_USB_RX2_DESC_START           (*((volatile u32_t*)(MAGPIE_REG_USB_RX2_DESC_START_ADDR)))
 170 #define MAGPIE_REG_USB_RX2_DMA_START            (*((volatile u32_t*)(MAGPIE_REG_USB_RX2_DMA_START_ADDR)))
 171 #define MAGPIE_REG_USB_RX2_BURST_SIZE           (*((volatile u32_t*)(MAGPIE_REG_USB_RX2_BURST_SIZE_ADDR)))
 172 #define MAGPIE_REG_USB_RX2_STATE                    (*((volatile u32_t*)(MAGPIE_REG_USB_RX2_STATE_ADDR)))
 173 #define MAGPIE_REG_USB_RX2_CUR_TRACE            (*((volatile u32_t*)(MAGPIE_REG_USB_RX2_CUR_TRACE_ADDR)))
 174 #define MAGPIE_REG_USB_RX2_SWAP_DATA            (*((volatile u32_t*)(MAGPIE_REG_USB_RX2_SWAP_DATA_ADDR)))
 175
 176
 177 #define MAGPIE_REG_USB_TX0_DESC_START           (*((volatile u32_t*)(MAGPIE_REG_USB_TX0_DESC_START_ADDR)))
 178 #define MAGPIE_REG_USB_TX0_DMA_START            (*((volatile u32_t*)(MAGPIE_REG_USB_TX0_DMA_START_ADDR)))
 179 #define MAGPIE_REG_USB_TX0_BURST_SIZE           (*((volatile u32_t*)(MAGPIE_REG_USB_TX0_BURST_SIZE_ADDR)))
 180 #define MAGPIE_REG_USB_TX0_STATE                    (*((volatile u32_t*)(MAGPIE_REG_USB_TX0_STATE_ADDR)))
 181 #define MAGPIE_REG_USB_TX0_CUR_TRACE            (*((volatile u32_t*)(MAGPIE_REG_USB_TX0_CUR_TRACE_ADDR)))
 182 #define MAGPIE_REG_USB_TX0_SWAP_DATA            (*((volatile u32_t*)(MAGPIE_REG_USB_TX0_SWAP_DATA_ADDR)))
 183
 184 /*******************************************************************************/
 185 /***************************/
 186 #define MAGPIE_REG_SPI_BASE_ADDR        SPI_REG_BASE_ADDRESS
 187
 188 #define REG_SPI_CS_OFFSET               0x0
 189 #define REG_SPI_AO_OFFSET                           0x4
 190 #define REG_SPI_D_OFFSET                            0x8
 191 #define REG_SPI_CLKDIV_OFFSET                       0x1C
 192
 193
 194 #define MAGPIE_REG_SPI_CS_ADDR                      (SPI_REG_BASE_ADDRESS + REG_SPI_CS_OFFSET)
 195 #define MAGPIE_REG_SPI_AO_ADDR                      (SPI_REG_BASE_ADDRESS + REG_SPI_AO_OFFSET)
 196 #define MAGPIE_REG_SPI_D_ADDR                       (SPI_REG_BASE_ADDRESS + REG_SPI_D_OFFSET)
 197 #define MAGPIE_REG_SPI_CLKDIV_ADDR                  (SPI_REG_BASE_ADDRESS + REG_SPI_CLKDIV_OFFSET)
 198
 199 /*******************************************************************************/
 200 #define K2_REG_MAC_BASE_ADDR                        MAC_REG_BASE_ADDRESS
 201
 202 #define REG_PLL_CONTROL_OFFSET                      0x7014
 203 #define REG_RTC_FORCE_OFFSET                        0x7040
 204 #define REG_RTC_STATUS_OFFSET                       0x7044
 205
 206 #define K2_REG_PLL_CONTROL_ADDR                     (MAC_REG_BASE_ADDRESS + REG_PLL_CONTROL_OFFSET)
 207 #define K2_REG_RTC_FORCE_ADDR                       (MAC_REG_BASE_ADDRESS + REG_RTC_FORCE_OFFSET)
 208 #define K2_REG_RTC_STATUS_ADDR                      (MAC_REG_BASE_ADDRESS + REG_RTC_STATUS_OFFSET)
 209 #endif