include/shared/fwcmd.h

   1 /*
   2  * Shared Atheros AR9170 Header
   3  *
   4  * Firmware command interface definitions
   5  *
   6  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
   7  * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; see the file COPYING.  If not, see
  20  * http://www.gnu.org/licenses/.
  21  *
  22  * This file incorporates work covered by the following copyright and
  23  * permission notice:
  24  *    Copyright (c) 2007-2008 Atheros Communications, Inc.
  25  *
  26  *    Permission to use, copy, modify, and/or distribute this software for any
  27  *    purpose with or without fee is hereby granted, provided that the above
  28  *    copyright notice and this permission notice appear in all copies.
  29  *
  30  *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  31  *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  32  *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  33  *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  34  *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  35  *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  36  *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  37  */
  38
  39 #ifndef __CARL9170_SHARED_FWCMD_H
  40 #define __CARL9170_SHARED_FWCMD_H
  41
  42 #define CARL9170_MAX_CMD_LEN            64
  43 #define CARL9170_MAX_CMD_PAYLOAD_LEN    60
  44
  45 #define CARL9170FW_API_MIN_VER          1
  46 #define CARL9170FW_API_MAX_VER          1
  47
  48 enum carl9170_cmd_oids {
  49         CARL9170_CMD_RREG               = 0x00,
  50         CARL9170_CMD_WREG               = 0x01,
  51         CARL9170_CMD_ECHO               = 0x02,
  52         CARL9170_CMD_SWRST              = 0x03,
  53         CARL9170_CMD_REBOOT             = 0x04,
  54         CARL9170_CMD_BCN_CTRL           = 0x05,
  55         CARL9170_CMD_READ_TSF           = 0x06,
  56         CARL9170_CMD_RX_FILTER          = 0x07,
  57         CARL9170_CMD_WOL                = 0x08,
  58         CARL9170_CMD_TALLY              = 0x09,
  59
  60         /* CAM */
  61         CARL9170_CMD_EKEY               = 0x10,
  62         CARL9170_CMD_DKEY               = 0x11,
  63
  64         /* RF / PHY */
  65         CARL9170_CMD_FREQUENCY          = 0x20,
  66         CARL9170_CMD_RF_INIT            = 0x21,
  67         CARL9170_CMD_SYNTH              = 0x22,
  68         CARL9170_CMD_FREQ_START         = 0x23,
  69         CARL9170_CMD_PSM                = 0x24,
  70
  71         /* Asychronous command flag */
  72         CARL9170_CMD_ASYNC_FLAG         = 0x40,
  73         CARL9170_CMD_WREG_ASYNC         = (CARL9170_CMD_WREG |
  74                                            CARL9170_CMD_ASYNC_FLAG),
  75         CARL9170_CMD_REBOOT_ASYNC       = (CARL9170_CMD_REBOOT |
  76                                            CARL9170_CMD_ASYNC_FLAG),
  77         CARL9170_CMD_BCN_CTRL_ASYNC     = (CARL9170_CMD_BCN_CTRL |
  78                                            CARL9170_CMD_ASYNC_FLAG),
  79         CARL9170_CMD_PSM_ASYNC          = (CARL9170_CMD_PSM |
  80                                            CARL9170_CMD_ASYNC_FLAG),
  81
  82         /* responses and traps */
  83         CARL9170_RSP_FLAG               = 0xc0,
  84         CARL9170_RSP_PRETBTT            = 0xc0,
  85         CARL9170_RSP_TXCOMP             = 0xc1,
  86         CARL9170_RSP_BEACON_CONFIG      = 0xc2,
  87         CARL9170_RSP_ATIM               = 0xc3,
  88         CARL9170_RSP_WATCHDOG           = 0xc6,
  89         CARL9170_RSP_TEXT               = 0xca,
  90         CARL9170_RSP_HEXDUMP            = 0xcc,
  91         CARL9170_RSP_RADAR              = 0xcd,
  92         CARL9170_RSP_GPIO               = 0xce,
  93         CARL9170_RSP_BOOT               = 0xcf,
  94 };
  95
  96 struct carl9170_set_key_cmd {
  97         __le16          user;
  98         __le16          keyId;
  99         __le16          type;
 100         u8              macAddr[6];
 101         u32             key[4];
 102 } __packed __aligned(4);
 103 #define CARL9170_SET_KEY_CMD_SIZE               28
 104
 105 struct carl9170_disable_key_cmd {
 106         __le16          user;
 107         __le16          padding;
 108 } __packed __aligned(4);
 109 #define CARL9170_DISABLE_KEY_CMD_SIZE           4
 110
 111 struct carl9170_u32_list {
 112         u32     vals[0];
 113 } __packed;
 114
 115 struct carl9170_reg_list {
 116         __le32          regs[0];
 117 } __packed;
 118
 119 struct carl9170_write_reg {
 120         struct {
 121                 __le32          addr;
 122                 __le32          val;
 123         } regs[0] __packed;
 124 } __packed;
 125
 126 #define CARL9170FW_PHY_HT_ENABLE                0x4
 127 #define CARL9170FW_PHY_HT_DYN2040               0x8
 128 #define CARL9170FW_PHY_HT_EXT_CHAN_OFF          0x3
 129 #define CARL9170FW_PHY_HT_EXT_CHAN_OFF_S        2
 130 #define CARL9170FW_PHY_RF_DIV                   (BIT(4) | BIT(5))
 131 #define CARL9170FW_PHY_RF_BW_10MHZ              BIT(4)
 132 #define CARL9170FW_PHY_RF_BW_5MHZ               BIT(5)
 133 #define CARL9170FW_PHY_RF_DIV_S                 4
 134
 135
 136 struct carl9170_rf_init {
 137         __le32          freq;
 138         u8              settings;
 139         u8              padding2[3];
 140         __le32          delta_slope_coeff_exp;
 141         __le32          delta_slope_coeff_man;
 142         __le32          delta_slope_coeff_exp_shgi;
 143         __le32          delta_slope_coeff_man_shgi;
 144         __le32          finiteLoopCount;
 145 } __packed;
 146 #define CARL9170_RF_INIT_SIZE           28
 147
 148 struct carl9170_rf_init_result {
 149         __le32          ret;            /* AR9170_PHY_REG_AGC_CONTROL */
 150 } __packed;
 151 #define CARL9170_RF_INIT_RESULT_SIZE    4
 152
 153 #define CARL9170_PSM_SLEEP              0x1000
 154 #define CARL9170_PSM_SOFTWARE           0
 155 #define CARL9170_PSM_WAKE               0 /* internally used. */
 156 #define CARL9170_PSM_COUNTER            0xfff
 157 #define CARL9170_PSM_COUNTER_S          0
 158
 159 struct carl9170_psm {
 160         __le32          state;
 161 } __packed;
 162 #define CARL9170_PSM_SIZE               4
 163
 164 /*
 165  * Note: If a bit in rx_filter is set, then it
 166  * means that the particular frames which matches
 167  * the condition are FILTERED/REMOVED/DISCARDED!
 168  * (This is can be a bit confusing, especially
 169  * because someone people think it's the exact
 170  * opposite way, so watch out!)
 171  */
 172 struct carl9170_rx_filter_cmd {
 173         __le32          rx_filter;
 174 } __packed;
 175 #define CARL9170_RX_FILTER_CMD_SIZE     4
 176
 177 #define CARL9170_RX_FILTER_BAD          0x01
 178 #define CARL9170_RX_FILTER_OTHER_RA     0x02
 179 #define CARL9170_RX_FILTER_DECRY_FAIL   0x04
 180 #define CARL9170_RX_FILTER_CTL_OTHER    0x08
 181 #define CARL9170_RX_FILTER_CTL_PSPOLL   0x10
 182 #define CARL9170_RX_FILTER_CTL_BACKR    0x20
 183 #define CARL9170_RX_FILTER_MGMT         0x40
 184 #define CARL9170_RX_FILTER_DATA         0x80
 185 #define CARL9170_RX_FILTER_EVERYTHING   (~0)
 186
 187 struct carl9170_bcn_ctrl_cmd {
 188         __le32          vif_id;
 189         __le32          mode;
 190         __le32          bcn_addr;
 191         __le32          bcn_len;
 192 } __packed;
 193 #define CARL9170_BCN_CTRL_CMD_SIZE      16
 194
 195 #define CARL9170_BCN_CTRL_DRAIN 0
 196 #define CARL9170_BCN_CTRL_CAB_TRIGGER   1
 197
 198 struct carl9170_wol_cmd {
 199         __le32          flags;
 200         u8              mac[6];
 201         u8              bssid[6];
 202         __le32          null_interval;
 203         __le32          free_for_use2;
 204         __le32          mask;
 205         u8              pattern[32];
 206 } __packed;
 207
 208 #define CARL9170_WOL_CMD_SIZE           60
 209
 210 #define CARL9170_WOL_DISCONNECT         1
 211 #define CARL9170_WOL_MAGIC_PKT          2
 212
 213 struct carl9170_cmd_head {
 214         union {
 215                 struct {
 216                         u8      len;
 217                         u8      cmd;
 218                         u8      seq;
 219                         u8      ext;
 220                 } __packed;
 221
 222                 u32 hdr_data;
 223         } __packed;
 224 } __packed;
 225
 226 struct carl9170_cmd {
 227         struct carl9170_cmd_head hdr;
 228         union {
 229                 struct carl9170_set_key_cmd     setkey;
 230                 struct carl9170_disable_key_cmd disablekey;
 231                 struct carl9170_u32_list        echo;
 232                 struct carl9170_reg_list        rreg;
 233                 struct carl9170_write_reg       wreg;
 234                 struct carl9170_rf_init         rf_init;
 235                 struct carl9170_psm             psm;
 236                 struct carl9170_wol_cmd         wol;
 237                 struct carl9170_bcn_ctrl_cmd    bcn_ctrl;
 238                 struct carl9170_rx_filter_cmd   rx_filter;
 239                 u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
 240         } __packed;
 241 } __packed __aligned(4);
 242
 243 #define CARL9170_TX_STATUS_QUEUE        3
 244 #define CARL9170_TX_STATUS_QUEUE_S      0
 245 #define CARL9170_TX_STATUS_RIX_S        2
 246 #define CARL9170_TX_STATUS_RIX          (3 << CARL9170_TX_STATUS_RIX_S)
 247 #define CARL9170_TX_STATUS_TRIES_S      4
 248 #define CARL9170_TX_STATUS_TRIES        (7 << CARL9170_TX_STATUS_TRIES_S)
 249 #define CARL9170_TX_STATUS_SUCCESS      0x80
 250
 251 #ifdef __CARL9170FW__
 252 /*
 253  * NOTE:
 254  * Both structs [carl9170_tx_status and _carl9170_tx_status]
 255  * need to be "bit for bit" in sync.
 256  */
 257 struct carl9170_tx_status {
 258         /*
 259          * Beware of compiler bugs in all gcc pre 4.4!
 260          */
 261
 262         u8 cookie;
 263         u8 queue:2;
 264         u8 rix:2;
 265         u8 tries:3;
 266         u8 success:1;
 267 } __packed;
 268 #endif /* __CARL9170FW__ */
 269
 270 struct _carl9170_tx_status {
 271         /*
 272          * This version should be immune to all alignment bugs.
 273          */
 274
 275         u8 cookie;
 276         u8 info;
 277 } __packed;
 278 #define CARL9170_TX_STATUS_SIZE         2
 279
 280 #define CARL9170_RSP_TX_STATUS_NUM      (CARL9170_MAX_CMD_PAYLOAD_LEN / \
 281                                          sizeof(struct _carl9170_tx_status))
 282
 283 #define CARL9170_TX_MAX_RATE_TRIES      7
 284
 285 #define CARL9170_TX_MAX_RATES           4
 286 #define CARL9170_TX_MAX_RETRY_RATES     (CARL9170_TX_MAX_RATES - 1)
 287 #define CARL9170_ERR_MAGIC              "ERR:"
 288 #define CARL9170_BUG_MAGIC              "BUG:"
 289
 290 struct carl9170_gpio {
 291         __le32 gpio;
 292 } __packed;
 293 #define CARL9170_GPIO_SIZE              4
 294
 295 struct carl9170_tsf_rsp {
 296         union {
 297                 __le32 tsf[2];
 298                 __le64 tsf_64;
 299         } __packed;
 300 } __packed;
 301 #define CARL9170_TSF_RSP_SIZE           8
 302
 303 struct carl9170_tally_rsp {
 304         __le32 active;
 305         __le32 cca;
 306         __le32 tx_time;
 307         __le32 rx_total;
 308         __le32 rx_overrun;
 309         __le32 tick;
 310 } __packed;
 311
 312 struct carl9170_rsp {
 313         struct carl9170_cmd_head hdr;
 314
 315         union {
 316                 struct carl9170_rf_init_result  rf_init_res;
 317                 struct carl9170_u32_list        rreg_res;
 318                 struct carl9170_u32_list        echo;
 319 #ifdef __CARL9170FW__
 320                 struct carl9170_tx_status       tx_status[0];
 321 #endif /* __CARL9170FW__ */
 322                 struct _carl9170_tx_status      _tx_status[0];
 323                 struct carl9170_gpio            gpio;
 324                 struct carl9170_tsf_rsp         tsf;
 325                 struct carl9170_psm             psm;
 326                 struct carl9170_tally_rsp       tally;
 327                 u8 data[CARL9170_MAX_CMD_PAYLOAD_LEN];
 328         } __packed;
 329 } __packed __aligned(4);
 330
 331 #endif /* __CARL9170_SHARED_FWCMD_H */