disassembler/main.c

   1 /*
   2  *   Copyright (C) 2006-2010  Michael Buesch <mb@bu3sch.de>
   3  *
   4  *   This program is free software; you can redistribute it and/or modify
   5  *   it under the terms of the GNU General Public License version 2
   6  *   as published by the Free Software Foundation.
   7  *
   8  *   This program is distributed in the hope that it will be useful,
   9  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  *   GNU General Public License for more details.
  12  */
  13
  14 #include "main.h"
  15 #include "list.h"
  16 #include "util.h"
  17 #include "args.h"
  18
  19 #include <stdio.h>
  20 #include <stdint.h>
  21 #include <stdlib.h>
  22 #include <string.h>
  23
  24
  25 struct bin_instruction {
  26         unsigned int opcode;
  27         unsigned int operands[3];
  28 };
  29
  30 struct statement {
  31         enum {
  32                 STMT_INSN,
  33                 STMT_LABEL,
  34         } type;
  35
  36         union {
  37                 struct {
  38                         struct bin_instruction *bin;
  39                         const char *name;
  40                         const char *operands[5];
  41
  42                         int is_labelref;
  43                         unsigned int labeladdr;
  44                         struct statement *labelref;
  45                 } insn;
  46                 struct {
  47                         char *name;
  48                 } label;
  49         } u;
  50
  51         struct list_head list;
  52 };
  53
  54 struct disassembler_context {
  55         /* The architecture of the input file. */
  56         unsigned int arch;
  57
  58         struct bin_instruction *code;
  59         size_t nr_insns;
  60
  61         struct list_head stmt_list;
  62 };
  63
  64
  65 FILE *infile;
  66 FILE *outfile;
  67 const char *infile_name;
  68 const char *outfile_name;
  69
  70
  71 #define _msg_helper(type, msg, x...)    do {            \
  72         fprintf(stderr, "Disassembler " type            \
  73                 ":\n  " msg "\n" ,##x);                 \
  74                                         } while (0)
  75
  76 #define dasm_error(msg, x...)   do {            \
  77         _msg_helper("ERROR", msg ,##x);         \
  78         exit(1);                                \
  79                                 } while (0)
  80
  81 #define dasm_int_error(msg, x...) \
  82         dasm_error("Internal error (bug): " msg ,##x)
  83
  84 #define dasm_warn(msg, x...)    \
  85         _msg_helper("warning", msg ,##x)
  86
  87 #define asm_info(msg, x...)     \
  88         _msg_helper("info", msg ,##x)
  89
  90 static const char * gen_raw_code(unsigned int operand)
  91 {
  92         char *ret;
  93
  94         ret = xmalloc(6);
  95         snprintf(ret, 6, "@%X", operand);
  96
  97         return ret;
  98 }
  99
 100 static const char * disasm_mem_operand(unsigned int operand)
 101 {
 102         char *ret;
 103
 104         ret = xmalloc(9);
 105         snprintf(ret, 9, "[0x%X]", operand);
 106
 107         return ret;
 108 }
 109
 110 static const char * disasm_indirect_mem_operand(unsigned int operand)
 111 {
 112         char *ret;
 113         unsigned int offset, reg;
 114
 115         switch (cmdargs.arch) {
 116         case 5:
 117                 offset = (operand & 0x3F);
 118                 reg = ((operand >> 6) & 0x7);
 119                 break;
 120         case 15:
 121                 offset = (operand & 0x7F);
 122                 reg = ((operand >> 7) & 0x7);
 123                 break;
 124         default:
 125                 dasm_int_error("disasm_indirect_mem_operand invalid arch");
 126         }
 127         ret = xmalloc(12);
 128         snprintf(ret, 12, "[0x%02X,off%u]", offset, reg);
 129
 130         return ret;
 131 }
 132
 133 static const char * disasm_imm_operand(unsigned int operand)
 134 {
 135         char *ret;
 136         unsigned int signmask;
 137         unsigned int mask;
 138
 139         switch (cmdargs.arch) {
 140         case 5:
 141                 signmask = (1 << 9);
 142                 mask = 0x3FF;
 143                 break;
 144         case 15:
 145                 signmask = (1 << 10);
 146                 mask = 0x7FF;
 147                 break;
 148         default:
 149                 dasm_int_error("disasm_imm_operand invalid arch");
 150         }
 151
 152         operand &= mask;
 153
 154         ret = xmalloc(7);
 155         if (operand & signmask)
 156                 operand = (operand | (~mask & 0xFFFF));
 157         snprintf(ret, 7, "0x%X", operand);
 158
 159         return ret;
 160 }
 161
 162 static const char * disasm_spr_operand(unsigned int operand)
 163 {
 164         char *ret;
 165         unsigned int mask;
 166
 167         switch (cmdargs.arch) {
 168         case 5:
 169                 mask = 0x1FF;
 170                 break;
 171         case 15:
 172                 mask = 0x7FF;
 173                 break;
 174         default:
 175                 dasm_int_error("disasm_spr_operand invalid arch");
 176         }
 177
 178         ret = xmalloc(8);
 179         snprintf(ret, 8, "spr%X", (operand & mask));
 180
 181         return ret;
 182 }
 183
 184 static const char * disasm_gpr_operand(unsigned int operand)
 185 {
 186         char *ret;
 187         unsigned int mask;
 188
 189         switch (cmdargs.arch) {
 190         case 5:
 191                 mask = 0x3F;
 192                 break;
 193         case 15:
 194                 mask = 0x7F;
 195                 break;
 196         default:
 197                 dasm_int_error("disasm_gpr_operand invalid arch");
 198         }
 199
 200         ret = xmalloc(5);
 201         snprintf(ret, 5, "r%u", (operand & mask));
 202
 203         return ret;
 204 }
 205
 206 static void disasm_raw_operand(struct statement *stmt,
 207                                int oper_idx,
 208                                int out_idx)
 209 {
 210         unsigned int operand = stmt->u.insn.bin->operands[oper_idx];
 211
 212         stmt->u.insn.operands[out_idx] = gen_raw_code(operand);
 213 }
 214
 215 static void disasm_std_operand(struct statement *stmt,
 216                                int oper_idx,
 217                                int out_idx)
 218 {
 219         unsigned int operand = stmt->u.insn.bin->operands[oper_idx];
 220
 221         switch (cmdargs.arch) {
 222         case 5:
 223                 if (!(operand & 0x800)) {
 224                         stmt->u.insn.operands[out_idx] = disasm_mem_operand(operand);
 225                         return;
 226                 } else if ((operand & 0xC00) == 0xC00) {
 227                         stmt->u.insn.operands[out_idx] = disasm_imm_operand(operand);
 228                         return;
 229                 } else if ((operand & 0xFC0) == 0xBC0) {
 230                         stmt->u.insn.operands[out_idx] = disasm_gpr_operand(operand);
 231                         return;
 232                 } else if ((operand & 0xE00) == 0x800) {
 233                         stmt->u.insn.operands[out_idx] = disasm_spr_operand(operand);
 234                         return;
 235                 } else if ((operand & 0xE00) == 0xA00) {
 236                         stmt->u.insn.operands[out_idx] = disasm_indirect_mem_operand(operand);
 237                         return;
 238                 }
 239                 break;
 240         case 15:
 241                 if (!(operand & 0x1000)) {
 242                         stmt->u.insn.operands[out_idx] = disasm_mem_operand(operand);
 243                         return;
 244                 } else if ((operand & 0x1800) == 0x1800) {
 245                         stmt->u.insn.operands[out_idx] = disasm_imm_operand(operand);
 246                         return;
 247                 } else if ((operand & 0x1F80) == 0x1780) {
 248                         stmt->u.insn.operands[out_idx] = disasm_gpr_operand(operand);
 249                         return;
 250                 } else if ((operand & 0x1C00) == 0x1000) {
 251                         stmt->u.insn.operands[out_idx] = disasm_spr_operand(operand);
 252                         return;
 253                 } else if ((operand & 0x1C00) == 0x1400) {
 254                         stmt->u.insn.operands[out_idx] = disasm_indirect_mem_operand(operand);
 255                         return;
 256                 }
 257                 break;
 258         default:
 259                 dasm_int_error("disasm_std_operand invalid arch");
 260         }
 261         /* No luck. Disassemble to raw operand. */
 262         disasm_raw_operand(stmt, oper_idx, out_idx);
 263 }
 264
 265 static void disasm_opcode_raw(struct disassembler_context *ctx,
 266                               struct statement *stmt,
 267                               int raw_operands)
 268 {
 269         stmt->u.insn.name = gen_raw_code(stmt->u.insn.bin->opcode);
 270         if (raw_operands) {
 271                 disasm_raw_operand(stmt, 0, 0);
 272                 disasm_raw_operand(stmt, 1, 1);
 273                 disasm_raw_operand(stmt, 2, 2);
 274         } else {
 275                 disasm_std_operand(stmt, 0, 0);
 276                 disasm_std_operand(stmt, 1, 1);
 277                 disasm_std_operand(stmt, 2, 2);
 278         }
 279 }
 280
 281 static void disasm_constant_opcodes(struct disassembler_context *ctx,
 282                                     struct statement *stmt)
 283 {
 284         struct bin_instruction *bin = stmt->u.insn.bin;
 285
 286         switch (bin->opcode) {
 287         case 0x1C0:
 288                 stmt->u.insn.name = "add";
 289                 disasm_std_operand(stmt, 0, 0);
 290                 disasm_std_operand(stmt, 1, 1);
 291                 disasm_std_operand(stmt, 2, 2);
 292                 break;
 293         case 0x1C2:
 294                 stmt->u.insn.name = "add.";
 295                 disasm_std_operand(stmt, 0, 0);
 296                 disasm_std_operand(stmt, 1, 1);
 297                 disasm_std_operand(stmt, 2, 2);
 298                 break;
 299         case 0x1C1:
 300                 stmt->u.insn.name = "addc";
 301                 disasm_std_operand(stmt, 0, 0);
 302                 disasm_std_operand(stmt, 1, 1);
 303                 disasm_std_operand(stmt, 2, 2);
 304                 break;
 305         case 0x1C3:
 306                 stmt->u.insn.name = "addc.";
 307                 disasm_std_operand(stmt, 0, 0);
 308                 disasm_std_operand(stmt, 1, 1);
 309                 disasm_std_operand(stmt, 2, 2);
 310                 break;
 311         case 0x1D0:
 312                 stmt->u.insn.name = "sub";
 313                 disasm_std_operand(stmt, 0, 0);
 314                 disasm_std_operand(stmt, 1, 1);
 315                 disasm_std_operand(stmt, 2, 2);
 316                 break;
 317         case 0x1D2:
 318                 stmt->u.insn.name = "sub.";
 319                 disasm_std_operand(stmt, 0, 0);
 320                 disasm_std_operand(stmt, 1, 1);
 321                 disasm_std_operand(stmt, 2, 2);
 322                 break;
 323         case 0x1D1:
 324                 stmt->u.insn.name = "subc";
 325                 disasm_std_operand(stmt, 0, 0);
 326                 disasm_std_operand(stmt, 1, 1);
 327                 disasm_std_operand(stmt, 2, 2);
 328                 break;
 329         case 0x1D3:
 330                 stmt->u.insn.name = "subc.";
 331                 disasm_std_operand(stmt, 0, 0);
 332                 disasm_std_operand(stmt, 1, 1);
 333                 disasm_std_operand(stmt, 2, 2);
 334                 break;
 335         case 0x130:
 336                 stmt->u.insn.name = "sra";
 337                 disasm_std_operand(stmt, 0, 0);
 338                 disasm_std_operand(stmt, 1, 1);
 339                 disasm_std_operand(stmt, 2, 2);
 340                 break;
 341         case 0x160:
 342                 stmt->u.insn.name = "or";
 343                 disasm_std_operand(stmt, 0, 0);
 344                 disasm_std_operand(stmt, 1, 1);
 345                 disasm_std_operand(stmt, 2, 2);
 346                 break;
 347         case 0x140:
 348                 stmt->u.insn.name = "and";
 349                 disasm_std_operand(stmt, 0, 0);
 350                 disasm_std_operand(stmt, 1, 1);
 351                 disasm_std_operand(stmt, 2, 2);
 352                 break;
 353         case 0x170:
 354                 stmt->u.insn.name = "xor";
 355                 disasm_std_operand(stmt, 0, 0);
 356                 disasm_std_operand(stmt, 1, 1);
 357                 disasm_std_operand(stmt, 2, 2);
 358                 break;
 359         case 0x120:
 360                 stmt->u.insn.name = "sr";
 361                 disasm_std_operand(stmt, 0, 0);
 362                 disasm_std_operand(stmt, 1, 1);
 363                 disasm_std_operand(stmt, 2, 2);
 364                 break;
 365         case 0x110:
 366                 stmt->u.insn.name = "sl";
 367                 disasm_std_operand(stmt, 0, 0);
 368                 disasm_std_operand(stmt, 1, 1);
 369                 disasm_std_operand(stmt, 2, 2);
 370                 break;
 371         case 0x1A0:
 372                 stmt->u.insn.name = "rl";
 373                 disasm_std_operand(stmt, 0, 0);
 374                 disasm_std_operand(stmt, 1, 1);
 375                 disasm_std_operand(stmt, 2, 2);
 376                 break;
 377         case 0x1B0:
 378                 stmt->u.insn.name = "rr";
 379                 disasm_std_operand(stmt, 0, 0);
 380                 disasm_std_operand(stmt, 1, 1);
 381                 disasm_std_operand(stmt, 2, 2);
 382                 break;
 383         case 0x150:
 384                 stmt->u.insn.name = "nand";
 385                 disasm_std_operand(stmt, 0, 0);
 386                 disasm_std_operand(stmt, 1, 1);
 387                 disasm_std_operand(stmt, 2, 2);
 388                 break;
 389         case 0x040:
 390                 stmt->u.insn.name = "jand";
 391                 stmt->u.insn.is_labelref = 2;
 392                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 393                 disasm_std_operand(stmt, 0, 0);
 394                 disasm_std_operand(stmt, 1, 1);
 395                 break;
 396         case (0x040 | 0x1):
 397                 stmt->u.insn.name = "jnand";
 398                 stmt->u.insn.is_labelref = 2;
 399                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 400                 disasm_std_operand(stmt, 0, 0);
 401                 disasm_std_operand(stmt, 1, 1);
 402                 break;
 403         case 0x050:
 404                 stmt->u.insn.name = "js";
 405                 stmt->u.insn.is_labelref = 2;
 406                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 407                 disasm_std_operand(stmt, 0, 0);
 408                 disasm_std_operand(stmt, 1, 1);
 409                 break;
 410         case (0x050 | 0x1):
 411                 stmt->u.insn.name = "jns";
 412                 stmt->u.insn.is_labelref = 2;
 413                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 414                 disasm_std_operand(stmt, 0, 0);
 415                 disasm_std_operand(stmt, 1, 1);
 416                 break;
 417         case 0x0D0:
 418                 stmt->u.insn.name = "je";
 419                 stmt->u.insn.is_labelref = 2;
 420                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 421                 disasm_std_operand(stmt, 0, 0);
 422                 disasm_std_operand(stmt, 1, 1);
 423                 break;
 424         case (0x0D0 | 0x1):
 425                 stmt->u.insn.name = "jne";
 426                 stmt->u.insn.is_labelref = 2;
 427                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 428                 disasm_std_operand(stmt, 0, 0);
 429                 disasm_std_operand(stmt, 1, 1);
 430                 break;
 431         case 0x0D2:
 432                 stmt->u.insn.name = "jls";
 433                 stmt->u.insn.is_labelref = 2;
 434                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 435                 disasm_std_operand(stmt, 0, 0);
 436                 disasm_std_operand(stmt, 1, 1);
 437                 break;
 438         case (0x0D2 | 0x1):
 439                 stmt->u.insn.name = "jges";
 440                 stmt->u.insn.is_labelref = 2;
 441                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 442                 disasm_std_operand(stmt, 0, 0);
 443                 disasm_std_operand(stmt, 1, 1);
 444                 break;
 445         case 0x0D4:
 446                 stmt->u.insn.name = "jgs";
 447                 stmt->u.insn.is_labelref = 2;
 448                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 449                 disasm_std_operand(stmt, 0, 0);
 450                 disasm_std_operand(stmt, 1, 1);
 451                 break;
 452         case (0x0D4 | 0x1):
 453                 stmt->u.insn.name = "jles";
 454                 stmt->u.insn.is_labelref = 2;
 455                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 456                 disasm_std_operand(stmt, 0, 0);
 457                 disasm_std_operand(stmt, 1, 1);
 458                 break;
 459         case 0x0DA:
 460                 stmt->u.insn.name = "jl";
 461                 stmt->u.insn.is_labelref = 2;
 462                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 463                 disasm_std_operand(stmt, 0, 0);
 464                 disasm_std_operand(stmt, 1, 1);
 465                 break;
 466         case (0x0DA | 0x1):
 467                 stmt->u.insn.name = "jge";
 468                 stmt->u.insn.is_labelref = 2;
 469                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 470                 disasm_std_operand(stmt, 0, 0);
 471                 disasm_std_operand(stmt, 1, 1);
 472                 break;
 473         case 0x0DC:
 474                 stmt->u.insn.name = "jg";
 475                 stmt->u.insn.is_labelref = 2;
 476                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 477                 disasm_std_operand(stmt, 0, 0);
 478                 disasm_std_operand(stmt, 1, 1);
 479                 break;
 480         case (0x0DC | 0x1):
 481                 stmt->u.insn.name = "jle";
 482                 stmt->u.insn.is_labelref = 2;
 483                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 484                 disasm_std_operand(stmt, 0, 0);
 485                 disasm_std_operand(stmt, 1, 1);
 486                 break;
 487         case 0x002: {
 488                 char *str;
 489
 490                 switch (cmdargs.arch) {
 491                 case 5:
 492                         stmt->u.insn.name = "call";
 493                         stmt->u.insn.is_labelref = 1;
 494                         stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 495                         str = xmalloc(4);
 496                         snprintf(str, 4, "lr%u", stmt->u.insn.bin->operands[0]);
 497                         stmt->u.insn.operands[0] = str;
 498                         break;
 499                 case 15:
 500                         //FIXME: This opcode is different on r15. Decode raw for now.
 501                         disasm_opcode_raw(ctx, stmt, 1);
 502                         break;
 503                 }
 504                 break;
 505         }
 506         case 0x003: {
 507                 char *str;
 508
 509                 stmt->u.insn.name = "ret";
 510                 str = xmalloc(4);
 511                 snprintf(str, 4, "lr%u", stmt->u.insn.bin->operands[0]);
 512                 stmt->u.insn.operands[0] = str;
 513                 str = xmalloc(4);
 514                 snprintf(str, 4, "lr%u", stmt->u.insn.bin->operands[2]);
 515                 stmt->u.insn.operands[2] = str;
 516                 break;
 517         }
 518 //TODO also implement it in the assembler
 519 #if 0
 520         case 0x004: {
 521                 if (cmdargs.arch != 15) {
 522                         dasm_error("arch 15 call instruction found in arch %d binary",
 523                                    cmdargs.arch);
 524                 }
 525                 stmt->u.insn.name = "call";
 526                 stmt->u.insn.is_labelref = 0;
 527                 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 528                 if (stmt->u.insn.bin->operands[0] != 0x1780 ||
 529                     stmt->u.insn.bin->operands[1] != 0x1780)
 530                         dasm_warn("r15 call: Invalid first or second argument");
 531                 break;
 532         }
 533         case 0x005: {
 534                 if (cmdargs.arch != 15) {
 535                         dasm_error("arch 15 ret instruction found in arch %d binary",
 536                                    cmdargs.arch);
 537                 }
 538                 stmt->u.insn.name = "ret";
 539                 break;
 540         }
 541 #endif
 542         case 0x1E0: {
 543                 unsigned int flags, mask;
 544
 545                 switch (cmdargs.arch) {
 546                 case 5:
 547                         mask = 0x3FF;
 548                         break;
 549                 case 15:
 550                         mask = 0x7FF;
 551                         break;
 552                 default:
 553                         dasm_int_error("TKIP invalid arch");
 554                 }
 555
 556                 flags = stmt->u.insn.bin->operands[1];
 557                 switch (flags & mask) {
 558                 case 0x1:
 559                         stmt->u.insn.name = "tkiph";
 560                         break;
 561                 case (0x1 | 0x2):
 562                         stmt->u.insn.name = "tkiphs";
 563                         break;
 564                 case 0x0:
 565                         stmt->u.insn.name = "tkipl";
 566                         break;
 567                 case (0x0 | 0x2):
 568                         stmt->u.insn.name = "tkipls";
 569                         break;
 570                 default:
 571                         dasm_error("Invalid TKIP flags %X", flags);
 572                 }
 573                 disasm_std_operand(stmt, 0, 0);
 574                 disasm_std_operand(stmt, 2, 2);
 575                 break;
 576         }
 577         case 0x001: {
 578                 unsigned int mask;
 579
 580                 stmt->u.insn.name = "nap";
 581                 switch (cmdargs.arch) {
 582                 case 5:
 583                         mask = 0xBC0;
 584                         break;
 585                 case 15:
 586                         mask = 0x1780;
 587                         break;
 588                 default:
 589                         dasm_int_error("NAP invalid arch");
 590                 }
 591                 if (stmt->u.insn.bin->operands[0] != mask) {
 592                         dasm_warn("NAP: invalid first argument 0x%04X\n",
 593                                   stmt->u.insn.bin->operands[0]);
 594                 }
 595                 if (stmt->u.insn.bin->operands[1] != mask) {
 596                         dasm_warn("NAP: invalid second argument 0x%04X\n",
 597                                   stmt->u.insn.bin->operands[1]);
 598                 }
 599                 if (stmt->u.insn.bin->operands[2] != 0) {
 600                         dasm_warn("NAP: invalid third argument 0x%04X\n",
 601                                   stmt->u.insn.bin->operands[2]);
 602                 }
 603                 break;
 604         }
 605         default:
 606                 disasm_opcode_raw(ctx, stmt, (cmdargs.unknown_decode == 0));
 607                 break;
 608         }
 609 }
 610
 611 static void disasm_opcodes(struct disassembler_context *ctx)
 612 {
 613         struct bin_instruction *bin;
 614         size_t i;
 615         struct statement *stmt;
 616         char *str;
 617
 618         for (i = 0; i < ctx->nr_insns; i++) {
 619                 bin = &(ctx->code[i]);
 620
 621                 stmt = xmalloc(sizeof(struct statement));
 622                 stmt->type = STMT_INSN;
 623                 INIT_LIST_HEAD(&stmt->list);
 624                 stmt->u.insn.bin = bin;
 625                 stmt->u.insn.is_labelref = -1;
 626
 627                 switch (bin->opcode & 0xF00) {
 628                 case 0x200:
 629                         stmt->u.insn.name = "srx";
 630
 631                         str = xmalloc(3);
 632                         snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
 633                         stmt->u.insn.operands[0] = str;
 634                         str = xmalloc(3);
 635                         snprintf(str, 3, "%d", (bin->opcode & 0x00F));
 636                         stmt->u.insn.operands[1] = str;
 637
 638                         disasm_std_operand(stmt, 0, 2);
 639                         disasm_std_operand(stmt, 1, 3);
 640                         disasm_std_operand(stmt, 2, 4);
 641                         break;
 642                 case 0x300:
 643                         stmt->u.insn.name = "orx";
 644
 645                         str = xmalloc(3);
 646                         snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
 647                         stmt->u.insn.operands[0] = str;
 648                         str = xmalloc(3);
 649                         snprintf(str, 3, "%d", (bin->opcode & 0x00F));
 650                         stmt->u.insn.operands[1] = str;
 651
 652                         disasm_std_operand(stmt, 0, 2);
 653                         disasm_std_operand(stmt, 1, 3);
 654                         disasm_std_operand(stmt, 2, 4);
 655                         break;
 656                 case 0x400:
 657                         stmt->u.insn.name = "jzx";
 658
 659                         str = xmalloc(3);
 660                         snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
 661                         stmt->u.insn.operands[0] = str;
 662                         str = xmalloc(3);
 663                         snprintf(str, 3, "%d", (bin->opcode & 0x00F));
 664                         stmt->u.insn.operands[1] = str;
 665
 666                         disasm_std_operand(stmt, 0, 2);
 667                         disasm_std_operand(stmt, 1, 3);
 668                         stmt->u.insn.is_labelref = 4;
 669                         stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 670                         break;
 671                 case 0x500:
 672                         stmt->u.insn.name = "jnzx";
 673
 674                         str = xmalloc(3);
 675                         snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
 676                         stmt->u.insn.operands[0] = str;
 677                         str = xmalloc(3);
 678                         snprintf(str, 3, "%d", (bin->opcode & 0x00F));
 679                         stmt->u.insn.operands[1] = str;
 680
 681                         disasm_std_operand(stmt, 0, 2);
 682                         disasm_std_operand(stmt, 1, 3);
 683                         stmt->u.insn.is_labelref = 4;
 684                         stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 685                         break;
 686                 case 0x600:
 687                         stmt->u.insn.name = "jnext";
 688
 689                         str = xmalloc(5);
 690                         snprintf(str, 5, "0x%02X", (bin->opcode & 0x0FF));
 691                         stmt->u.insn.operands[0] = str;
 692
 693                         /* We don't disassemble the first and second operand, as
 694                          * that always is a dummy r0 operand.
 695                          * disasm_std_operand(stmt, 0, 1);
 696                          * disasm_std_operand(stmt, 1, 2);
 697                          * stmt->u.insn.is_labelref = 3;
 698                          */
 699                         stmt->u.insn.is_labelref = 1;
 700                         stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 701                         break;
 702                 case 0x700:
 703                         stmt->u.insn.name = "jext";
 704
 705                         str = xmalloc(5);
 706                         snprintf(str, 5, "0x%02X", (bin->opcode & 0x0FF));
 707                         stmt->u.insn.operands[0] = str;
 708
 709                         /* We don't disassemble the first and second operand, as
 710                          * that always is a dummy r0 operand.
 711                          * disasm_std_operand(stmt, 0, 1);
 712                          * disasm_std_operand(stmt, 1, 2);
 713                          * stmt->u.insn.is_labelref = 3;
 714                          */
 715                         stmt->u.insn.is_labelref = 1;
 716                         stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
 717                         break;
 718                 default:
 719                         disasm_constant_opcodes(ctx, stmt);
 720                         break;
 721                 }
 722
 723                 list_add_tail(&stmt->list, &ctx->stmt_list);
 724         }
 725 }
 726
 727 static struct statement * get_label_at(struct disassembler_context *ctx,
 728                                        unsigned int addr)
 729 {
 730         unsigned int addrcnt = 0;
 731         struct statement *stmt, *ret, *prev;
 732
 733         list_for_each_entry(stmt, &ctx->stmt_list, list) {
 734                 if (stmt->type != STMT_INSN)
 735                         continue;
 736                 if (addrcnt == addr) {
 737                         prev = list_entry(stmt->list.prev, struct statement, list);
 738                         if (prev->type == STMT_LABEL)
 739                                 return prev;
 740                         ret = xmalloc(sizeof(struct statement));
 741                         INIT_LIST_HEAD(&ret->list);
 742                         ret->type = STMT_LABEL;
 743                         list_add(&ret->list, &prev->list);
 744
 745                         return ret;
 746                 }
 747                 addrcnt++;
 748         }
 749
 750         return NULL;
 751 }
 752
 753 static void resolve_labels(struct disassembler_context *ctx)
 754 {
 755         struct statement *stmt;
 756         struct statement *label;
 757         struct statement *n;
 758         unsigned int labeladdr;
 759         unsigned int namecnt = 0;
 760
 761         /* Resolve label references */
 762         list_for_each_entry_safe(stmt, n, &ctx->stmt_list, list) {
 763                 if (stmt->type != STMT_INSN)
 764                         continue;
 765                 if (stmt->u.insn.is_labelref == -1)
 766                         continue;
 767                 labeladdr = stmt->u.insn.labeladdr;
 768                 label = get_label_at(ctx, labeladdr);
 769                 if (!label)
 770                         dasm_error("Labeladdress %X out of bounds", labeladdr);
 771                 stmt->u.insn.labelref = label;
 772         }
 773
 774         /* Name the labels */
 775         list_for_each_entry(stmt, &ctx->stmt_list, list) {
 776                 if (stmt->type != STMT_LABEL)
 777                         continue;
 778                 stmt->u.label.name = xmalloc(20);
 779                 snprintf(stmt->u.label.name, 20, "L%u", namecnt);
 780                 namecnt++;
 781         }
 782 }
 783
 784 static void emit_asm(struct disassembler_context *ctx)
 785 {
 786         struct statement *stmt;
 787         int first, i;
 788         int err;
 789         unsigned int addr = 0;
 790
 791         err = open_output_file();
 792         if (err)
 793                 exit(1);
 794
 795         fprintf(outfile, "%%arch %u\n", ctx->arch);
 796         fprintf(outfile, "%%start entry\n\n");
 797         fprintf(outfile, "entry:\n");
 798         list_for_each_entry(stmt, &ctx->stmt_list, list) {
 799                 switch (stmt->type) {
 800                 case STMT_INSN:
 801                         if (cmdargs.print_addresses)
 802                                 fprintf(outfile, "/* %03X */", addr);
 803                         fprintf(outfile, "\t%s", stmt->u.insn.name);
 804                         first = 1;
 805                         for (i = 0; i < ARRAY_SIZE(stmt->u.insn.operands); i++) {
 806                                 if (!stmt->u.insn.operands[i] &&
 807                                     stmt->u.insn.is_labelref != i)
 808                                         continue;
 809                                 if (first)
 810                                         fprintf(outfile, "\t");
 811                                 if (!first)
 812                                         fprintf(outfile, ", ");
 813                                 first = 0;
 814                                 if (stmt->u.insn.is_labelref == i) {
 815                                         fprintf(outfile, "%s",
 816                                                 stmt->u.insn.labelref->u.label.name);
 817                                 } else {
 818                                         fprintf(outfile, "%s",
 819                                                 stmt->u.insn.operands[i]);
 820                                 }
 821                         }
 822                         fprintf(outfile, "\n");
 823                         addr++;
 824                         break;
 825                 case STMT_LABEL:
 826                         fprintf(outfile, "%s:\n", stmt->u.label.name);
 827                         break;
 828                 }
 829         }
 830
 831         close_output_file();
 832 }
 833
 834 static int read_input(struct disassembler_context *ctx)
 835 {
 836         size_t size = 0, pos = 0;
 837         size_t ret;
 838         struct bin_instruction *code = NULL;
 839         unsigned char tmp[sizeof(uint64_t)];
 840         uint64_t codeword;
 841         struct fw_header hdr;
 842         int err;
 843
 844         err = open_input_file();
 845         if (err)
 846                 goto error;
 847
 848         switch (cmdargs.informat) {
 849         case FMT_RAW_LE32:
 850         case FMT_RAW_BE32:
 851                 /* Nothing */
 852                 break;
 853         case FMT_B43:
 854                 ret = fread(&hdr, 1, sizeof(hdr), infile);
 855                 if (ret != sizeof(hdr)) {
 856                         fprintf(stderr, "Corrupt input file (not fwcutter output)\n");
 857                         goto err_close;
 858                 }
 859                 if (hdr.type != FW_TYPE_UCODE) {
 860                         fprintf(stderr, "Corrupt input file. Not a microcode image.\n");
 861                         goto err_close;
 862                 }
 863                 if (hdr.ver != FW_HDR_VER) {
 864                         fprintf(stderr, "Invalid input file header version.\n");
 865                         goto err_close;
 866                 }
 867                 break;
 868         }
 869
 870         while (1) {
 871                 if (pos >= size) {
 872                         size += 512;
 873                         code = xrealloc(code, size * sizeof(struct bin_instruction));
 874                 }
 875                 ret = fread(tmp, 1, sizeof(uint64_t), infile);
 876                 if (!ret)
 877                         break;
 878                 if (ret != sizeof(uint64_t)) {
 879                         fprintf(stderr, "Corrupt input file (not 8 byte aligned)\n");
 880                         goto err_free_code;
 881                 }
 882
 883                 switch (cmdargs.informat) {
 884                 case FMT_B43:
 885                 case FMT_RAW_BE32:
 886                         codeword = 0;
 887                         codeword |= ((uint64_t)tmp[0]) << 56;
 888                         codeword |= ((uint64_t)tmp[1]) << 48;
 889                         codeword |= ((uint64_t)tmp[2]) << 40;
 890                         codeword |= ((uint64_t)tmp[3]) << 32;
 891                         codeword |= ((uint64_t)tmp[4]) << 24;
 892                         codeword |= ((uint64_t)tmp[5]) << 16;
 893                         codeword |= ((uint64_t)tmp[6]) << 8;
 894                         codeword |= ((uint64_t)tmp[7]);
 895                         codeword = ((codeword & (uint64_t)0xFFFFFFFF00000000ULL) >> 32) |
 896                                    ((codeword & (uint64_t)0x00000000FFFFFFFFULL) << 32);
 897                         break;
 898                 case FMT_RAW_LE32:
 899                         codeword = 0;
 900                         codeword |= ((uint64_t)tmp[7]) << 56;
 901                         codeword |= ((uint64_t)tmp[6]) << 48;
 902                         codeword |= ((uint64_t)tmp[5]) << 40;
 903                         codeword |= ((uint64_t)tmp[4]) << 32;
 904                         codeword |= ((uint64_t)tmp[3]) << 24;
 905                         codeword |= ((uint64_t)tmp[2]) << 16;
 906                         codeword |= ((uint64_t)tmp[1]) << 8;
 907                         codeword |= ((uint64_t)tmp[0]);
 908                         break;
 909                 }
 910
 911                 switch (cmdargs.arch) {
 912                 case 5:
 913                         if (codeword >> 48) {
 914                                 fprintf(stderr, "Instruction format error at 0x%X (upper not clear). "
 915                                         "Wrong input format or architecture?\n", (unsigned int)pos);
 916                                 goto err_free_code;
 917                         }
 918                         code[pos].opcode = (codeword >> 36) & 0xFFF;
 919                         code[pos].operands[2] = codeword & 0xFFF;
 920                         code[pos].operands[1] = (codeword >> 12) & 0xFFF;
 921                         code[pos].operands[0] = (codeword >> 24) & 0xFFF;
 922                         break;
 923                 case 15:
 924                         if (codeword >> 51) {
 925                                 fprintf(stderr, "Instruction format error at 0x%X (upper not clear). "
 926                                         "Wrong input format or architecture?\n", (unsigned int)pos);
 927                                 goto err_free_code;
 928                         }
 929                         code[pos].opcode = (codeword >> 39) & 0xFFF;
 930                         code[pos].operands[2] = codeword & 0x1FFF;
 931                         code[pos].operands[1] = (codeword >> 13) & 0x1FFF;
 932                         code[pos].operands[0] = (codeword >> 26) & 0x1FFF;
 933                         break;
 934                 default:
 935                         fprintf(stderr, "Internal error: read_input unknown arch %u\n",
 936                                 cmdargs.arch);
 937                         goto err_free_code;
 938                 }
 939
 940                 pos++;
 941         }
 942
 943         ctx->code = code;
 944         ctx->nr_insns = pos;
 945
 946         close_input_file();
 947
 948         return 0;
 949
 950 err_free_code:
 951         free(code);
 952 err_close:
 953         close_input_file();
 954 error:
 955         return -1;
 956 }
 957
 958 static void disassemble(void)
 959 {
 960         struct disassembler_context ctx;
 961         int err;
 962
 963         memset(&ctx, 0, sizeof(ctx));
 964         INIT_LIST_HEAD(&ctx.stmt_list);
 965         ctx.arch = cmdargs.arch;
 966
 967         err = read_input(&ctx);
 968         if (err)
 969                 exit(1);
 970         disasm_opcodes(&ctx);
 971         resolve_labels(&ctx);
 972         emit_asm(&ctx);
 973 }
 974
 975 int main(int argc, char **argv)
 976 {
 977         int err, res = 1;
 978
 979         err = parse_args(argc, argv);
 980         if (err < 0)
 981                 goto out;
 982         if (err > 0) {
 983                 res = 0;
 984                 goto out;
 985         }
 986         disassemble();
 987         res = 0;
 988 out:
 989         /* Lazyman simply leaks all allocated memory. */
 990         return res;
 991 }