4 /* Please make sure the size of ALL headers is on word alignment */
6 #define M_FF 0x02 /* fast frame */
8 #define RX_STATS_SIZE 10
10 struct rx_frame_header {
11 a_uint32_t rx_stats[RX_STATS_SIZE];
14 #define ATH_DATA_TYPE_AGGR 0x1
15 #define ATH_DATA_TYPE_NON_AGGR 0x2
16 #define ATH_SHORT_PREAMBLE 0x1
18 typedef struct _mgt_header {
27 } POSTPACK ath_mgt_hdr_t;
29 typedef struct _beacon_header {
31 a_uint8_t len_changed;
35 #define M_LINK0 0x01 /* frame needs WEP encryption */
36 #define M_UAPSD 0x08 /* frame flagged for u-apsd handling */
38 /* Tx frame header flags definition */
39 //Reserved bit-0 for selfCTS
40 //Reserved bit-1 for RTS
41 #define TFH_FLAGS_USE_MIN_RATE 0x100
43 typedef struct __data_header {
53 } POSTPACK ath_data_hdr_t;
55 #define RX_HEADER_SPACE HTC_HDR_LENGTH + sizeof(struct rx_frame_header)
57 struct ieee80211com_target {
58 a_uint32_t ic_ampdu_limit;
59 a_uint8_t ic_ampdu_subframes;
60 a_uint8_t ic_enable_coex;
61 a_uint8_t ic_tx_chainmask;
65 #define ATH_NODE_MAX 8 /* max no. of nodes */
66 #define ATH_VAP_MAX 2 /* max no. of vaps */
68 #define VAP_TARGET_SIZE 12
70 struct ieee80211vap_target
72 a_uint8_t iv_vapindex;
73 a_uint8_t iv_opmode; /* enum ieee80211_opmode */
74 a_uint8_t iv_myaddr[IEEE80211_ADDR_LEN];
76 a_uint16_t iv_rtsthreshold;
80 a_uint8_t iv_nodeindex;
81 struct ieee80211_node_target *iv_bss;
84 /* NB: this must have the same value as IEEE80211_FC1_PWR_MGT */
85 #define IEEE80211_NODE_PWR_MGT 0x0010 /* power save mode enabled */
86 #define IEEE80211_NODE_AREF 0x0020 /* authentication ref held */
87 #define IEEE80211_NODE_UAPSD 0x0040 /* U-APSD power save enabled */
88 #define IEEE80211_NODE_UAPSD_TRIG 0x0080 /* U-APSD triggerable state */
89 #define IEEE80211_NODE_UAPSD_SP 0x0100 /* U-APSD SP in progress */
90 #define IEEE80211_NODE_ATH 0x0200 /* Atheros Owl or follow-on device */
91 #define IEEE80211_NODE_OWL_WORKAROUND 0x0400 /* Owl WDS workaround needed*/
92 #define IEEE80211_NODE_WDS 0x0800 /* WDS link */
94 #define NODE_TARGET_SIZE 22
96 struct ieee80211_node_target
98 a_uint8_t ni_macaddr[IEEE80211_ADDR_LEN];
99 a_uint8_t ni_bssid[IEEE80211_ADDR_LEN];
100 a_uint8_t ni_nodeindex;
101 a_uint8_t ni_vapindex;
102 a_uint8_t ni_is_vapnode;
105 a_uint16_t ni_maxampdu;
110 * Should move to ath_node_target later on ...
112 a_uint16_t ni_txseqmgmt;
115 struct ieee80211vap_target *ni_vap;
118 struct ath_interrupt_stats {
120 a_uint32_t ast_rxorn;
121 a_uint32_t ast_rxeol;
122 a_uint32_t ast_txurn;
127 struct ath_tx_stats {
128 a_uint32_t ast_tx_xretries; /* tx failed 'cuz too many retries */
129 a_uint32_t ast_tx_fifoerr; /* tx failed 'cuz FIFO underrun */
130 a_uint32_t ast_tx_filtered; /* tx failed 'cuz xmit filtered */
131 a_uint32_t ast_tx_timer_exp; /* tx timer expired */
132 a_uint32_t ast_tx_shortretry; /* tx on-chip retries (short) */
133 a_uint32_t ast_tx_longretry; /* tx on-chip retries (long) */
135 a_uint32_t ast_tx_rts; /* tx frames with rts enabled */
136 a_uint32_t ast_tx_altrate; /* tx frames with alternate rate */
137 a_uint32_t ast_tx_protect; /* tx frames with protection */
139 a_uint32_t tx_tgt; /* tx data pkts recieved on target */
140 a_uint32_t tx_qnull; /* txq empty occurences */
142 a_uint32_t txaggr_nframes; /* no. of frames aggregated */
143 a_uint32_t tx_compunaggr; /* tx unaggregated frame completions */
144 a_uint32_t tx_compaggr; /* tx aggregated completions */
145 a_uint32_t txaggr_retries; /* tx retries of sub frames */
146 a_uint32_t txaggr_single; /* tx frames not aggregated */
147 a_uint32_t txaggr_compgood; /* tx aggr good completions */
148 a_uint32_t txaggr_compretries; /* tx aggr unacked subframes */
149 a_uint32_t txaggr_prepends; /* tx aggr old frames requeued */
150 a_uint32_t txaggr_data_urun; /* data underrun for an aggregate */
151 a_uint32_t txaggr_delim_urun; /* delimiter underrun for an aggr */
152 a_uint32_t txaggr_errlast; /* tx aggr: last sub-frame failed */
153 a_uint32_t txaggr_longretries; /* tx aggr h/w long retries */
154 a_uint32_t txaggr_babug; /* tx aggr : BA bug */
155 a_uint32_t txaggr_compxretry; /* tx aggr excessive retries */
156 a_uint32_t txaggr_shortretries;/* tx aggr h/w short retries */
157 a_uint32_t txaggr_timer_exp; /* tx aggr : tx timer expired */
158 a_uint32_t txunaggr_compretries; /* tx non-aggr unacked subframes */
159 a_uint32_t txaggr_filtered; /* filtered aggr packet */
160 a_uint32_t txaggr_fifo; /* fifo underrun of aggregate */
161 a_uint32_t txaggr_xtxop; /* txop exceeded for an aggregate */
162 a_uint32_t txaggr_desc_cfgerr; /* aggr descriptor config error */
163 a_uint32_t txunaggr_errlast; /* tx non-aggr: last frame failed */
164 a_uint32_t txunaggr_xretry; /* tx unaggregated excessive retries */
165 a_uint32_t txaggr_xretries; /* tx excessive retries of aggr */
167 a_uint32_t tx_stopfiltered; /* tx pkts filtered for requeueing */
168 a_uint32_t tx_noskbs; /* tx no skbs for encapsulations */
169 a_uint32_t tx_nobufs; /* tx no descriptors */
171 a_uint32_t tx_bars; /* tx bars sent */
172 a_uint32_t txbar_xretry; /* tx bars excessively retried */
173 a_uint32_t txbar_compretries; /* tx bars retried */
174 a_uint32_t txbar_errlast; /* tx bars last frame failed */
177 struct ath_rx_stats {
178 a_uint32_t ast_rx_nobuf; /* rx setup failed 'cuz no skbuff */
179 a_uint32_t ast_rx_send;
180 a_uint32_t ast_rx_done;
183 struct ath_aggr_info {
186 a_uint8_t aggr_enable;
190 struct wmi_data_delba {
191 a_uint8_t ni_nodeindex;
194 a_uint8_t reasoncode;
197 struct wmi_fw_version {