1 // user-vector.S - User Vector for General Exceptions
2 // $Id: //depot/rel/Cottonwood/Xtensa/OS/xtos/user-vector.S#3 $
4 // Copyright (c) 1998-2010 Tensilica Inc.
6 // Permission is hereby granted, free of charge, to any person obtaining
7 // a copy of this software and associated documentation files (the
8 // "Software"), to deal in the Software without restriction, including
9 // without limitation the rights to use, copy, modify, merge, publish,
10 // distribute, sublicense, and/or sell copies of the Software, and to
11 // permit persons to whom the Software is furnished to do so, subject to
12 // the following conditions:
14 // The above copyright notice and this permission notice shall be included
15 // in all copies or substantial portions of the Software.
17 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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22 // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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25 #include <xtensa/coreasm.h>
26 #include <xtensa/config/system.h>
27 #include "xtos-internal.h"
29 #if XCHAL_HAVE_EXCEPTIONS
32 .section .UserExceptionVector.text, "ax"
34 .global _UserExceptionVector
36 # if ((XSHAL_USER_VECTOR_SIZE >= 28) && XCHAL_HAVE_ADDX) || (XSHAL_USER_VECTOR_SIZE >= 36) || XSHAL_VECTORS_PACKED
37 // There is space to dispatch right at the vector:
39 addi a1, a1, -ESF_TOTALSIZE // allocate exception stack frame, etc.
42 movi a3, _xtos_exc_handler_table
43 rsr a2, EXCCAUSE // get exception cause
48 jx a3 // jump to cause-specific handler
50 .size _UserExceptionVector, . - _UserExceptionVector
53 // The vector may be as small as 12 bytes:
55 addi a1, a1, -ESF_TOTALSIZE // allocate exception stack frame, etc.
57 movi a2, _UserExceptionFromVector // load user exception handler address
59 jx a2 // jump to handler
61 .size _UserExceptionVector, . - _UserExceptionVector
63 // Dispatch outside vector:
67 .global _UserExceptionFromVector
68 _UserExceptionFromVector:
70 movi a3, _xtos_exc_handler_table
71 rsr a2, EXCCAUSE // get exception cause
75 jx a3 // jump to cause-specific handler
77 .size _UserExceptionFromVector, . - _UserExceptionFromVector
82 .weak _xtos_cause3_handler
85 * Table of assembly-level general-exception handlers
86 * (quickly entered) for user vectored exceptions.
87 * Provides entries for all possible 64 exception causes
88 * currently allowed for in the EXCCAUSE register.
90 * NOTE: entries that have a corresponding C handler
91 * (registered at run-time) point to _xtos_c_wrapper_handler;
92 * entries that have no handler point to _xtos_unhandled_exception.
95 .global _xtos_exc_handler_table
97 _xtos_exc_handler_table:
98 .word _xtos_unhandled_exception // 0 IllegalInstruction
99 .word _xtos_syscall_handler // 1 Syscall
100 .word _xtos_unhandled_exception // 2 InstructionFetchError
101 .word _xtos_unhandled_exception // 3 LoadStoreError
102 # if XCHAL_HAVE_INTERRUPTS
103 .word _xtos_l1int_handler // 4 Level1Interrupt
105 .word _xtos_unhandled_exception // 4 Level1Interrupt (not configured)
107 .word _xtos_alloca_handler // 5 Alloca (MOVSP)
108 .word _xtos_unhandled_exception // 6 IntegerDivideByZero
109 .word _xtos_unhandled_exception // 7 Speculation
110 .word _xtos_unhandled_exception // 8 Privileged
111 .word _xtos_unhandled_exception // 9 Unaligned
112 .word _xtos_unhandled_exception //10 (reserved for Tensilica)
113 .word _xtos_unhandled_exception //11 (reserved for Tensilica)
114 .word _xtos_cause3_handler //12 PIF data error on fetch
115 .word _xtos_cause3_handler //13 PIF data error on ld/st
116 .word _xtos_cause3_handler //14 PIF address error on fetch
117 .word _xtos_cause3_handler //15 PIF address error on ld/st
118 .word _xtos_unhandled_exception //16 InstTLBMiss
119 .word _xtos_unhandled_exception //17 InstTLBMultiHit
120 .word _xtos_unhandled_exception //18 InstFetchPrivilege
121 .word _xtos_unhandled_exception //19 (reserved for Tensilica)
122 .word _xtos_unhandled_exception //20 InstFetchProhibited
123 .word _xtos_unhandled_exception //21 (reserved for Tensilica)
124 .word _xtos_unhandled_exception //22 (reserved for Tensilica)
125 .word _xtos_unhandled_exception //23 (reserved for Tensilica)
126 .word _xtos_unhandled_exception //24 LoadStoreTLBMiss
127 .word _xtos_unhandled_exception //25 LoadStoreTLBMultiHit
128 .word _xtos_unhandled_exception //26 LoadStorePrivilege
129 .word _xtos_unhandled_exception //27 (reserved for Tensilica)
130 .word _xtos_unhandled_exception //28 LoadProhibited
131 .word _xtos_unhandled_exception //29 StoreProhibited
132 .word _xtos_unhandled_exception //30 (reserved for Tensilica)
133 .word _xtos_unhandled_exception //31 (reserved for Tensilica)
135 .word _xtos_unhandled_exception //32-39 Coprocessor<n>Disabled (n = 0..7)
138 .rept XCHAL_EXCCAUSE_NUM-40
139 .word _xtos_unhandled_exception //40-63 (reserved for TIE)
147 // Here are alternative vectors. They will NOT work with
148 // the handlers currently provided with XTOS. However they
149 // might be useful to someone writing their own handlers
150 // from scratch. Note that XSR is only available on T1040
151 // and later hardware.
153 //*** The typical tiny 9-byte vector: ***
154 // wsr a3, EXCSAVE_1 // save user a3
155 // movi a3, _UserExceptionFromVector // load user exception handler address
158 //*** Minimizing EXCCAUSE-dispatch delay, not assuming valid SP: ***
159 // wsr a0, DEPC // save a0 (double exceptions fatal here, so not expected)
161 // xsr a1, EXCSAVE_1 // EXCSAVE_1 always contains &exception_handlers[0]
164 // l32i a0, a0, TABLE_OFS + EXC_CODE_KERNEL*4
165 // xsr a1, EXCSAVE_1 // restore a1 (DEPC contains original a0)
166 // jx a0 // jump to cause-specific handler
168 //*** Doing EXCCAUSE-dispatch with table in EXCSAVE_1: ***
169 // addi a1, a1, -ESF_TOTALSIZE // allocate exception stack frame, etc.
170 // s32i a2, a1, UEXC_a2
172 // xsr a4, EXCSAVE_1 // EXCSAVE_1 always contains &exception_handlers[0]
173 // s32i a3, a1, UEXC_a3
175 // l32i a2, a2, TABLE_OFS + EXC_CODE_KERNEL*4
176 // xsr a4, EXCSAVE_1 // restore a1 (DEPC contains original a0)
177 // jx a2 // jump to cause-specific handler
179 #endif /* XCHAL_HAVE_EXCEPTIONS */