1 // shared-reset-vector.S -- Sharable Reset Vector (requires PRID option)
3 // Copyright (c) 1999-2010 Tensilica Inc.
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24 #include <xtensa/coreasm.h>
26 // Populate this processor's entry in the reset table.
27 // The core instance specific LSP should put this section
28 // in the correct location within the table.
30 .section .ResetTable.rodata, "a"
33 // This sharable reset code assumes RC-2009.0 or later hardware,
34 // to guarantee that no processor state initialization is required
35 // prior to doing loads etc.
36 // Total size is 28 bytes (or 27 with density option).
37 // By necessity, none of these bytes vary by core instance;
38 // the appropriate reset table entry is selected using PRID.
41 .section .SharedResetVector.text, "ax"
42 .begin no-absolute-literals
45 .global _SharedResetVector
47 j .LSharedResetHandler
54 rsr.prid a0 // get processor ID (16 bits)
55 movi a1, _ResetTable_base
56 extui a0, a0, 0, 4 // ID of core within the multiprocessor (FIXME: need proper constant...)
59 jx a1 // jump to core-specific initialization
61 .size _SharedResetVector, . - _SharedResetVector
62 .end no-absolute-literals