+/*
+ * Copyright (c) 2013 Qualcomm Atheros, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted (subject to the limitations in the
+ * disclaimer below) provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of Qualcomm Atheros nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
+ * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
#include <adf_os_types.h>
#include <adf_os_dma.h>
#include <adf_os_timer.h>
static void ath_tgt_tx_sched_normal(struct ath_softc_tgt *sc, ath_atx_tid_t *tid);
static void ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid);
-static struct ath_node_target * owltarget_findnode(struct tx_frame_heade *dh,
- struct ath_softc_tgt *sc,
- struct adf_nbuf_t *skb);
extern a_int32_t ath_chainmask_sel_logic(void *);
static a_int32_t ath_get_pktlen(struct ath_buf *bf, a_int32_t hdrlen);
static void ath_tgt_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
- struct ath_desc *ds0, *ds = bf->bf_desc;
- adf_nbuf_t skb;
- adf_nbuf_queue_t skbhead;
- a_int32_t i, dscnt = 0;
+ struct ath_desc *ds = bf->bf_desc;
switch (bf->bf_protmode) {
case IEEE80211_PROT_RTSCTS:
HAL_11N_RATE_SERIES series[4];
a_int32_t i, flags;
a_uint8_t rix, cix, rtsctsrate;
- a_uint32_t aggr_limit_with_rts;
a_uint32_t ctsduration = 0;
a_int32_t prot_mode = AH_FALSE;
}
}
- ath_hal_getrtsaggrlimit(sc->sc_ah, &aggr_limit_with_rts);
-
- if (bf->bf_isaggr && aggr_limit_with_rts &&
- bf->bf_al > aggr_limit_with_rts) {
- flags &= ~(HAL_TXDESC_RTSENA);
- }
-
adf_os_mem_set(series, 0, sizeof(HAL_11N_RATE_SERIES) * 4);
for (i = 0; i < 4; i++) {
void owl_tgt_node_init(struct ath_node_target * an)
{
struct ath_atx_tid *tid;
- int tidno, i;
+ int tidno;
for (tidno = 0, tid = &an->tid[tidno]; tidno < WME_NUM_TID;tidno++, tid++) {
tid->tidno = tidno;
{
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)data;
a_int32_t i;
- a_uint32_t qcumask = ((1 << HAL_NUM_TX_QUEUES) - 1);
struct ath_txq *txq;
- ath_data_hdr_t *dh;
ath_tx_status_clear(sc);
struct ath_tx_buf *bf)
{
struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
- struct ath_desc *ds = bf->bf_lastds;
ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno);
if (tid->flag & TID_CLEANUP_INPROGRES) {
a_int32_t node_index)
{
struct ath_node_target *an;
- a_int32_t i;
struct ieee80211_node_target *ni;
if (node_index > TARGET_NODE_MAX)
adf_nbuf_t skb, ath_data_hdr_t *dh)
{
struct ath_tx_buf *bf;
- struct ath_txq *txq;
struct ieee80211_node_target *ni;
- a_uint32_t flags = adf_os_ntohl(dh->flags);
struct ath_atx_tid *tid;
ni = ath_tgt_find_node(sc, dh->ni_index);
struct ath_tx_buf *bf)
{
struct ieee80211_frame *wh = ATH_SKB_2_WH(bf->bf_skb);
- const struct ieee80211_cipher *cip;
- struct ieee80211_key *k;
if (!(wh->i_fc[1] & IEEE80211_FC1_WEP)) {
bf->bf_keytype = HAL_KEY_TYPE_CLEAR;
{
struct ath_hal *ah = sc->sc_ah;
struct ath_txq *txq;
- struct ath_node_target *an;
HAL_STATUS status;
- static a_int32_t count = 0,i;
volatile a_int32_t txe_val;
adf_os_assert(bf);
static void
ath_update_stats(struct ath_softc_tgt *sc, struct ath_buf *bf)
{
- struct ieee80211_node_target *ni = bf->bf_node;
struct ath_tx_desc *ds = bf->bf_desc;
- struct ath_node_target *an = ATH_NODE_TARGET(ni);
u_int32_t sr, lr;
- struct ieee80211_cb *cb;
if (ds->ds_txstat.ts_status == 0) {
if (ds->ds_txstat.ts_rate & HAL_TXSTAT_ALTRATE)
struct ath_vap_target *avp;
struct ath_hal *ah = sc->sc_ah;
a_uint8_t rix, txrate, ctsrate, cix = 0xff, *data;
- a_uint32_t ivlen = 0, icvlen = 0, subtype, flags, ctsduration, fval;
+ a_uint32_t ivlen = 0, icvlen = 0, subtype, flags, ctsduration;
a_int32_t i, iswep, ismcast, hdrlen, pktlen, try0, len;
- struct ath_desc *ds=NULL, *ds0=NULL;
+ struct ath_desc *ds=NULL;
struct ath_txq *txq=NULL;
struct ath_tx_buf *bf;
HAL_PKT_TYPE atype;
struct ath_rc_series rcs[4];
HAL_11N_RATE_SERIES series[4];
ath_mgt_hdr_t *mh;
- struct ieee80211com_target *ic = &sc->sc_ic;
a_int8_t keyix;
if (!hdr_buf) {
{
ath_atx_tid_t *tid;
struct ath_node_target *an;
- struct ath_desc *ds;
- struct ath_txq *txq = bf->bf_txq;
- a_bool_t queue_frame;
an = (struct ath_node_target *)bf->bf_node;
adf_os_assert(an);
{
struct ath_atx_tid *tid;
u_int8_t bdone;
- HAL_STATUS status;
- u_int8_t smps_mode;
- struct ieee80211_node *ieee_node;
- u_int32_t aggr_limit_with_rts;
bdone = AH_FALSE;
{
ath_atx_tid_t *tid;
struct ath_node_target *an;
- struct ath_desc *ds;
struct ath_txq *txq = bf->bf_txq;
a_bool_t queue_frame, within_baw;
projects / open-ath9k-htc-firmware.git / blobdiff