use ah_set11nBurstDuration directly
[open-ath9k-htc-firmware.git] / target_firmware / wlan / if_owl.c
index 2f7e55bc080c828034967f94fe32182447b6e5bb..0793c41472a49a45b4371a7b5c9025d64824c9ed 100755 (executable)
@@ -263,6 +263,7 @@ static void ath_filltxdesc(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
        struct ath_tx_desc *ds = bf->bf_desc;
+       struct ath_hal *ah = sc->sc_ah;
 
        switch (bf->bf_protmode) {
        case IEEE80211_PROT_RTSCTS:
@@ -275,7 +276,7 @@ static void ath_tx_tgt_setds(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
                break;
        }
 
-       ath_hal_set11n_txdesc(sc->sc_ah, ds
+       ah->ah_set11nTxDesc(ah, ds
                              , bf->bf_pktlen
                              , bf->bf_atype
                              , 60
@@ -442,7 +443,7 @@ static void ath_buf_set_rate(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
     rtsctsrate = rt->info[cix].rateCode |
            (bf->bf_shpream ? rt->info[cix].shortPreamble : 0);
 
-    ath_hal_set11n_ratescenario(ah, ds, 1,
+    ah->ah_set11nRateScenario(ah, ds, 1,
                                rtsctsrate, ctsduration,
                                series, 4,
                                flags);
@@ -616,9 +617,10 @@ void ath_tx_status_send(struct ath_softc_tgt *sc)
 
 static void owltgt_tx_process_cabq(struct ath_softc_tgt *sc, struct ath_txq *txq)
 {
-       ath_hal_intrset(sc->sc_ah, sc->sc_imask & ~HAL_INT_SWBA);
+       struct ath_hal *ah = sc->sc_ah;
+       ah->ah_setInterrupts(ah, sc->sc_imask & ~HAL_INT_SWBA);
        owltgt_tx_processq(sc, txq, OWL_TXQ_ACTIVE);
-       ath_hal_intrset(sc->sc_ah, sc->sc_imask);
+       ah->ah_setInterrupts(ah, sc->sc_imask);
 }
 
 void owl_tgt_tx_tasklet(TQUEUE_ARG data)
@@ -898,7 +900,7 @@ static void ath_tgt_txq_add_ucast(struct ath_softc_tgt *sc, struct ath_tx_buf *b
        }
 
        txq->axq_link = &bf->bf_lastds->ds_link;
-       ath_hal_txstart(ah, txq->axq_qnum);
+       ah->ah_startTxDma(ah, txq->axq_qnum);
 }
 
 static a_int32_t ath_tgt_txbuf_setup(struct ath_softc_tgt *sc,
@@ -981,10 +983,11 @@ ath_tx_freebuf(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
 {
        a_int32_t i ;
        struct ath_tx_desc *bfd = NULL;
+       struct ath_hal *ah = sc->sc_ah;
 
        for (bfd = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; bfd++, i++) {
-               ath_hal_clr11n_aggr(sc->sc_ah, bfd);
-               ath_hal_set11n_burstduration(sc->sc_ah, bfd, 0);
+               ah->ah_clr11nAggr(ah, bfd);
+               ah->ah_set11nBurstDuration(ah, bfd, 0);
                ath_hal_set11n_virtualmorefrag(sc->sc_ah, bfd, 0);
        }
 
@@ -1229,7 +1232,7 @@ ath_tgt_send_mgt(struct ath_softc_tgt *sc,adf_nbuf_t hdr_buf, adf_nbuf_t skb,
                series[i].ChSel = sc->sc_ic.ic_tx_chainmask;
                series[i].RateFlags = 0;
        }
-       ath_hal_set11n_ratescenario(ah, ds, 0, ctsrate, ctsduration, series, 4, 0);
+       ah->ah_set11nRateScenario(ah, ds, 0, ctsrate, ctsduration, series, 4, 0);
        ath_tgt_txqaddbuf(sc, txq, bf, bf->bf_lastds);
 
        return;
@@ -1254,7 +1257,7 @@ ath_tgt_txqaddbuf(struct ath_softc_tgt *sc,
        }
 
        txq->axq_link = &lastds->ds_link;
-       ath_hal_txstart(ah, txq->axq_qnum);
+       ah->ah_startTxDma(ah, txq->axq_qnum);
 }
 
 void ath_tgt_handle_normal(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
@@ -1377,6 +1380,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
        ath_tx_bufhead bf_q;
        struct ath_txq *txq = TID_TO_ACTXQ(tid->tidno);
        struct ath_tx_desc *ds = NULL;
+       struct ath_hal *ah = sc->sc_ah;
        int i;
 
 
@@ -1407,7 +1411,7 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
                        bf->bf_next = NULL;
 
                        for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++)
-                               ath_hal_clr11n_aggr(sc->sc_ah, ds);
+                               ah->ah_clr11nAggr(ah, ds);
 
                        ath_buf_set_rate(sc, bf);
                        bf->bf_txq_add(sc, bf);
@@ -1421,12 +1425,12 @@ ath_tgt_tx_sched_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid)
 
                bf->bf_isaggr  = 1;
                ath_buf_set_rate(sc, bf);
-               ath_hal_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al,
+               ah->ah_set11nAggrFirst(ah, bf->bf_desc, bf->bf_al,
                                          bf->bf_ndelim);
                bf->bf_lastds = bf_last->bf_lastds;
 
                for (i = 0; i < bf_last->bf_dmamap_info.nsegs; i++)
-                       ath_hal_set11n_aggr_last(sc->sc_ah, &bf_last->bf_descarr[i]);
+                       ah->ah_set11nAggrLast(ah, &bf_last->bf_descarr[i]);
 
                if (status == ATH_AGGR_8K_LIMITED) {
                        adf_os_assert(0);
@@ -1494,6 +1498,7 @@ int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid,
        int nframes = 0, rl = 0;;
        struct ath_tx_desc *ds = NULL;
        struct ath_tx_buf *bf;
+       struct ath_hal *ah = sc->sc_ah;
        u_int16_t aggr_limit =  (64*1024 -1), al = 0, bpad = 0, al_delta;
        u_int16_t h_baw = tid->baw_size/2, prev_al = 0, prev_frames = 0;
 
@@ -1570,7 +1575,7 @@ int ath_tgt_tx_form_aggr(struct ath_softc_tgt *sc, ath_atx_tid_t *tid,
                bf_prev = bf;
 
                for(ds = bf->bf_desc; ds <= bf->bf_lastds; ds++)
-                       ath_hal_set11n_aggr_middle(sc->sc_ah, ds, bf->bf_ndelim);
+                       ah->ah_set11nAggrMiddle(ah, ds, bf->bf_ndelim);
 
        } while (!asf_tailq_empty(&tid->buf_q));
 
@@ -1799,13 +1804,14 @@ ath_tx_retry_subframe(struct ath_softc_tgt *sc, struct ath_tx_buf *bf,
        struct ath_node_target *an = ATH_NODE_TARGET(bf->bf_node);
        ath_atx_tid_t *tid = ATH_AN_2_TID(an, bf->bf_tidno);
        struct ath_tx_desc *ds = NULL;
+       struct ath_hal *ah = sc->sc_ah;
        int i = 0;
 
        __stats(sc, txaggr_compretries);
 
        for(ds = bf->bf_desc, i = 0; i < bf->bf_dmamap_info.nsegs; ds++, i++) {
-               ath_hal_clr11n_aggr(sc->sc_ah, ds);
-               ath_hal_set11n_burstduration(sc->sc_ah, ds, 0);
+               ah->ah_clr11nAggr(ah, ds);
+               ah->ah_set11nBurstDuration(ah, ds, 0);
                ath_hal_set11n_virtualmorefrag(sc->sc_ah, ds, 0);
        }
 
@@ -2079,6 +2085,7 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
        struct ieee80211_frame_bar *bar;
        u_int8_t min_rate;
        struct ath_tx_desc *ds, *ds0;
+       struct ath_hal *ah = sc->sc_ah;
        HAL_11N_RATE_SERIES series[4];
        int i = 0;
        adf_nbuf_queue_t skbhead;
@@ -2139,7 +2146,7 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
        bf->bf_next = NULL;
 
        for (ds0 = ds, i=0; i < bf->bf_dmamap_info.nsegs; ds0++, i++) {
-               ath_hal_clr11n_aggr(sc->sc_ah, ds0);
+               ah->ah_clr11nAggr(ah, ds0);
        }
 
        ath_filltxdesc(sc, bf);
@@ -2150,6 +2157,6 @@ static void ath_bar_tx(struct ath_softc_tgt *sc,
                series[i].ChSel = sc->sc_ic.ic_tx_chainmask;
        }
 
-       ath_hal_set11n_ratescenario(sc->sc_ah, bf->bf_desc, 0, 0, 0, series, 4, 4);
+       ah->ah_set11nRateScenario(ah, bf->bf_desc, 0, 0, 0, series, 4, 4);
        ath_tgt_txq_add_ucast(sc, bf);
 }