+/*
+ * Copyright (c) 2013 Qualcomm Atheros, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted (subject to the limitations in the
+ * disclaimer below) provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of Qualcomm Atheros nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
+ * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
#ifndef _ATH_AH_H_
#define _ATH_AH_H_
#endif
#define AR5416_DEVID_PCIE 0x0024 /* AR5416 PCI-E (XB) (Owl) */
+#define HAL_RATE_TABLE_SIZE 33
typedef enum {
HAL_OK = 0, /* No error */
HAL_CAP_VEOL = 0,
HAL_CAP_BSSIDMASK = 1,
HAL_CAP_TSF_ADJUST = 2,
- HAL_CAP_RX_STBC = 3,
- HAL_CAP_TX_STBC = 4,
HAL_CAP_HT = 5,
HAL_CAP_RTS_AGGR_LIMIT = 6,
} HAL_CAPABILITY_TYPE;
typedef struct {
a_int32_t rateCount;
- a_uint8_t rateCodeToIndex[32];
+ a_uint8_t rateCodeToIndex[HAL_RATE_TABLE_SIZE];
struct {
a_uint8_t valid;
a_uint8_t phy;
a_uint8_t controlRate;
a_uint16_t lpAckDuration;
a_uint16_t spAckDuration;
- } info[32];
+ } info[HAL_RATE_TABLE_SIZE];
} HAL_RATE_TABLE;
typedef struct {
typedef struct {
a_int32_t rateCount;
- a_uint8_t rateCodeToIndex[32];
+ a_uint8_t rateCodeToIndex[HAL_RATE_TABLE_SIZE];
struct {
a_uint8_t valid;
a_uint8_t phy;
a_uint8_t controlRate;
a_uint16_t lpAckDuration;
a_uint16_t spAckDuration;
- } info[32];
+ } info[HAL_RATE_TABLE_SIZE];
} HAL_RATE_TABLE;
#define HAL_RATESERIES_RTS_CTS 0x0001 /* use rts/cts w/this series */
{
a_uint32_t ah_magic;
HAL_SOFTC ah_sc;
- HAL_BUS_HANDLE ah_sh;
adf_os_device_t ah_dev;
a_uint32_t ah_macVersion;
HAL_BOOL incTrigLevel);
/* Misc Functions */
- HAL_STATUS __ahdecl(*ah_getCapability)(struct ath_hal *,
- HAL_CAPABILITY_TYPE, a_uint32_t capability,
- a_uint32_t *result);
void __ahdecl(*ah_setDefAntenna)(struct ath_hal*, a_uint32_t);
-
- HAL_BOOL __ahdecl(*ah_updateCTSForBursting)(struct ath_hal *,
- struct ath_desc *, struct ath_desc *,
- struct ath_desc *, struct ath_desc *,
- a_uint32_t, a_uint32_t);
void __ahdecl(*ah_setRxFilter)(struct ath_hal*, a_uint32_t);
/* Target Transmit Functions */
-
- a_uint32_t __ahdecl(*ah_getTxDP)(struct ath_hal*, a_uint32_t);
HAL_BOOL __ahdecl(*ah_setTxDP)(struct ath_hal*, a_uint32_t, a_uint32_t txdp);
a_uint32_t __ahdecl(*ah_numTxPending)(struct ath_hal *, a_uint32_t q);
HAL_BOOL __ahdecl(*ah_startTxDma)(struct ath_hal*, a_uint32_t);
HAL_BOOL __ahdecl(*ah_abortTxDma)(struct ath_hal *);
- void __ahdecl(*ah_set11nTxDesc)(struct ath_hal *ah,
- struct ath_desc *ds,
+ void __ahdecl(*ah_set11nTxDesc)(struct ath_tx_desc *ds,
a_uint32_t pktLen, HAL_PKT_TYPE type,
a_uint32_t txPower, a_uint32_t keyIx,
HAL_KEY_TYPE keyType,
a_uint32_t flags);
- void __ahdecl(*ah_set11nRateScenario)(struct ath_hal *ah,
- struct ath_desc *ds,
+ void __ahdecl(*ah_set11nRateScenario)(struct ath_tx_desc *ds,
a_uint32_t durUpdateEn,
a_uint32_t rtsctsRate,
- a_uint32_t rtsctsDuration,
HAL_11N_RATE_SERIES series[],
a_uint32_t nseries, a_uint32_t flags);
- void __ahdecl(*ah_set11nAggrFirst)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t aggrLen,
+ void __ahdecl(*ah_set11nAggrFirst)(struct ath_tx_desc *ds, a_uint32_t aggrLen,
a_uint32_t numDelims);
- void __ahdecl(*ah_set11nAggrMiddle)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t numDelims);
- void __ahdecl(*ah_set11nAggrLast)(struct ath_hal *ah,
- struct ath_desc *ds);
- void __ahdecl(*ah_clr11nAggr)(struct ath_hal *ah,
- struct ath_desc *ds);
- void __ahdecl(*ah_set11nBurstDuration)(struct ath_hal *ah,
- struct ath_desc *ds,
+ void __ahdecl(*ah_set11nAggrMiddle)(struct ath_tx_desc *ds, a_uint32_t numDelims);
+ void __ahdecl(*ah_set11nAggrLast)(struct ath_tx_desc *ds);
+ void __ahdecl(*ah_clr11nAggr)(struct ath_tx_desc *ds);
+ void __ahdecl(*ah_set11nBurstDuration)(struct ath_tx_desc *ds,
a_uint32_t burstDuration);
- void __ahdecl(*ah_set11nVirtualMoreFrag)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t vmf);
+ void __ahdecl(*ah_set11nVirtualMoreFrag)(struct ath_tx_desc *ds, a_uint32_t vmf);
- HAL_BOOL __ahdecl(*ah_setupTxDesc)(struct ath_hal *, struct ath_desc *,
+ HAL_BOOL __ahdecl(*ah_setupTxDesc)(struct ath_tx_desc *,
a_uint32_t pktLen, a_uint32_t hdrLen,
HAL_PKT_TYPE type, a_uint32_t txPower,
a_uint32_t txRate0, a_uint32_t txTries0,
- a_uint32_t keyIx, a_uint32_t antMode, a_uint32_t flags,
- a_uint32_t rtsctsRate, a_uint32_t rtsctsDuration,
- a_uint32_t compicvLen, a_uint32_t compivLen,
- a_uint32_t comp);
- HAL_BOOL __ahdecl(*ah_fillTxDesc)(struct ath_hal *, struct ath_desc *,
+ a_uint32_t keyIx, a_uint32_t flags,
+ a_uint32_t rtsctsRate, a_uint32_t rtsctsDuration);
+ HAL_BOOL __ahdecl(*ah_fillTxDesc)(struct ath_tx_desc *,
a_uint32_t segLen, HAL_BOOL firstSeg,
- HAL_BOOL lastSeg, const struct ath_desc *);
- HAL_BOOL __ahdecl (*ah_fillKeyTxDesc) (struct ath_hal *, struct ath_desc *, HAL_KEY_TYPE);
- HAL_STATUS __ahdecl(*ah_procTxDesc)(struct ath_hal *, struct ath_desc*);
- void __ahdecl(*ah_getTxIntrQueue)(struct ath_hal *, a_uint32_t *);
- void __ahdecl(*ah_reqTxIntrDesc)(struct ath_hal *, struct ath_desc*);
+ HAL_BOOL lastSeg, const struct ath_tx_desc *);
+ HAL_BOOL __ahdecl (*ah_fillKeyTxDesc) (struct ath_tx_desc *, HAL_KEY_TYPE);
+ HAL_STATUS __ahdecl(*ah_procTxDesc)(struct ath_hal *, struct ath_tx_desc *);
HAL_BOOL __ahdecl(*ah_setBssIdMask)(struct ath_hal *, const a_uint8_t*);
void __ahdecl(*ah_setPCUConfig)(struct ath_hal *);
void __ahdecl(*ah_setMulticastFilter)(struct ath_hal*,
a_uint32_t filter0, a_uint32_t filter1);
-
- a_uint32_t __ahdecl(*ah_getTsf32)(struct ath_hal*);
+
u_int64_t __ahdecl(*ah_getTsf64)(struct ath_hal*);
- void __ahdecl(*ah_resetTsf)(struct ath_hal*);
/* Target receive Functions */
- a_uint32_t __ahdecl(*ah_getRxDP)(struct ath_hal*);
void __ahdecl(*ah_setRxDP)(struct ath_hal*, a_uint32_t rxdp);
- HAL_BOOL __ahdecl(*ah_setupRxDesc)(struct ath_hal *, struct ath_desc *,
+ HAL_BOOL __ahdecl(*ah_setupRxDesc)(struct ath_rx_desc *,
a_uint32_t size, a_uint32_t flags);
HAL_STATUS __ahdecl(*ah_procRxDesc)(struct ath_hal *, struct ath_desc *,
a_uint32_t phyAddr, struct ath_desc *next, u_int64_t tsf);
HAL_STATUS __ahdecl(*ah_procRxDescFast)(struct ath_hal *ah,
- struct ath_desc *ds, a_uint32_t pa,
+ struct ath_rx_desc *ds, a_uint32_t pa,
struct ath_desc *nds,
struct ath_rx_status *rx_stats);
HAL_BOOL __ahdecl(*ah_stopDmaReceive)(struct ath_hal*);
- void __ahdecl(*ah_startPcuReceive)(struct ath_hal*);
void __ahdecl(*ah_stopPcuReceive)(struct ath_hal*);
void __ahdecl(*ah_enableReceive)(struct ath_hal*);
/* Interrupt functions */
HAL_BOOL __ahdecl(*ah_isInterruptPending)(struct ath_hal*);
HAL_BOOL __ahdecl(*ah_getPendingInterrupts)(struct ath_hal*, HAL_INT*);
- HAL_INT __ahdecl(*ah_getInterrupts)(struct ath_hal*);
HAL_INT __ahdecl(*ah_setInterrupts)(struct ath_hal*, HAL_INT);
};
extern struct ath_hal * __ahdecl ath_hal_attach_tgt(a_uint32_t devid, HAL_SOFTC,
- adf_os_device_t dev, HAL_BUS_HANDLE sh,
+ adf_os_device_t dev,
a_uint32_t flags, HAL_STATUS* status);
-extern const HAL_RATE_TABLE * __ahdecl ath_hal_getratetable(struct ath_hal *,
- a_uint32_t mode);
-
extern a_uint16_t __ahdecl ath_hal_computetxtime(struct ath_hal *,
const HAL_RATE_TABLE *rates,
a_uint32_t frameLen,
projects / open-ath9k-htc-firmware.git / blobdiff