+/*
+ * Copyright (c) 2013 Qualcomm Atheros, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted (subject to the limitations in the
+ * disclaimer below) provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of Qualcomm Atheros nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
+ * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
#include "dt_defs.h"
#include "athos_api.h"
#include "regdump.h"
#include "usb_defs.h"
+#include "adf_os_io.h"
+
#include "init.h"
+#include <linux/compiler.h>
+
// @TODO: Should define the memory region later~
#define ALLOCRAM_START ( ((unsigned int)&_fw_image_end) + 4)
#define ALLOCRAM_SIZE ( SYS_RAM_SZIE - ( ALLOCRAM_START - SYS_D_RAM_REGION_0_BASE) - SYS_D_RAM_STACK_SIZE)
// support for more than 64 bytes on command pipe
-extern void vUsb_Reg_Out_patch(void);
+extern void usb_reg_out_patch(void);
extern int _HIFusb_get_max_msg_len_patch(hif_handle_t handle, int pipe);
extern void _HIFusb_isr_handler_patch(hif_handle_t h);
extern BOOLEAN bSet_configuration_patch(void);
extern void vUSBFIFO_EP6Cfg_FS_patch(void);
-extern void vUsb_Status_In_patch(void);
+extern void usb_status_in_patch(void);
extern void _fw_usbfifo_init(USB_FIFO_CONFIG *pConfig);
extern void zfTurnOffPower_patch(void);
extern void zfResetUSBFIFO_patch(void);
extern BOOLEAN bJumptoFlash;
extern BOOLEAN bEepromExist;
-void app_start()
+
+void __section(boot) __noreturn __visible app_start(void)
{
uint32_t rst_status;
A_HOSTIF hostif;
hostif = A_IS_HOST_PRESENT();
#if defined(PROJECT_MAGPIE)
- rst_status = *((volatile uint32_t*)WATCH_DOG_MAGIC_PATTERN_ADDR);
+ rst_status = ioread32(WATCH_DOG_MAGIC_PATTERN_ADDR);
#elif defined(PROJECT_K2)
- rst_status = HAL_WORD_REG_READ(MAGPIE_REG_RST_STATUS_ADDR);
+ rst_status = ioread32(MAGPIE_REG_RST_STATUS_ADDR);
#endif /* #if defined(PROJECT_MAGPIE) */
A_PRINTF(" A_WDT_INIT()\n\r");
#if defined(PROJECT_K2)
- save_cmnos_printf = (uint32_t) fw_cmnos_printf;
+ save_cmnos_printf = fw_cmnos_printf;
#endif
if( hostif == HIF_USB ) {
#if defined(PROJECT_K2)
#if MOVE_PRINT_TO_RAM
- save_cmnos_printf = (uint32_t) _indir_tbl.cmnos.printf._printf;
+ save_cmnos_printf = _indir_tbl.cmnos.printf._printf;
_indir_tbl.cmnos.printf._printf = fw_cmnos_printf;
#endif
_indir_tbl.cmnos.usb._usb_fw_task = _fw_usb_fw_task;
#if defined(PROJECT_MAGPIE)
*((volatile uint32_t*)WATCH_DOG_MAGIC_PATTERN_ADDR)=WDT_MAGIC_PATTERN;
#elif defined(PROJECT_K2)
- HAL_WORD_REG_WRITE(MAGPIE_REG_RST_STATUS_ADDR, WDT_MAGIC_PATTERN);
+ iowrite32(MAGPIE_REG_RST_STATUS_ADDR, WDT_MAGIC_PATTERN);
#endif /* #if defined(PROJECT_MAGPIE) */
/* intr enable would left for firmware */
if( hostif == HIF_USB ) {
_indir_tbl.hif._get_max_msg_len = _HIFusb_get_max_msg_len_patch;
- _indir_tbl.cmnos.usb._usb_reg_out = vUsb_Reg_Out_patch;
+ _indir_tbl.cmnos.usb._usb_reg_out = usb_reg_out_patch;
_indir_tbl.hif._isr_handler = _HIFusb_isr_handler_patch;
_indir_tbl.cmnos.usb._usb_set_configuration = bSet_configuration_patch;
- _indir_tbl.cmnos.usb._usb_status_in = vUsb_Status_In_patch;
+ _indir_tbl.cmnos.usb._usb_status_in = usb_status_in_patch;
_indir_tbl.cmnos.usb._usb_get_descriptor = bGet_descriptor_patch;
_indir_tbl.cmnos.usb._usb_standard_cmd = bStandardCommand_patch;
_indir_tbl.usbfifo_api._init = _fw_usbfifo_init;
_indir_tbl.htc._HTC_ControlSvcProcessMsg = HTCControlSvcProcessMsg_patch;
#endif
- if (!(USB_BYTE_REG_READ(ZM_MAIN_CTRL_OFFSET)&BIT6)) {
+ if (!(ioread8_usb(ZM_MAIN_CTRL_OFFSET) & BIT6))
vUSBFIFO_EP6Cfg_FS_patch();
- }
#ifdef FUSION_USB_ENABLE_TX_STREAM
// For K2, enable tx stream mode
- A_PRINTF("Enable Tx Stream mode\r\n");
-
- // Patch for K2 USB STREAM mode
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT0))); // disable down stream DMA mode
-
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET,
- ((USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT6)));
+ A_PRINTF("Enable Tx Stream mode: 0x%x\r\n",
+ ioread32_usb(ZM_SOC_USB_MODE_CTRL_OFFSET));
+ /* Patch for K2 USB STREAM mode */
+ /* disable down stream DMA mode */
+ io32_rmw_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT6, BIT0);
#if SYSTEM_MODULE_HP_EP5
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET,
- ((USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT8)));
+ io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT8);
#endif
#if SYSTEM_MODULE_HP_EP6
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET,
- ((USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|BIT9)));
+ io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT9);
#endif
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET,
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|(BIT0))); // enable down stream DMA mode
+ /* enable down stream DMA mode */
+ io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT0);
#endif
#ifdef FUSION_USB_ENABLE_RX_STREAM
- // Patch for K2 USB STREAM mode
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT1))); // disable upstream DMA mode
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(~BIT3))); // enable upstream stream mode
-
- // K2, Set maximum IN transfer to 8K
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)&(0xcf)));
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET, \
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|(0x20)));
-
- USB_WORD_REG_WRITE(ZM_SOC_USB_MODE_CTRL_OFFSET,
- (USB_WORD_REG_READ(ZM_SOC_USB_MODE_CTRL_OFFSET)|(BIT1))); // enable upstream DMA mode
-
- USB_WORD_REG_WRITE(ZM_SOC_USB_TIME_CTRL_OFFSET, 0xa0); // set stream mode timeout critirea
+ /* Patch for K2 USB STREAM mode */
+ /* disable upstream DMA mode and enable upstream stream mode */
+ io32_clr_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT1 | BIT3);
+
+ /* K2, Set maximum IN transfer to 8K */
+ io32_rmw_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, 0x20, 0x30);
+
+ /* enable upstream DMA mode */
+ io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT1);
+
+ /* set stream mode timeout critirea */
+ iowrite32_usb(ZM_SOC_USB_TIME_CTRL_OFFSET, 0xa0);
#if defined(PROJECT_K2)
/*0x10004020 is vaild in k2 but could be invaild in other chip*/
- if ((HAL_WORD_REG_READ(0x10004020) & 0x2000) != 0) {
+ if ((ioread32(0x10004020) & 0x2000) != 0) {
/* disable stream mode for AR9270 */
- USB_WORD_REG_WRITE(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 0);
+ iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 0);
} else {
/* enable stream mode for AR9271 */
- USB_WORD_REG_WRITE(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
+ iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
}
#else
- USB_WORD_REG_WRITE(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
+ iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
#endif
#endif
}
else if (hostif == HIF_PCI )
hif_pci_patch_install(&_indir_tbl.hif);
#endif
+ A_PRINTF("USB mode: 0x%x\r\n", ioread32_usb(0x100));
// patch the clock function
if(1) {
Magpie_init();
#if MAGPIE_ENABLE_WLAN == 1
-
- HAL_WORD_REG_WRITE(MAGPIE_REG_RST_RESET_ADDR,
- (HAL_WORD_REG_READ(MAGPIE_REG_RST_RESET_ADDR)&(~(BIT10|BIT8|BIT7|BIT6))));
+ io32_clr(MAGPIE_REG_RST_RESET_ADDR, BIT10 | BIT8 | BIT7 | BIT6);
#if defined(PROJECT_MAGPIE)
- HAL_WORD_REG_WRITE(MAGPIE_REG_AHB_ARB_ADDR,
- (HAL_WORD_REG_READ(MAGPIE_REG_AHB_ARB_ADDR)|BIT1));
+ io32_set(MAGPIE_REG_AHB_ARB_ADDR, BIT1);
#endif
wlan_pci_module_init();
projects / open-ath9k-htc-firmware.git / blobdiff