carl9170 firmware: per-vif tx sequence counter

[carl9170fw.git] / include / shared / wlan.h

diff --git a/include/shared/wlan.h b/include/shared/wlan.h
index 1fd3ab1e6baa1b6ae75374038a291452dac98352..9e1324b67e08e19cc0bea538b74ed9ab0b5fb924 100644 (file)
--- a/include/shared/wlan.h
+++ b/include/shared/wlan.h
@@ -1,7 +1,7 @@
 /*
- * Atheros AR9170 driver
+ * Shared Atheros AR9170 Header
  *
- * Hardware-specific definitions
+ * RX/TX meta descriptor format
  *
  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com>
@@ -56,7 +56,8 @@
 
 #define        AR9170_RX_ENC_SOFTWARE                  0x8
 
-#define        AR9170_RX_STATUS_MODULATION_MASK        0x03
+#define        AR9170_RX_STATUS_MODULATION             0x03
+#define        AR9170_RX_STATUS_MODULATION_S           0
 #define        AR9170_RX_STATUS_MODULATION_CCK         0x00
 #define        AR9170_RX_STATUS_MODULATION_OFDM        0x01
 #define        AR9170_RX_STATUS_MODULATION_HT          0x02
@@ -66,12 +67,16 @@
 #define        AR9170_RX_STATUS_SHORT_PREAMBLE         0x08
 #define        AR9170_RX_STATUS_GREENFIELD             0x08
 
-#define        AR9170_RX_STATUS_MPDU_MASK              0x30
+#define        AR9170_RX_STATUS_MPDU                   0x30
+#define        AR9170_RX_STATUS_MPDU_S                 4
 #define        AR9170_RX_STATUS_MPDU_SINGLE            0x00
 #define        AR9170_RX_STATUS_MPDU_FIRST             0x20
 #define        AR9170_RX_STATUS_MPDU_MIDDLE            0x30
 #define        AR9170_RX_STATUS_MPDU_LAST              0x10
 
+#define        AR9170_RX_STATUS_CONT_AGGR              0x40
+#define        AR9170_RX_STATUS_TOTAL_ERROR            0x80
+
 #define        AR9170_RX_ERROR_RXTO                    0x01
 #define        AR9170_RX_ERROR_OVERRUN                 0x02
 #define        AR9170_RX_ERROR_DECRYPT                 0x04
@@ -79,7 +84,6 @@
 #define        AR9170_RX_ERROR_WRONG_RA                0x10
 #define        AR9170_RX_ERROR_PLCP                    0x20
 #define        AR9170_RX_ERROR_MMIC                    0x40
-#define        AR9170_RX_ERROR_FATAL                   0x80
 
 /* these are either-or */
 #define        AR9170_TX_MAC_PROT_RTS                  0x0001
@@ -232,7 +236,8 @@ struct ar9170_tx_hw_phy_control {
 struct ar9170_tx_rate_info {
        u8 tries:3;
        u8 erp_prot:2;
-       u8 free:3; /* free for use (e.g.:RIFS/TXOP/AMPDU) */
+       u8 ampdu:1;
+       u8 free:2; /* free for use (e.g.:RIFS/TXOP/AMPDU) */
 } __packed;
 
 struct carl9170_tx_superdesc {
@@ -245,7 +250,8 @@ struct carl9170_tx_superdesc {
        u8 ampdu_commit_density:1;
        u8 ampdu_commit_factor:1;
        u8 ampdu_unused_bit:1;
-       u8 queue:3;
+       u8 queue:2;
+       u8 assign_seq:1;
        u8 vif_id:3;
        u8 fill_in_tsf:1;
        u8 cab:1;
@@ -291,8 +297,9 @@ struct _ar9170_tx_hwdesc {
 #define        CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR           0x40
 #define        CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR_S         6
 
-#define CARL9170_TX_SUPER_MISC_QUEUE                   0x7
+#define CARL9170_TX_SUPER_MISC_QUEUE                   0x3
 #define CARL9170_TX_SUPER_MISC_QUEUE_S                 0
+#define CARL9170_TX_SUPER_MISC_ASSIGN_SEQ              0x4
 #define        CARL9170_TX_SUPER_MISC_VIF_ID                   0x38
 #define        CARL9170_TX_SUPER_MISC_VIF_ID_S                 3
 #define        CARL9170_TX_SUPER_MISC_FILL_IN_TSF              0x40
@@ -302,6 +309,8 @@ struct _ar9170_tx_hwdesc {
 #define CARL9170_TX_SUPER_RI_TRIES_S                   0
 #define CARL9170_TX_SUPER_RI_ERP_PROT                  0x18
 #define CARL9170_TX_SUPER_RI_ERP_PROT_S                        3
+#define CARL9170_TX_SUPER_RI_AMPDU                     0x20
+#define CARL9170_TX_SUPER_RI_AMPDU_S                   5
 
 struct _carl9170_tx_superdesc {
        __le16 len;
@@ -323,13 +332,15 @@ struct _carl9170_tx_superframe {
 
 #define        CARL9170_TX_SUPERDESC_LEN               24
 #define        AR9170_TX_HWDESC_LEN                    8
-#define        AR9170_TX_SUPERFRAME_LEN                (CARL9170_TX_HWDESC_LEN + \
-                                                AR9170_TX_SUPERDESC_LEN)
+#define        CARL9170_TX_SUPERFRAME_LEN              (CARL9170_TX_SUPERDESC_LEN + \
+                                                AR9170_TX_HWDESC_LEN)
 
 struct ar9170_rx_head {
        u8 plcp[12];
 } __packed;
 
+#define        AR9170_RX_HEAD_LEN                      12
+
 struct ar9170_rx_phystatus {
        union {
                struct {
@@ -344,12 +355,16 @@ struct ar9170_rx_phystatus {
        u8 phy_err;
 } __packed;
 
+#define        AR9170_RX_PHYSTATUS_LEN                 20
+
 struct ar9170_rx_macstatus {
        u8 SAidx, DAidx;
        u8 error;
        u8 status;
 } __packed;
 
+#define        AR9170_RX_MACSTATUS_LEN                 4
+
 struct ar9170_rx_frame_single {
        struct ar9170_rx_head phy_head;
        struct ieee80211_hdr i3e;
@@ -397,10 +412,25 @@ enum ar9170_txq {
        AR9170_TXQ_BK,
 
        __AR9170_NUM_TXQ,
-
-       AR9170_TXQ_MGMT = 4,
 };
 
+/*
+ * This is an workaround for several undocumented bugs.
+ * Don't mess with the QoS/AC <-> HW Queue map, if you don't
+ * know what you are doing.
+ *
+ * Known problems [hardware]:
+ *  * The MAC does not aggregate frames on anything other
+ *    than the first HW queue.
+ *  * when an AMPDU is placed [in the first hw queue] and
+ *    additional frames are already queued on a different
+ *    hw queue, the MAC will ALWAYS freeze.
+ *
+ * In a nutshell: The hardware can either do QoS or
+ * Aggregation but not both at the same time. As a
+ * result, this makes the device pretty much useless
+ * for any serious 802.11n setup.
+ */
 static const u8 ar9170_qmap[__AR9170_NUM_TXQ] = { 2, 1, 0, 3 };
 
 #define        AR9170_TXQ_DEPTH                        32