carl9170 firmware: move SRAM & PRAM definitions into shared headers

[carl9170fw.git] / include / shared / hw.h

diff --git a/include/shared/hw.h b/include/shared/hw.h
index 14973128ea4d6fb26f945f1e0b8ed0324f68ef86..bc4a83a107d2aa091450de4a31d267fba6c9c11c 100644 (file)
--- a/include/shared/hw.h
+++ b/include/shared/hw.h
@@ -148,6 +148,8 @@
 #define        AR9170_MAC_REG_PRETBTT                  (AR9170_MAC_REG_BASE + 0x524)
 #define                AR9170_MAC_PRETBTT_S                    0
 #define                AR9170_MAC_PRETBTT                      0x0000ffff
+#define                AR9170_MAC_PRETBTT2_S                   16
+#define                AR9170_MAC_PRETBTT2                     0xffff0000
 
 #define        AR9170_MAC_REG_MAC_ADDR_L               (AR9170_MAC_REG_BASE + 0x610)
 #define        AR9170_MAC_REG_MAC_ADDR_H               (AR9170_MAC_REG_BASE + 0x614)
@@ -237,11 +239,6 @@
 #define                AR9170_MAC_CAM_STA                      0x2
 #define                AR9170_MAC_CAM_AP_WDS                   0x3
 #define                AR9170_MAC_CAM_DEFAULTS                 (0xf << 24)
-/* BEACON specification bits */
-#define                AR9170_MAC_CAM_AP_MODE                  0x01000000
-#define                AR9170_MAC_CAM_IBSS_MODE                0x02000000
-#define                AR9170_MAC_CAM_POWER_MNT                0x04000000
-#define                AR9170_MAC_CAM_STA_PS                   0x08000000
 #define                AR9170_MAC_CAM_HOST_PENDING             0x80000000
 
 #define        AR9170_MAC_REG_CAM_ROLL_CALL_TBL_L      (AR9170_MAC_REG_BASE + 0x704)
@@ -375,8 +372,8 @@
 
 #define        AR9170_MAC_REG_BCN_PLCP                 (AR9170_MAC_REG_BASE + 0xd90)
 #define        AR9170_MAC_REG_BCN_CTRL                 (AR9170_MAC_REG_BASE + 0xd94)
-#define                AR9170_BCN_READY                        0x01
-#define                AR9170_BCN_LOCK                         0x02
+#define                AR9170_BCN_CTRL_READY                   0x01
+#define                AR9170_BCN_CTRL_LOCK                    0x02
 
 #define AR9170_MAC_REG_BCN_CURR_ADDR           (AR9170_MAC_REG_BASE + 0xd98)
 #define        AR9170_MAC_REG_BCN_COUNT                (AR9170_MAC_REG_BASE + 0xd9c)
@@ -653,7 +650,11 @@
 #define        AR9170_CAM_MAX_USER                     64
 #define        AR9170_CAM_MAX_KEY_LENGTH               16
 
-#define AR9170_PRAM_OFFSET                     0x200000
+#define AR9170_SRAM_OFFSET             0x100000
+#define AR9170_SRAM_SIZE               0x18000
+
+#define AR9170_PRAM_OFFSET             0x200000
+#define AR9170_PRAM_SIZE               0x8000
 
 enum cpu_clock {
        AHB_STATIC_40MHZ = 0,