carl9170 firmware: update headers for WOL

[carl9170fw.git] / include / shared / hw.h

diff --git a/include/shared/hw.h b/include/shared/hw.h
index e85df6edfed32ed6d58888b7fb18476aab9d40cd..4e30762dd903de04a704789ac823e53f28311f1d 100644 (file)
--- a/include/shared/hw.h
+++ b/include/shared/hw.h
@@ -463,6 +463,8 @@
 
 #define        AR9170_PWR_REG_CHIP_REVISION            (AR9170_PWR_REG_BASE + 0x010)
 #define AR9170_PWR_REG_PLL_ADDAC               (AR9170_PWR_REG_BASE + 0x014)
+#define                AR9170_PWR_PLL_ADDAC_DIV_S              2
+#define                AR9170_PWR_PLL_ADDAC_DIV                0xffc
 #define        AR9170_PWR_REG_WATCH_DOG_MAGIC          (AR9170_PWR_REG_BASE + 0x020)
 
 /* Faraday USB Controller */
@@ -471,6 +473,9 @@
 #define        AR9170_USB_REG_MAIN_CTRL                (AR9170_USB_REG_BASE + 0x000)
 #define                AR9170_USB_MAIN_CTRL_REMOTE_WAKEUP      BIT(0)
 #define                AR9170_USB_MAIN_CTRL_ENABLE_GLOBAL_INT  BIT(2)
+#define                AR9170_USB_MAIN_CTRL_GO_TO_SUSPEND      BIT(3)
+#define                AR9170_USB_MAIN_CTRL_RESET              BIT(4)
+#define                AR9170_USB_MAIN_CTRL_CHIP_ENABLE        BIT(5)
 #define                AR9170_USB_MAIN_CTRL_HIGHSPEED          BIT(6)
 
 #define        AR9170_USB_REG_DEVICE_ADDRESS           (AR9170_USB_REG_BASE + 0x001)
@@ -499,6 +504,13 @@
 #define        AR9170_USB_REG_INTR_GROUP               (AR9170_USB_REG_BASE + 0x020)
 
 #define        AR9170_USB_REG_INTR_SOURCE_0            (AR9170_USB_REG_BASE + 0x021)
+#define                AR9170_USB_INTR_SRC0_SETUP              BIT(0)
+#define                AR9170_USB_INTR_SRC0_IN                 BIT(1)
+#define                AR9170_USB_INTR_SRC0_OUT                BIT(2)
+#define                AR9170_USB_INTR_SRC0_FAIL               BIT(3) /* ??? */
+#define                AR9170_USB_INTR_SRC0_END                BIT(4) /* ??? */
+#define                AR9170_USB_INTR_SRC0_ABORT              BIT(7)
+
 #define        AR9170_USB_REG_INTR_SOURCE_1            (AR9170_USB_REG_BASE + 0x022)
 #define        AR9170_USB_REG_INTR_SOURCE_2            (AR9170_USB_REG_BASE + 0x023)
 #define        AR9170_USB_REG_INTR_SOURCE_3            (AR9170_USB_REG_BASE + 0x024)
@@ -506,6 +518,15 @@
 #define        AR9170_USB_REG_INTR_SOURCE_5            (AR9170_USB_REG_BASE + 0x026)
 #define        AR9170_USB_REG_INTR_SOURCE_6            (AR9170_USB_REG_BASE + 0x027)
 #define        AR9170_USB_REG_INTR_SOURCE_7            (AR9170_USB_REG_BASE + 0x028)
+#define                AR9170_USB_INTR_SRC7_USB_RESET          BIT(1)
+#define                AR9170_USB_INTR_SRC7_USB_SUSPEND        BIT(2)
+#define                AR9170_USB_INTR_SRC7_USB_RESUME         BIT(3)
+#define                AR9170_USB_INTR_SRC7_ISO_SEQ_ERR        BIT(4)
+#define                AR9170_USB_INTR_SRC7_ISO_SEQ_ABORT      BIT(5)
+#define                AR9170_USB_INTR_SRC7_TX0BYTE            BIT(6)
+#define                AR9170_USB_INTR_SRC7_RX0BYTE            BIT(7)
+
+#define        AR9170_USB_REG_IDLE_COUNT               (AR9170_USB_REG_BASE + 0x02f)
 
 #define        AR9170_USB_REG_EP_MAP                   (AR9170_USB_REG_BASE + 0x030)
 #define        AR9170_USB_REG_EP1_MAP                  (AR9170_USB_REG_BASE + 0x030)
@@ -581,6 +602,10 @@
 
 #define        AR9170_USB_REG_MAX_AGG_UPLOAD           (AR9170_USB_REG_BASE + 0x110)
 #define        AR9170_USB_REG_UPLOAD_TIME_CTL          (AR9170_USB_REG_BASE + 0x114)
+
+#define AR9170_USB_REG_WAKE_UP                 (AR9170_USB_REG_BASE + 0x120)
+#define                AR9170_USB_WAKE_UP_WAKE                 BIT(0)
+
 #define        AR9170_USB_REG_CBUS_CTRL                (AR9170_USB_REG_BASE + 0x1f0)
 #define                AR9170_USB_CBUS_CTRL_BUFFER_END         (BIT(1))