carl9170 firmware: Support multiple CAB queues

[carl9170fw.git] / include / shared / hw.h

diff --git a/include/shared/hw.h b/include/shared/hw.h
index 30b19a7ef312968fb95525dbd0938113d9a55b3a..13b7b754cc4dfa1226ed4191dfeb78c538d0d8f6 100644 (file)
--- a/include/shared/hw.h
+++ b/include/shared/hw.h
@@ -375,8 +375,8 @@
 
 #define        AR9170_MAC_REG_BCN_PLCP                 (AR9170_MAC_REG_BASE + 0xd90)
 #define        AR9170_MAC_REG_BCN_CTRL                 (AR9170_MAC_REG_BASE + 0xd94)
-#define                AR9170_BCN_READY                        0x01
-#define                AR9170_BCN_LOCK                         0x02
+#define                AR9170_BCN_CTRL_READY                   0x01
+#define                AR9170_BCN_CTRL_LOCK                    0x02
 
 #define AR9170_MAC_REG_BCN_CURR_ADDR           (AR9170_MAC_REG_BASE + 0xd98)
 #define        AR9170_MAC_REG_BCN_COUNT                (AR9170_MAC_REG_BASE + 0xd9c)
@@ -566,17 +566,21 @@
 
 #define        AR9170_USB_REG_FIFO_SIZE                (AR9170_USB_REG_BASE + 0x100)
 #define        AR9170_USB_REG_DMA_CTL                  (AR9170_USB_REG_BASE + 0x108)
-#define                AR9170_DMA_CTL_ENABLE_TO_DEVICE         BIT(0)
-#define                AR9170_DMA_CTL_ENABLE_FROM_DEVICE       BIT(1)
-#define                AR9170_DMA_CTL_HIGH_SPEED               BIT(2)
-#define                AR9170_DMA_CTL_UP_PACKET_MODE           BIT(3)
-#define                AR9170_DMA_CTL_UP_STREAM_S              4
-#define                AR9170_DMA_CTL_UP_STREAM                (3 << 4)
-#define                AR9170_DMA_CTL_UP_STREAM_4K             (0 << 4)
-#define                AR9170_DMA_CTL_UP_STREAM_8K             (1 << 4)
-#define                AR9170_DMA_CTL_UP_STREAM_16K            (2 << 4)
-#define                AR9170_DMA_CTL_UP_STREAM_32K            (3 << 4)
-#define                AR9170_DMA_CTL_DOWN_STREAM              BIT(6)
+#define                AR9170_USB_DMA_CTL_ENABLE_TO_DEVICE     BIT(0)
+#define                AR9170_USB_DMA_CTL_ENABLE_FROM_DEVICE   BIT(1)
+#define                AR9170_USB_DMA_CTL_HIGH_SPEED           BIT(2)
+#define                AR9170_USB_DMA_CTL_UP_PACKET_MODE       BIT(3)
+#define                AR9170_USB_DMA_CTL_UP_STREAM_S          4
+#define                AR9170_USB_DMA_CTL_UP_STREAM            (BIT(4) | BIT(5))
+#define                AR9170_USB_DMA_CTL_UP_STREAM_4K         (0)
+#define                AR9170_USB_DMA_CTL_UP_STREAM_8K         BIT(4)
+#define                AR9170_USB_DMA_CTL_UP_STREAM_16K        BIT(5)
+#define                AR9170_USB_DMA_CTL_UP_STREAM_32K        (BIT(4) | BIT(5))
+#define                AR9170_USB_DMA_CTL_DOWN_STREAM          BIT(6)
+
+#define        AR9170_USB_REG_DMA_STATUS               (AR9170_USB_REG_BASE + 0x10c)
+#define                AR9170_USB_DMA_STATUS_UP_IDLE           BIT(8)
+#define                AR9170_USB_DMA_STATUS_DN_IDLE           BIT(16)
 
 #define        AR9170_USB_REG_MAX_AGG_UPLOAD           (AR9170_USB_REG_BASE + 0x110)
 #define        AR9170_USB_REG_UPLOAD_TIME_CTL          (AR9170_USB_REG_BASE + 0x114)