carl9170 firmware: fix inaccurate delay calculation

[carl9170fw.git] / carlfw / src / rf.c

diff --git a/carlfw/src/rf.c b/carlfw/src/rf.c
index 703bd4281d2492e37a9642e9728bac7ff44cd06e..bb74b817aed2ee7428753b03e138b4ab2dc4a9e2 100644 (file)
--- a/carlfw/src/rf.c
+++ b/carlfw/src/rf.c
@@ -136,7 +136,7 @@ static uint32_t AGC_calibration(uint32_t loop)
        uint32_t wrdata;
        uint32_t ret;
 
-#define AGC_CAL_NF     (AR9170_PHY_AGC_CONTROL_CAL | AR9170_PHY_AGC_CONTROL_NF);
+#define AGC_CAL_NF     (AR9170_PHY_AGC_CONTROL_CAL | AR9170_PHY_AGC_CONTROL_NF)
 
        wrdata = get_async(AR9170_PHY_REG_AGC_CONTROL) | AGC_CAL_NF;
        set(AR9170_PHY_REG_AGC_CONTROL, wrdata);
@@ -144,14 +144,10 @@ static uint32_t AGC_calibration(uint32_t loop)
        ret = get_async(AR9170_PHY_REG_AGC_CONTROL) & AGC_CAL_NF;
 
        /* sitesurvey : 100 ms / current connected 200 ms */
-       while (loop && ret != 0x0) {
-               ret = get_async(AR9170_PHY_REG_AGC_CONTROL) & AGC_CAL_NF;
-
-               if (ret == 0)
-                       break;
-
+       while ((ret != 0) && loop--) {
                udelay(100);
-               loop--;
+
+               ret = get_async(AR9170_PHY_REG_AGC_CONTROL) & AGC_CAL_NF;
        }
 
        /* return the AGC/Noise calibration state to the driver */
@@ -185,10 +181,6 @@ static uint32_t rf_init(const uint32_t delta_slope_coeff_exp,
                set(AR9170_PHY_REG_ANALOG_SWAP, AR9170_PHY_ANALOG_SWAP_AB |
                                                AR9170_PHY_ANALOG_SWAP_ALT_CHAIN);
 
-               /* configure mask */
-               set(AR9170_PHY_REG_RX_CHAINMASK, 0x5);  /* chain 0 + chain 2 */
-               set(AR9170_PHY_REG_CAL_CHAINMASK, 0x5); /* chain 0 + chain 2 */
-
                /* Activate BB */
                set(AR9170_PHY_REG_ACTIVE, AR9170_PHY_ACTIVE_EN);
                delay(10);
@@ -208,9 +200,9 @@ void rf_cmd(const struct carl9170_cmd *cmd, struct carl9170_rsp *resp)
        fw.phy.frequency = cmd->rf_init.freq;
 
        if ((fw.phy.ht_settings & EIGHTY_FLAG) == EIGHTY_FLAG)
-               clock_set(true, AHB_80_88MHZ);
+               clock_set(AHB_80_88MHZ, true);
        else
-               clock_set(true, AHB_40_44MHZ);
+               clock_set(AHB_40_44MHZ, true);
 
        ret = rf_init(le32_to_cpu(cmd->rf_init.delta_slope_coeff_exp),
                      le32_to_cpu(cmd->rf_init.delta_slope_coeff_man),