carl9170 firmware: enable BA REQ responder by default
[carl9170fw.git] / carlfw / src / dma.c
index 28960326f2f1c742358d9510a101fd1bfaf56849..7ca0c9aec0222eb2799e8f1fc3e998309097cee9 100644 (file)
@@ -6,7 +6,7 @@
  * Copyright (c) 2000-2005 ZyDAS Technology Corporation
  * Copyright (c) 2007-2009 Atheros Communications, Inc.
  * Copyright   2009    Johannes Berg <johannes@sipsolutions.net>
- * Copyright 2009, 2010 Christian Lamparter <chunkeey@googlemail.com>
+ * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -78,23 +78,23 @@ void dma_init_descriptors(void)
        fw.pta.down_queue.head = fw.pta.down_queue.terminator = &dma_mem.terminator[i++];
        for (j = 0; j < __AR9170_NUM_TX_QUEUES; j++)
                fw.wlan.tx_queue[j].head = fw.wlan.tx_queue[j].terminator = &dma_mem.terminator[i++];
+       fw.wlan.tx_retry.head = fw.wlan.tx_retry.terminator = &dma_mem.terminator[i++];
        fw.wlan.rx_queue.head = fw.wlan.rx_queue.terminator = &dma_mem.terminator[i++];
        fw.usb.int_desc = &dma_mem.terminator[i++];
+       fw.wlan.ba_desc = &dma_mem.terminator[i++];
 
 #ifdef CONFIG_CARL9170FW_CAB_QUEUE
-       fw.wlan.cab_queue.head = fw.wlan.cab_queue.terminator = &dma_mem.terminator[i++];
+       /* GCC bug ? */
+# if (CARL9170_INTF_NUM != 2)
+       for (j = 0; j < CARL9170_INTF_NUM; j++)
+               fw.wlan.cab_queue[j].head = fw.wlan.cab_queue[j].terminator = &dma_mem.terminator[i++];
+#else
+       fw.wlan.cab_queue[0].head = fw.wlan.cab_queue[0].terminator = &dma_mem.terminator[i++];
+       fw.wlan.cab_queue[1].head = fw.wlan.cab_queue[1].terminator = &dma_mem.terminator[i++];
+#endif
 #endif /* CONFIG_CARL9170FW_CAB_QUEUE */
 
-#ifdef CONFIG_CARL9170FW_HANDLE_BACK_REQ
-       fw.wlan.ba_desc = &dma_mem.terminator[i++];
-#endif /* CONFIG_CARL9170FW_HANDLE_BACK_REQ */
-
-#ifdef CONFIG_CARL9170FW_DELAYED_TX
-       fw.wlan.tx_retry.head = fw.wlan.tx_retry.terminator = &dma_mem.terminator[i++];
-
-       for (j = 0; j < __AR9170_NUM_TX_QUEUES; j++)
-               fw.wlan.tx_delay[j].head = fw.wlan.tx_delay[j].terminator = &dma_mem.terminator[i++];
-#endif /* CONFIG_CARL9170FW_DELAYED_TX */
+       BUILD_BUG_ON(AR9170_TERMINATOR_NUMBER != j);
 
        DBG("Blocks:%d [tx:%d, rx:%d] Terminators:%d/%d\n",
            AR9170_BLOCK_NUMBER, AR9170_TX_BLOCK_NUMBER,
@@ -137,7 +137,6 @@ void dma_init_descriptors(void)
        /* rsp is now available for use */
        fw.usb.int_desc_available = 1;
 
-#ifdef CONFIG_CARL9170FW_HANDLE_BACK_REQ
        fw.wlan.ba_desc->status = AR9170_OWN_BITS_SW;
        fw.wlan.ba_desc->ctrl = (AR9170_CTRL_LS_BIT | AR9170_CTRL_FS_BIT);
        fw.wlan.ba_desc->dataSize = fw.wlan.ba_desc->totalLen =
@@ -151,7 +150,6 @@ void dma_init_descriptors(void)
        memset(DESC_PAYLOAD(fw.wlan.ba_desc), 0, 128);
 
        fw.wlan.ba_desc_available = 1;
-#endif /* CONFIG_CARL9170FW_HANDLE_BACK_REQ */
 }
 
 /*
@@ -162,11 +160,13 @@ void dma_init_descriptors(void)
  */
 void dma_reclaim(struct dma_queue *q, struct dma_desc *desc)
 {
-       struct dma_desc *tmpDesc;
+       struct dma_desc *tmpDesc, *last;
        struct dma_desc tdesc;
 
        /* 1. Set OWN bit to HW for all TDs to be added, clear ctrl and size */
        tmpDesc = desc;
+       last = desc->lastAddr;
+
        while (1) {
                tmpDesc->status = AR9170_OWN_BITS_HW;
                tmpDesc->ctrl = 0;
@@ -175,24 +175,28 @@ void dma_reclaim(struct dma_queue *q, struct dma_desc *desc)
 
                /* TODO : Exception handle */
 
-               if (desc->lastAddr == tmpDesc)
+               tmpDesc->lastAddr = tmpDesc;
+
+               if (tmpDesc == last)
                        break;
 
-               tmpDesc->lastAddr = desc->lastAddr;
                tmpDesc = tmpDesc->nextAddr;
        }
 
        /* 2. Next address of Last TD to be added = first TD */
-       desc->lastAddr->nextAddr = desc;
+       tmpDesc->nextAddr = desc;
+
+       /* Link first TD to self */
+       desc->lastAddr = q->terminator;
 
        /* 3. Copy first TD to be added to TTD */
        copy_dma_desc(&tdesc, desc);
 
-       /* 4. set first TD OWN bit to SW */
-       desc->status = AR9170_OWN_BITS_SW;
+       /* 4. Initialize new terminator */
+       clear_descriptor(desc);
 
        /* 5. Copy TTD to last TD */
-       tdesc.status &= (~AR9170_OWN_BITS);
+       tdesc.status = 0;
        copy_dma_desc((void *)q->terminator, (void *)&tdesc);
        q->terminator->status |= AR9170_OWN_BITS_HW;
 
@@ -212,9 +216,6 @@ void dma_put(struct dma_queue *q, struct dma_desc *desc)
 
        tmpDesc = desc;
 
-       /* force correct CTRL_BITS */
-       tmpDesc->ctrl = 0;
-       tmpDesc->ctrl |= AR9170_CTRL_FS_BIT;
        while (1) {
                /* update totalLen */
                tmpDesc->totalLen = desc->totalLen;
@@ -229,9 +230,7 @@ void dma_put(struct dma_queue *q, struct dma_desc *desc)
                        break;
 
                tmpDesc = tmpDesc->nextAddr;
-               tmpDesc->ctrl = 0;
        }
-       tmpDesc->ctrl |= AR9170_CTRL_LS_BIT;
 
        /* 2. Next address of Last TD to be added = first TD */
        desc->lastAddr->nextAddr = desc;
@@ -243,14 +242,8 @@ void dma_put(struct dma_queue *q, struct dma_desc *desc)
        /* 3. Copy first TD to be added to TTD */
        copy_dma_desc(&tdesc, desc);
 
-       /* 4. set first TD OWN bit to SW */
-       desc->status = AR9170_OWN_BITS_SW;
-       desc->ctrl = 0;
-       desc->totalLen = 0;
-       desc->dataSize = 0;
-       desc->lastAddr = desc;
-       desc->nextAddr = desc;
-       desc->dataAddr = NULL;
+       /* 4. Initialize new terminator */
+       clear_descriptor(desc);
 
        /* 5. Copy TTD to last TD */
        tdesc.status &= (~AR9170_OWN_BITS);