here is comment from kernel source which has enought explanation:
* Some buggy high speed devices have bulk endpoints using
* maxpacket sizes other than 512. High speed HCDs may not
* be able to handle that particular bug, so let's warn...
in our case EP3 and EP4 have maxpacket sizes = 64!!!
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
ath_hal_memcpy(ConfigDescriptorPatch,
u8ConfigDescriptorEX, sizeof(ConfigDescriptorPatch));
- /* Patch the transfer type of EP3 and EP4 */
- ConfigDescriptorPatch[EP3_TRANSFER_TYPE_OFFSET] = 0x0283;
- ConfigDescriptorPatch[EP3_INT_INTERVAL] = 0x0700;
- ConfigDescriptorPatch[EP4_TRANSFER_TYPE_OFFSET] = 0x4002;
- ConfigDescriptorPatch[EP4_INT_INTERVAL] = 0x00;
+ /* place holder for EPx patches */
switch (mDEV_REQ_VALUE_LOW())
{
/* Copy ConfigDescriptor */
ath_hal_memcpy(ConfigDescriptorPatch, p, sizeof(ConfigDescriptorPatch));
- p = (uint8_t *)ConfigDescriptorPatch;
-
- /* Patch the transfer type of EP3 and EP4 */
- ConfigDescriptorPatch[EP3_TRANSFER_TYPE_OFFSET] = 0x0283;
- ConfigDescriptorPatch[EP3_INT_INTERVAL] = 0x0700;
- ConfigDescriptorPatch[EP4_TRANSFER_TYPE_OFFSET] = 0x4002;
- ConfigDescriptorPatch[EP4_INT_INTERVAL] = 0x00;
+ /* place holder for EPx patches */
switch (mDEV_REQ_VALUE_LOW())
{