#ifdef CONFIG_CARL9170FW_USB_INIT_FIRMWARE
static void usb_pta_init(void)
{
+ unsigned int usb_dma_ctrl = 0;
/* Set PTA mode to USB */
andl(AR9170_PTA_REG_DMA_MODE_CTRL,
~AR9170_PTA_DMA_MODE_CTRL_DISABLE_USB);
fw.usb.cfg_desc = &usb_config_highspeed;
/* 512 Byte DMA transfers */
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_HIGH_SPEED);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_HIGH_SPEED;
} else {
fw.usb.cfg_desc = &usb_config_fullspeed;
fw.usb.os_cfg_desc = &usb_config_highspeed;
}
#ifdef CONFIG_CARL9170FW_USB_UP_STREAM
- /* Enable upload stream mode */
- andl(AR9170_USB_REG_DMA_CTL, ~AR9170_DMA_CTL_UP_PACKET_MODE);
-
- /* reset maximum transfer size */
- andl(AR9170_USB_REG_DMA_CTL, ~(AR9170_DMA_CTL_UP_STREAM));
-
# if (CONFIG_CARL9170FW_RX_FRAME_LEN == 4096)
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_UP_STREAM_4K);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_UP_STREAM_4K;
# elif (CONFIG_CARL9170FW_RX_FRAME_LEN == 8192)
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_UP_STREAM_8K);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_UP_STREAM_8K;
# elif (CONFIG_CARL9170FW_RX_FRAME_LEN == 16384)
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_UP_STREAM_16K);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_UP_STREAM_16K;
# elif (CONFIG_CARL9170FW_RX_FRAME_LEN == 32768)
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_UP_STREAM_32K);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_UP_STREAM_32K;
# else
# error "Invalid AR9170_RX_FRAME_LEN setting"
# endif
#else /* CONFIG_CARL9170FW_USB_UP_STREAM */
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_UP_PACKET_MODE);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_UP_PACKET_MODE;
#endif /* CONFIG_CARL9170FW_USB_UP_STREAM */
#ifdef CONFIG_CARL9170FW_USB_DOWN_STREAM
/* Enable down stream mode */
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_DOWN_STREAM);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_DOWN_STREAM;
#endif /* CONFIG_CARL9170FW_USB_DOWN_STREAM */
#ifdef CONFIG_CARL9170FW_USB_UP_STREAM
#endif /* CONFIG_CARL9170FW_USB_UP_STREAM */
/* Enable up stream and down stream */
- orl(AR9170_USB_REG_DMA_CTL, AR9170_DMA_CTL_ENABLE_TO_DEVICE |
- AR9170_DMA_CTL_ENABLE_FROM_DEVICE);
+ usb_dma_ctrl |= AR9170_USB_DMA_CTL_ENABLE_TO_DEVICE |
+ AR9170_USB_DMA_CTL_ENABLE_FROM_DEVICE;
+
+ set(AR9170_USB_REG_DMA_CTL, usb_dma_ctrl);
}
#endif /* CONFIG_CARL9170FW_USB_INIT_FIRMWARE */
#define AR9170_USB_REG_FIFO_SIZE (AR9170_USB_REG_BASE + 0x100)
#define AR9170_USB_REG_DMA_CTL (AR9170_USB_REG_BASE + 0x108)
-#define AR9170_DMA_CTL_ENABLE_TO_DEVICE BIT(0)
-#define AR9170_DMA_CTL_ENABLE_FROM_DEVICE BIT(1)
-#define AR9170_DMA_CTL_HIGH_SPEED BIT(2)
-#define AR9170_DMA_CTL_UP_PACKET_MODE BIT(3)
-#define AR9170_DMA_CTL_UP_STREAM_S 4
-#define AR9170_DMA_CTL_UP_STREAM (3 << 4)
-#define AR9170_DMA_CTL_UP_STREAM_4K (0 << 4)
-#define AR9170_DMA_CTL_UP_STREAM_8K (1 << 4)
-#define AR9170_DMA_CTL_UP_STREAM_16K (2 << 4)
-#define AR9170_DMA_CTL_UP_STREAM_32K (3 << 4)
-#define AR9170_DMA_CTL_DOWN_STREAM BIT(6)
+#define AR9170_USB_DMA_CTL_ENABLE_TO_DEVICE BIT(0)
+#define AR9170_USB_DMA_CTL_ENABLE_FROM_DEVICE BIT(1)
+#define AR9170_USB_DMA_CTL_HIGH_SPEED BIT(2)
+#define AR9170_USB_DMA_CTL_UP_PACKET_MODE BIT(3)
+#define AR9170_USB_DMA_CTL_UP_STREAM_S 4
+#define AR9170_USB_DMA_CTL_UP_STREAM (BIT(4) | BIT(5))
+#define AR9170_USB_DMA_CTL_UP_STREAM_4K (0)
+#define AR9170_USB_DMA_CTL_UP_STREAM_8K BIT(4)
+#define AR9170_USB_DMA_CTL_UP_STREAM_16K BIT(5)
+#define AR9170_USB_DMA_CTL_UP_STREAM_32K (BIT(4) | BIT(5))
+#define AR9170_USB_DMA_CTL_DOWN_STREAM BIT(6)
+
+#define AR9170_USB_REG_DMA_STATUS (AR9170_USB_REG_BASE + 0x10c)
+#define AR9170_USB_DMA_STATUS_UP_IDLE BIT(8)
+#define AR9170_USB_DMA_STATUS_DN_IDLE BIT(16)
#define AR9170_USB_REG_MAX_AGG_UPLOAD (AR9170_USB_REG_BASE + 0x110)
#define AR9170_USB_REG_UPLOAD_TIME_CTL (AR9170_USB_REG_BASE + 0x114)