case MEM_DIRECT:
/* format: 0b0mmm mmmm mmmm */
off = mem->offset;
- if (off & ~0x7FF) { //FIXME 4096 words for v15 arch possible?
- asm_warn(ctx, "DIRECT memoffset 0x%X too long (> 11 bits)", off);
- off &= 0x7FF;
+ switch (ctx->arch) {
+ case 5:
+ if (off & ~0x7FF) {
+ asm_warn(ctx, "DIRECT memoffset 0x%X too long (> 11 bits)", off);
+ off &= 0x7FF;
+ }
+ break;
+ case 15:
+ if (off & ~0xFFF) {
+ asm_warn(ctx, "DIRECT memoffset 0x%X too long (> 12 bits)", off);
+ off &= 0xFFF;
+ }
+ break;
+ default:
+ asm_error(ctx, "Internal error: generate_mem_operand invalid arch");
}
val |= off;
break;
/* Assembler bug. The parser shouldn't pass this value. */
asm_error(ctx, "OFFR-nr too big");
}
- if (reg == 6) {
+ if (reg == 6 && ctx->arch == 5) {
asm_warn(ctx, "Using offset register 6. This register is broken "
- "on certain devices. Use off0 to off5 only.");
+ "on architecture 5 devices. Use off0 to off5 only.");
}
val |= off;
val |= (reg << 6);
^{WS}*\.text{WS}*$ { update_lineinfo(); return SECTION_TEXT; }
^{WS}*\.initvals/\({IDENTIFIER}\) { update_lineinfo(); return SECTION_IVALS; }
-spr[0-9a-fA-F]{3,3} { update_lineinfo(); return SPR; }
+spr[0-9a-fA-F]{1,4} { update_lineinfo(); return SPR; }
r/([0-9]|([1-5][0-9])|(6[0-3])) { update_lineinfo(); return GPR; }
off/[0-6] { update_lineinfo(); return OFFR; }
lr/[0-3] { update_lineinfo(); return LR; }
ret = xmalloc(12);
snprintf(ret, 12, "[0x%02X,off%u]",
- (operand & 0x3F), ((operand >> 6) & 0x7));
+ (operand & 0x3F), ((operand >> 6) & 0x7)); //FIXME r15?
return ret;
}