- if (usb_interrupt_level1 & BIT4)
- {
- usb_interrupt_level2 = USB_BYTE_REG_READ(ZM_INTR_SOURCE_4_OFFSET);
- if( usb_interrupt_level2 & BIT6)
- A_USB_REG_OUT();//vUsb_Reg_Out();
- }
-
- if (usb_interrupt_level1 & BIT6)
- {
- //zfGenWatchDogEvent();
- usb_interrupt_level2 = USB_BYTE_REG_READ(ZM_INTR_SOURCE_6_OFFSET);
- if( usb_interrupt_level2 & BIT6)
- A_USB_STATUS_IN();//vUsb_Status_In();
- }
-
- if (usb_interrupt_level1 & BIT0) //Group Byte 0
- {
- //usb_interrupt_level2 = ZM_INTR_SOURCE_0_REG;
- usb_interrupt_level2 = USB_BYTE_REG_READ(ZM_INTR_SOURCE_0_OFFSET);
-
- // refer to FUSB200, p 48, offset:21H, bit7 description, should clear the command abort interrupt first!?
- if (usb_interrupt_level2 & BIT7)
- {
- //ZM_INTR_SOURCE_0_REG &= 0x7f; // Handle command abort
- USB_BYTE_REG_WRITE(ZM_INTR_SOURCE_0_OFFSET, (USB_BYTE_REG_READ(ZM_INTR_SOURCE_0_OFFSET)& ~BIT7));
- A_PRINTF("![SOURCE_0] bit7 on\n\r");
- }
-
- if (usb_interrupt_level2 & BIT1)
- {
- //A_PRINTF("![USB] ep0 IN in \n\r");
- A_USB_EP0_TX(); // USB EP0 tx interrupt
- }
- if (usb_interrupt_level2 & BIT2)
- {
- //A_PRINTF("![USB] ep0 OUT in\n\r");
- A_USB_EP0_RX(); // USB EP0 rx interrupt
- }
- if (usb_interrupt_level2 & BIT0)
- {
- //A_PRINTF("![USB] ep0 SETUP in\n\r");
- A_USB_EP0_SETUP();
- //vWriteUSBFakeData();
- }
-// else if (usb_interrupt_level2 & BIT3)
- if (usb_interrupt_level2 & BIT3)
- {
- vUsb_ep0end();
-// A_PRINTF("![SOURCE_0] ep0 CMD_END\n\r");
- }
- if (usb_interrupt_level2 & BIT4)
- {
- vUsb_ep0fail();
-// A_PRINTF("![SOURCE_0] ep0 CMD_FAIL\n\r");
- }
- if (eUsbCxFinishAction == ACT_STALL)
- {
- // set CX_STL to stall Endpoint0 & will also clear FIFO0
- USB_BYTE_REG_WRITE(ZM_CX_CONFIG_STATUS_OFFSET, 0x04);
-// A_PRINTF("![USB] ZM_CX_CONFIG_STATUS_REG = 0x04\n\r");
- }
- else if (eUsbCxFinishAction == ACT_DONE)
- {
- // set CX_DONE to indicate the transmistion of control frame
- USB_BYTE_REG_WRITE(ZM_CX_CONFIG_STATUS_OFFSET, 0x01);
- }
- eUsbCxFinishAction = ACT_IDLE;
- }
-
- if (usb_interrupt_level1 & BIT7) //Group Byte 7
- {
- //usb_interrupt_level2 = ZM_INTR_SOURCE_7_REG;
- usb_interrupt_level2 = USB_BYTE_REG_READ(ZM_INTR_SOURCE_7_OFFSET);
+ if (usb_interrupt_level1 & BIT4) {
+ usb_interrupt_level2 =
+ USB_BYTE_REG_READ(ZM_INTR_SOURCE_4_OFFSET);
+
+ if(usb_interrupt_level2 & BIT6)
+ A_USB_REG_OUT(); /* vUsb_Reg_Out() */
+ }
+
+ if (usb_interrupt_level1 & BIT6) {
+ /* zfGenWatchDogEvent(); ?? */
+ usb_interrupt_level2 =
+ USB_BYTE_REG_READ(ZM_INTR_SOURCE_6_OFFSET);
+ if(usb_interrupt_level2 & BIT6)
+ A_USB_STATUS_IN(); /* vUsb_Status_In() */
+ }
+
+ if (usb_interrupt_level1 & BIT0) {
+ usb_interrupt_level2 =
+ USB_BYTE_REG_READ(ZM_INTR_SOURCE_0_OFFSET);
+
+ /* refer to FUSB200, p 48, offset:21H, bit7 description,
+ * should clear the command abort interrupt first!?
+ */
+ if (usb_interrupt_level2 & BIT7) {
+ /* Handle command abort */
+ USB_BYTE_REG_WRITE(ZM_INTR_SOURCE_0_OFFSET,
+ (USB_BYTE_REG_READ(ZM_INTR_SOURCE_0_OFFSET)
+ & ~BIT7));
+ A_PRINTF("![SOURCE_0] bit7 on\n\r");
+ }
+
+ if (usb_interrupt_level2 & BIT1)
+ A_USB_EP0_TX(); /* USB EP0 tx interrupt */
+
+ if (usb_interrupt_level2 & BIT2)
+ A_USB_EP0_RX(); /* USB EP0 rx interrupt */
+
+ if (usb_interrupt_level2 & BIT0) {
+ A_USB_EP0_SETUP();
+ /* vWriteUSBFakeData() */
+ }
+
+ if (usb_interrupt_level2 & BIT3)
+ vUsb_ep0end();
+
+ if (usb_interrupt_level2 & BIT4)
+ vUsb_ep0fail();
+
+ if (eUsbCxFinishAction == ACT_STALL) {
+ /* set CX_STL to stall Endpoint0 &
+ * will also clear FIFO0 */
+ USB_BYTE_REG_WRITE(ZM_CX_CONFIG_STATUS_OFFSET, 0x04);
+ } else if (eUsbCxFinishAction == ACT_DONE) {
+ /* set CX_DONE to indicate the transmistion
+ * of control frame */
+ USB_BYTE_REG_WRITE(ZM_CX_CONFIG_STATUS_OFFSET, 0x01);
+ }
+ eUsbCxFinishAction = ACT_IDLE;
+ }
+
+ if (usb_interrupt_level1 & BIT7) {
+ usb_interrupt_level2 =
+ USB_BYTE_REG_READ(ZM_INTR_SOURCE_7_OFFSET);