.release = CARL9170FW_VERSION_GIT),
FILL(dbg, DBG,
- .bogoclock_addr = cpu_to_le32(&fw.bogoclock),
+ .bogoclock_addr = cpu_to_le32(0),
.counter_addr = cpu_to_le32(&fw.counter),
.rx_total_addr = cpu_to_le32(&fw.wlan.rx_total),
.rx_overrun_addr = cpu_to_le32(&fw.wlan.rx_overruns),
orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer));
}
-static void clock_calibrate(void)
-{
- uint32_t t0, loop = 13;
-
- t0 = get_clock_counter();
-
- /*
- * TODO:
- * Write this code in assembler, so the reading is accurate
- * and can be used to correct the timer intervals.
- */
- while (((get_clock_counter() - t0) & (BIT(18)-1)) < 1000)
- loop += 9; /* really rough uOP estimation */
-
- fw.bogoclock = loop;
-}
-
void clock_set(const bool on, const enum cpu_clock_t _clock)
{
/*
*/
set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | _clock));
- clock_calibrate();
}
static void timer0_isr(void)