.ah_setRxDP = ar5416SetRxDP,
.ah_stopDmaReceive = ar5416StopDmaReceive,
.ah_enableReceive = ar5416EnableReceive,
- .ah_startPcuReceive = ar5416StartPcuReceive,
.ah_stopPcuReceive = ar5416StopPcuReceive,
/* Interrupt Functions */
.ah_isInterruptPending = ar5416IsInterruptPending,
.ah_getPendingInterrupts = ar5416GetPendingInterrupts,
- .ah_getInterrupts = ar5416GetInterrupts,
.ah_setInterrupts = ar5416SetInterrupts,
},
};
ah->ah_dev = dev;
ah->ah_sc = sc;
-
- /* If its a Owl 2.0 chip then change the hal structure to
- point to the Owl 2.0 ar5416_hal_20 structure */
- if(1) {
- ah->ah_set11nTxDesc = ar5416Set11nTxDesc_20;
- ah->ah_set11nRateScenario = ar5416Set11nRateScenario_20;
- ah->ah_set11nAggrFirst = ar5416Set11nAggrFirst_20;
- ah->ah_set11nAggrMiddle = ar5416Set11nAggrMiddle_20;
- ah->ah_set11nAggrLast = ar5416Set11nAggrLast_20;
- ah->ah_clr11nAggr = ar5416Clr11nAggr_20;
- ah->ah_set11nBurstDuration = ar5416Set11nBurstDuration_20;
- ah->ah_setupRxDesc = ar5416SetupRxDesc_20;
- ah->ah_procRxDescFast = ar5416ProcRxDescFast_20;
- ah->ah_updateCTSForBursting = NULL;
- ah->ah_setupTxDesc = ar5416SetupTxDesc_20;
- ah->ah_reqTxIntrDesc = ar5416IntrReqTxDesc_20;
- ah->ah_fillTxDesc = ar5416FillTxDesc_20;
- ah->ah_fillKeyTxDesc = ar5416FillKeyTxDesc_20;
- ah->ah_procTxDesc = ar5416ProcTxDesc_20;
- ah->ah_set11nVirtualMoreFrag = ar5416Set11nVirtualMoreFrag_20;
- }
+
+ ah->ah_set11nTxDesc = ar5416Set11nTxDesc_20;
+ ah->ah_set11nRateScenario = ar5416Set11nRateScenario_20;
+ ah->ah_set11nAggrFirst = ar5416Set11nAggrFirst_20;
+ ah->ah_set11nAggrMiddle = ar5416Set11nAggrMiddle_20;
+ ah->ah_set11nAggrLast = ar5416Set11nAggrLast_20;
+ ah->ah_clr11nAggr = ar5416Clr11nAggr_20;
+ ah->ah_set11nBurstDuration = ar5416Set11nBurstDuration_20;
+ ah->ah_setupRxDesc = ar5416SetupRxDesc_20;
+ ah->ah_procRxDescFast = ar5416ProcRxDescFast_20;
+ ah->ah_setupTxDesc = ar5416SetupTxDesc_20;
+ ah->ah_fillTxDesc = ar5416FillTxDesc_20;
+ ah->ah_fillKeyTxDesc = ar5416FillKeyTxDesc_20;
+ ah->ah_procTxDesc = ar5416ProcTxDesc_20;
+ ah->ah_set11nVirtualMoreFrag = ar5416Set11nVirtualMoreFrag_20;
return ah;
}
return AH_TRUE;
}
-HAL_INT ar5416GetInterrupts(struct ath_hal *ah)
-{
- return AH5416(ah)->ah_maskReg;
-}
-
HAL_INT
ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints)
{
HALASSERT(OS_REG_READ(ah, AR_RXDP) == rxdp);
}
-void ar5416SetMulticastFilter(struct ath_hal *ah, a_uint32_t filter0, a_uint32_t filter1)
-{
- OS_REG_WRITE(ah, AR_MCAST_FIL0, filter0);
- OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1);
-}
-
-HAL_BOOL ar5416ClrMulticastFilterIndex(struct ath_hal *ah, a_uint32_t ix)
-{
- a_uint32_t val;
-
- if (ix >= 64)
- return AH_FALSE;
- if (ix >= 32) {
- val = OS_REG_READ(ah, AR_MCAST_FIL1);
- OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
- } else {
- val = OS_REG_READ(ah, AR_MCAST_FIL0);
- OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));
- }
- return AH_TRUE;
-}
-
HAL_BOOL ar5416StopDmaReceive(struct ath_hal *ah)
{
OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */
}
}
-HAL_BOOL ar5416SetMulticastFilterIndex(struct ath_hal *ah, a_uint32_t ix)
-{
- a_uint32_t val;
-
- if (ix >= 64)
- return AH_FALSE;
- if (ix >= 32) {
- val = OS_REG_READ(ah, AR_MCAST_FIL1);
- OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
- } else {
- val = OS_REG_READ(ah, AR_MCAST_FIL0);
- OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));
- }
- return AH_TRUE;
-}
-
-void ar5416StartPcuReceive(struct ath_hal *ah)
-{
- OS_REG_CLR_BIT(ah, AR_DIAG_SW,
- (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
-}
-
void ar5416SetRxFilter(struct ath_hal *ah, a_uint32_t bits)
{
a_uint32_t phybits;
return (i != 0);
}
-void ar5416IntrReqTxDesc_20(struct ath_hal *ah, struct ath_desc *ds)
-{
- struct ar5416_desc *ads = AR5416DESC(ds);
- ads->ds_ctl0 |= AR_TxIntrReq;
-}
-
HAL_BOOL ar5416SetupTxDesc_20(struct ath_hal *ah, struct ath_tx_desc *ds,
a_uint32_t pktLen,
a_uint32_t hdrLen,