}
struct ath_hal *
-ar5416Attach(a_uint32_t devid,HAL_SOFTC sc, adf_os_device_t dev,
- a_uint32_t flags, HAL_STATUS *status)
+ar5416Attach(HAL_SOFTC sc, adf_os_device_t dev, HAL_STATUS *status)
{
struct ath_hal_5416 *ahp;
struct ath_hal *ah;
HALASSERT(OS_REG_READ(ah, AR_RXDP) == rxdp);
}
-void ar5416SetMulticastFilter(struct ath_hal *ah, a_uint32_t filter0, a_uint32_t filter1)
-{
- OS_REG_WRITE(ah, AR_MCAST_FIL0, filter0);
- OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1);
-}
-
HAL_BOOL ar5416StopDmaReceive(struct ath_hal *ah)
{
OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */
}
}
-HAL_BOOL ar5416SetMulticastFilterIndex(struct ath_hal *ah, a_uint32_t ix)
-{
- a_uint32_t val;
-
- if (ix >= 64)
- return AH_FALSE;
- if (ix >= 32) {
- val = OS_REG_READ(ah, AR_MCAST_FIL1);
- OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
- } else {
- val = OS_REG_READ(ah, AR_MCAST_FIL0);
- OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));
- }
- return AH_TRUE;
-}
-
void ar5416SetRxFilter(struct ath_hal *ah, a_uint32_t bits)
{
a_uint32_t phybits;
OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
}
-HAL_BOOL ar5416SetupRxDesc_20(struct ath_hal *ah, struct ath_rx_desc *ds,
+HAL_BOOL ar5416SetupRxDesc_20(struct ath_rx_desc *ds,
a_uint32_t size, a_uint32_t flags)
{
struct ar5416_desc *ads = AR5416DESC(ds);