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Merge branch 'clean' into clean_2
[open-ath9k-htc-firmware.git]
/
target_firmware
/
wlan
/
if_ath.c
diff --git
a/target_firmware/wlan/if_ath.c
b/target_firmware/wlan/if_ath.c
index f526e4623f4238d9d693e65d1052c9ed64814442..fcbe9c3cd3631a3800ecf9f24a623fc528f43567 100755
(executable)
--- a/
target_firmware/wlan/if_ath.c
+++ b/
target_firmware/wlan/if_ath.c
@@
-80,27
+80,17
@@
void owl_tgt_node_init(struct ath_node_target * an);
void ath_tgt_tx_sched_normal(struct ath_softc_tgt *sc, struct ath_buf *bf);
void ath_tgt_tx_sched_nonaggr(struct ath_softc_tgt *sc,struct ath_buf * bf_host);
void ath_tgt_tx_sched_normal(struct ath_softc_tgt *sc, struct ath_buf *bf);
void ath_tgt_tx_sched_nonaggr(struct ath_softc_tgt *sc,struct ath_buf * bf_host);
-/*************/
-/* Utilities */
-/*************/
-
-#undef adf_os_cpu_to_le16
-
-static a_uint16_t adf_os_cpu_to_le16(a_uint16_t x)
-{
- return ((((x) & 0xff00) >> 8) | (((x) & 0x00ff) << 8));
-}
-
/*
* Extend a 32 bit TSF to 64 bit, taking wrapping into account.
*/
static u_int64_t ath_extend_tsf(struct ath_softc_tgt *sc, u_int32_t rstamp)
{
/*
* Extend a 32 bit TSF to 64 bit, taking wrapping into account.
*/
static u_int64_t ath_extend_tsf(struct ath_softc_tgt *sc, u_int32_t rstamp)
{
+ struct ath_hal *ah = sc->sc_ah;
u_int64_t tsf;
u_int32_t tsf_low;
u_int64_t tsf64;
u_int64_t tsf;
u_int32_t tsf_low;
u_int64_t tsf64;
- tsf = a
th_hal_gettsf64(sc->sc_
ah);
+ tsf = a
h->ah_getTsf64(
ah);
tsf_low = tsf & 0xffffffff;
tsf64 = (tsf & ~0xffffffffULL) | rstamp;
tsf_low = tsf & 0xffffffff;
tsf64 = (tsf & ~0xffffffffULL) | rstamp;
@@
-265,18
+255,16
@@
static a_int32_t ath_rxdesc_init(struct ath_softc_tgt *sc, struct ath_rx_desc *d
ds->ds_link = 0;
adf_nbuf_peek_header(ds->ds_nbuf, &anbdata, &anblen);
ds->ds_link = 0;
adf_nbuf_peek_header(ds->ds_nbuf, &anbdata, &anblen);
- ath_hal_setuprxdesc(ah, ds,
- adf_nbuf_tailroom(ds->ds_nbuf),
- 0);
+ ah->ah_setupRxDesc(ds, adf_nbuf_tailroom(ds->ds_nbuf), 0);
if (sc->sc_rxlink == NULL) {
if (sc->sc_rxlink == NULL) {
- a
th_hal_putrxbuf
(ah, ds->ds_daddr);
+ a
h->ah_setRxDP
(ah, ds->ds_daddr);
}
else {
*sc->sc_rxlink = ds->ds_daddr;
}
sc->sc_rxlink = &ds->ds_link;
}
else {
*sc->sc_rxlink = ds->ds_daddr;
}
sc->sc_rxlink = &ds->ds_link;
- a
th_hal_rxena
(ah);
+ a
h->ah_enableReceive
(ah);
return 0;
}
return 0;
}
@@
-334,7
+322,7
@@
static void ath_uapsd_processtriggers(struct ath_softc_tgt *sc)
((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
- tsf = a
th_hal_gett
sf64(ah);
+ tsf = a
h->ah_getT
sf64(ah);
bf = asf_tailq_first(&sc->sc_rxbuf);
ds = asf_tailq_first(&sc->sc_rxdesc);
bf = asf_tailq_first(&sc->sc_rxbuf);
ds = asf_tailq_first(&sc->sc_rxdesc);
@@
-385,7
+373,7
@@
static void ath_uapsd_processtriggers(struct ath_softc_tgt *sc)
continue;
}
continue;
}
- retval = a
th_hal_rxprocdescf
ast(ah, ds, ds->ds_daddr,
+ retval = a
h->ah_procRxDescF
ast(ah, ds, ds->ds_daddr,
PA2DESC(sc, ds->ds_link), &bf->bf_rx_status);
if (HAL_EINPROGRESS == retval) {
break;
PA2DESC(sc, ds->ds_link), &bf->bf_rx_status);
if (HAL_EINPROGRESS == retval) {
break;
@@
-471,7
+459,7
@@
static a_int32_t ath_startrecv(struct ath_softc_tgt *sc)
}
ds = asf_tailq_first(&sc->sc_rxdesc);
}
ds = asf_tailq_first(&sc->sc_rxdesc);
- a
th_hal_putrxbuf
(ah, ds->ds_daddr);
+ a
h->ah_setRxDP
(ah, ds->ds_daddr);
return 0;
}
return 0;
}
@@
-521,7
+509,7
@@
static void ath_tgt_rx_tasklet(TQUEUE_ARG data)
} while(1);
sc->sc_imask |= HAL_INT_RX;
} while(1);
sc->sc_imask |= HAL_INT_RX;
- a
th_hal_intrset
(ah, sc->sc_imask);
+ a
h->ah_setInterrupts
(ah, sc->sc_imask);
}
/*******************/
}
/*******************/
@@
-554,22
+542,18
@@
static void ath_beacon_setup(struct ath_softc_tgt *sc,
rt = sc->sc_currates;
rate = rt->info[rix].rateCode;
rt = sc->sc_currates;
rate = rt->info[rix].rateCode;
- a
th_hal_setuptxdesc(ah,
ds
+ a
h->ah_setupTxDesc(
ds
, adf_nbuf_len(skb) + IEEE80211_CRC_LEN
, sizeof(struct ieee80211_frame)
, HAL_PKT_TYPE_BEACON
, MAX_RATE_POWER
, rate, 1
, HAL_TXKEYIX_INVALID
, adf_nbuf_len(skb) + IEEE80211_CRC_LEN
, sizeof(struct ieee80211_frame)
, HAL_PKT_TYPE_BEACON
, MAX_RATE_POWER
, rate, 1
, HAL_TXKEYIX_INVALID
- , 0
, flags
, 0
, flags
, 0
- , 0
- , 0
- , 0
- , ATH_COMP_PROC_NO_COMP_NO_CCS);
+ , 0);
- a
th_hal_filltxdesc(ah,
ds
+ a
h->ah_fillTxDesc(
ds
, asf_roundup(adf_nbuf_len(skb), 4)
, AH_TRUE
, AH_TRUE
, asf_roundup(adf_nbuf_len(skb), 4)
, AH_TRUE
, AH_TRUE
@@
-579,7
+563,7
@@
static void ath_beacon_setup(struct ath_softc_tgt *sc,
series[0].Rate = rate;
series[0].ChSel = sc->sc_ic.ic_tx_chainmask;
series[0].RateFlags = 0;
series[0].Rate = rate;
series[0].ChSel = sc->sc_ic.ic_tx_chainmask;
series[0].RateFlags = 0;
- a
th_hal_set11n_ratescenario(ah, ds, 0
, 0, 0, series, 4, 0);
+ a
h->ah_set11nRateScenario(ds
, 0, 0, series, 4, 0);
}
static void ath_tgt_send_beacon(struct ath_softc_tgt *sc, adf_nbuf_t bc_hdr,
}
static void ath_tgt_send_beacon(struct ath_softc_tgt *sc, adf_nbuf_t bc_hdr,
@@
-784,7
+768,7
@@
static void tgt_HTCRecv_cabhandler(HTC_ENDPOINT_ID EndPt, adf_nbuf_t hdr_buf,
a_uint32_t tmp;
#ifdef ATH_ENABLE_CABQ
a_uint32_t tmp;
#ifdef ATH_ENABLE_CABQ
- tsf = a
th_hal_gett
sf64(ah);
+ tsf = a
h->ah_getT
sf64(ah);
tmp = tsf - sc->sc_swba_tsf;
if ( tmp > ATH_CABQ_HANDLING_THRESHOLD ) {
tmp = tsf - sc->sc_swba_tsf;
if ( tmp > ATH_CABQ_HANDLING_THRESHOLD ) {
@@
-1020,24
+1004,24
@@
adf_os_irq_resp_t ath_intr(adf_drv_handle_t hdl)
if (sc->sc_invalid)
return ADF_OS_IRQ_NONE;
if (sc->sc_invalid)
return ADF_OS_IRQ_NONE;
- if (!a
th_hal_intrpend
(ah))
+ if (!a
h->ah_isInterruptPending
(ah))
return ADF_OS_IRQ_NONE;
return ADF_OS_IRQ_NONE;
- a
th_hal_getisr
(ah, &status);
+ a
h->ah_getPendingInterrupts
(ah, &status);
status &= sc->sc_imask;
if (status & HAL_INT_FATAL) {
status &= sc->sc_imask;
if (status & HAL_INT_FATAL) {
- a
th_hal_intrset
(ah, 0);
+ a
h->ah_setInterrupts
(ah, 0);
ATH_SCHEDULE_TQUEUE(sc->sc_dev, &sc->sc_fataltq);
} else {
if (status & HAL_INT_SWBA) {
WMI_SWBA_EVENT swbaEvt;
struct ath_txq *txq = ATH_TXQ(sc, 8);
ATH_SCHEDULE_TQUEUE(sc->sc_dev, &sc->sc_fataltq);
} else {
if (status & HAL_INT_SWBA) {
WMI_SWBA_EVENT swbaEvt;
struct ath_txq *txq = ATH_TXQ(sc, 8);
- swbaEvt.tsf = a
th_hal_gett
sf64(ah);
+ swbaEvt.tsf = a
h->ah_getT
sf64(ah);
swbaEvt.beaconPendingCount = ah->ah_numTxPending(ah, sc->sc_bhalq);
swbaEvt.beaconPendingCount = ah->ah_numTxPending(ah, sc->sc_bhalq);
- sc->sc_swba_tsf = a
th_hal_gett
sf64(ah);
+ sc->sc_swba_tsf = a
h->ah_getT
sf64(ah);
wmi_event(sc->tgt_wmi_handle,
WMI_SWBA_EVENTID,
wmi_event(sc->tgt_wmi_handle,
WMI_SWBA_EVENTID,
@@
-1060,7
+1044,7
@@
adf_os_irq_resp_t ath_intr(adf_drv_handle_t hdl)
ath_uapsd_processtriggers(sc);
sc->sc_imask &= ~HAL_INT_RX;
ath_uapsd_processtriggers(sc);
sc->sc_imask &= ~HAL_INT_RX;
- a
th_hal_intrset
(ah, sc->sc_imask);
+ a
h->ah_setInterrupts
(ah, sc->sc_imask);
ATH_SCHEDULE_TQUEUE(sc->sc_dev, &sc->sc_rxtq);
}
ATH_SCHEDULE_TQUEUE(sc->sc_dev, &sc->sc_rxtq);
}
@@
-1126,7
+1110,7
@@
static void ath_enable_intr_tgt(void *Context, A_UINT16 Command,
sc->sc_imask |= HAL_INT_BMISS;
}
sc->sc_imask |= HAL_INT_BMISS;
}
- a
th_hal_intrset
(ah, sc->sc_imask);
+ a
h->ah_setInterrupts
(ah, sc->sc_imask);
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo,NULL, 0);
}
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo,NULL, 0);
}
@@
-1142,11
+1126,11
@@
static void ath_init_tgt(void *Context, A_UINT16 Command,
sc->sc_imask |= HAL_INT_GTT;
sc->sc_imask |= HAL_INT_GTT;
- if (ath_hal_
htsupported(ah
))
+ if (ath_hal_
getcapability(ah, HAL_CAP_HT
))
sc->sc_imask |= HAL_INT_CST;
adf_os_setup_intr(sc->sc_dev, ath_intr);
sc->sc_imask |= HAL_INT_CST;
adf_os_setup_intr(sc->sc_dev, ath_intr);
- a
th_hal_intrset
(ah, sc->sc_imask);
+ a
h->ah_setInterrupts
(ah, sc->sc_imask);
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
}
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
}
@@
-1515,7
+1499,7
@@
static void ath_disable_intr_tgt(void *Context, A_UINT16 Command,
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
struct ath_hal *ah = sc->sc_ah;
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
struct ath_hal *ah = sc->sc_ah;
- a
th_hal_intrset
(ah, 0);
+ a
h->ah_setInterrupts
(ah, 0);
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo,NULL, 0);
}
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo,NULL, 0);
}
@@
-1564,8
+1548,9
@@
static void ath_aborttx_dma_tgt(void *Context, A_UINT16 Command,
A_UINT16 SeqNo, A_UINT8 *data, a_int32_t datalen)
{
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
A_UINT16 SeqNo, A_UINT8 *data, a_int32_t datalen)
{
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
+ struct ath_hal *ah = sc->sc_ah;
- a
th_hal_aborttxd
ma(sc->sc_ah);
+ a
h->ah_abortTxD
ma(sc->sc_ah);
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
}
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
}
@@
-1615,9
+1600,9
@@
static void ath_stoprecv_tgt(void *Context, A_UINT16 Command,
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
struct ath_hal *ah = sc->sc_ah;
struct ath_softc_tgt *sc = (struct ath_softc_tgt *)Context;
struct ath_hal *ah = sc->sc_ah;
- a
th_hal_stoppcurecv
(ah);
- a
th_hal_setrxf
ilter(ah, 0);
- a
th_hal_stopdmarecv
(ah);
+ a
h->ah_stopPcuReceive
(ah);
+ a
h->ah_setRxF
ilter(ah, 0);
+ a
h->ah_stopDmaReceive
(ah);
sc->sc_rxlink = NULL;
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
sc->sc_rxlink = NULL;
wmi_cmd_rsp(sc->tgt_wmi_handle, Command, SeqNo, NULL, 0);
@@
-1929,7
+1914,7
@@
a_int32_t ath_tgt_attach(a_uint32_t devid, struct ath_softc_tgt *sc, adf_os_devi
ath_tgt_txq_setup(sc);
sc->sc_imask =0;
ath_tgt_txq_setup(sc);
sc->sc_imask =0;
- a
th_hal_intrset(ah,
0);
+ a
h->ah_setInterrupts(ah,
0);
return 0;
bad:
return 0;
bad: