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carl9170 firmware: 5/10 MHz Channel Support for carl9170
[carl9170fw.git]
/
carlfw
/
src
/
timer.c
diff --git
a/carlfw/src/timer.c
b/carlfw/src/timer.c
index 95058183cbd97245fa9b2ac793b81b578b861d62..79fcc31ab2f45c795094ca85dd5f1bb81040a257 100644
(file)
--- a/
carlfw/src/timer.c
+++ b/
carlfw/src/timer.c
@@
-41,7
+41,7
@@
void timer_init(const unsigned int timer, const unsigned int interval)
orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer));
}
orl(AR9170_TIMER_REG_INTERRUPT, BIT(timer));
}
-void clock_set(
enum cpu_clock_t clock_, bool on
)
+void clock_set(
const enum cpu_clock_t clock_, const bool on, const unsigned int div
)
{
/*
* Word of Warning!
{
/*
* Word of Warning!
@@
-60,7
+60,8
@@
void clock_set(enum cpu_clock_t clock_, bool on)
fw.ticks_per_usec = GET_VAL(AR9170_PWR_PLL_ADDAC_DIV,
get(AR9170_PWR_REG_PLL_ADDAC));
fw.ticks_per_usec = GET_VAL(AR9170_PWR_PLL_ADDAC_DIV,
get(AR9170_PWR_REG_PLL_ADDAC));
- set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | clock_));
+ set(AR9170_PWR_REG_CLOCK_SEL, (uint32_t) ((on ? 0x70 : 0x600) | clock_ |
+ SET_CONSTVAL(AR9170_PWR_CLK_ADDAC_CLK160, div))));
switch (clock_) {
case AHB_20_22MHZ:
switch (clock_) {
case AHB_20_22MHZ: