1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_TEXT_PATCHING_H
3 #define _ASM_X86_TEXT_PATCHING_H
5 #include <linux/types.h>
6 #include <linux/stddef.h>
7 #include <asm/ptrace.h>
9 struct paravirt_patch_site;
10 #ifdef CONFIG_PARAVIRT
11 void apply_paravirt(struct paravirt_patch_site *start,
12 struct paravirt_patch_site *end);
14 static inline void apply_paravirt(struct paravirt_patch_site *start,
15 struct paravirt_patch_site *end)
17 #define __parainstructions NULL
18 #define __parainstructions_end NULL
22 * Currently, the max observed size in the kernel code is
23 * JUMP_LABEL_NOP_SIZE/RELATIVEJUMP_SIZE, which are 5.
26 #define POKE_MAX_OPCODE_SIZE 5
28 extern void text_poke_early(void *addr, const void *opcode, size_t len);
31 * Clear and restore the kernel write-protection flag on the local CPU.
32 * Allows the kernel to edit read-only pages.
33 * Side-effect: any interrupt handler running between save and restore will have
34 * the ability to write to read-only pages.
37 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
38 * no thread can be preempted in the instructions being modified (no iret to an
39 * invalid instruction possible) or if the instructions are changed from a
40 * consistent state to another consistent state atomically.
41 * On the local CPU you need to be protected against NMI or MCE handlers seeing
42 * an inconsistent instruction while you patch.
44 extern void *text_poke(void *addr, const void *opcode, size_t len);
45 extern void text_poke_sync(void);
46 extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
47 extern void *text_poke_copy(void *addr, const void *opcode, size_t len);
48 extern void *text_poke_set(void *addr, int c, size_t len);
49 extern int poke_int3_handler(struct pt_regs *regs);
50 extern void text_poke_bp(void *addr, const void *opcode, size_t len, const void *emulate);
52 extern void text_poke_queue(void *addr, const void *opcode, size_t len, const void *emulate);
53 extern void text_poke_finish(void);
55 #define INT3_INSN_SIZE 1
56 #define INT3_INSN_OPCODE 0xCC
58 #define RET_INSN_SIZE 1
59 #define RET_INSN_OPCODE 0xC3
61 #define CALL_INSN_SIZE 5
62 #define CALL_INSN_OPCODE 0xE8
64 #define JMP32_INSN_SIZE 5
65 #define JMP32_INSN_OPCODE 0xE9
67 #define JMP8_INSN_SIZE 2
68 #define JMP8_INSN_OPCODE 0xEB
72 static __always_inline int text_opcode_size(u8 opcode)
76 #define __CASE(insn) \
77 case insn##_INSN_OPCODE: size = insn##_INSN_SIZE; break
92 union text_poke_insn {
93 u8 text[POKE_MAX_OPCODE_SIZE];
97 } __attribute__((packed));
100 static __always_inline
101 void __text_gen_insn(void *buf, u8 opcode, const void *addr, const void *dest, int size)
103 union text_poke_insn *insn = buf;
105 BUG_ON(size < text_opcode_size(opcode));
108 * Hide the addresses to avoid the compiler folding in constants when
109 * referencing code, these can mess up annotations like
112 OPTIMIZER_HIDE_VAR(insn);
113 OPTIMIZER_HIDE_VAR(addr);
114 OPTIMIZER_HIDE_VAR(dest);
116 insn->opcode = opcode;
119 insn->disp = (long)dest - (long)(addr + size);
122 * Ensure that for JMP8 the displacement
123 * actually fits the signed byte.
125 BUG_ON((insn->disp >> 31) != (insn->disp >> 7));
130 static __always_inline
131 void *text_gen_insn(u8 opcode, const void *addr, const void *dest)
133 static union text_poke_insn insn; /* per instance */
134 __text_gen_insn(&insn, opcode, addr, dest, text_opcode_size(opcode));
138 extern int after_bootmem;
139 extern __ro_after_init struct mm_struct *poking_mm;
140 extern __ro_after_init unsigned long poking_addr;
142 #ifndef CONFIG_UML_X86
143 static __always_inline
144 void int3_emulate_jmp(struct pt_regs *regs, unsigned long ip)
149 static __always_inline
150 void int3_emulate_push(struct pt_regs *regs, unsigned long val)
153 * The int3 handler in entry_64.S adds a gap between the
154 * stack where the break point happened, and the saving of
155 * pt_regs. We can extend the original stack because of
156 * this gap. See the idtentry macro's create_gap option.
158 * Similarly entry_32.S will have a gap on the stack for (any) hardware
159 * exception and pt_regs; see FIXUP_FRAME.
161 regs->sp -= sizeof(unsigned long);
162 *(unsigned long *)regs->sp = val;
165 static __always_inline
166 unsigned long int3_emulate_pop(struct pt_regs *regs)
168 unsigned long val = *(unsigned long *)regs->sp;
169 regs->sp += sizeof(unsigned long);
173 static __always_inline
174 void int3_emulate_call(struct pt_regs *regs, unsigned long func)
176 int3_emulate_push(regs, regs->ip - INT3_INSN_SIZE + CALL_INSN_SIZE);
177 int3_emulate_jmp(regs, func);
180 static __always_inline
181 void int3_emulate_ret(struct pt_regs *regs)
183 unsigned long ip = int3_emulate_pop(regs);
184 int3_emulate_jmp(regs, ip);
187 static __always_inline
188 void int3_emulate_jcc(struct pt_regs *regs, u8 cc, unsigned long ip, unsigned long disp)
190 static const unsigned long jcc_mask[6] = {
194 [3] = X86_EFLAGS_CF | X86_EFLAGS_ZF,
199 bool invert = cc & 1;
203 match = regs->flags & jcc_mask[cc >> 1];
205 match = ((regs->flags & X86_EFLAGS_SF) >> X86_EFLAGS_SF_BIT) ^
206 ((regs->flags & X86_EFLAGS_OF) >> X86_EFLAGS_OF_BIT);
208 match = match || (regs->flags & X86_EFLAGS_ZF);
211 if ((match && !invert) || (!match && invert))
214 int3_emulate_jmp(regs, ip);
217 #endif /* !CONFIG_UML_X86 */
219 #endif /* _ASM_X86_TEXT_PATCHING_H */