1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PGTABLE_DEFS_H
3 #define _ASM_X86_PGTABLE_DEFS_H
5 #include <linux/const.h>
6 #include <linux/mem_encrypt.h>
8 #include <asm/page_types.h>
10 #define _PAGE_BIT_PRESENT 0 /* is present */
11 #define _PAGE_BIT_RW 1 /* writeable */
12 #define _PAGE_BIT_USER 2 /* userspace addressable */
13 #define _PAGE_BIT_PWT 3 /* page write through */
14 #define _PAGE_BIT_PCD 4 /* page cache disabled */
15 #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
16 #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
17 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
18 #define _PAGE_BIT_PAT 7 /* on 4KB pages */
19 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
20 #define _PAGE_BIT_SOFTW1 9 /* available for programmer */
21 #define _PAGE_BIT_SOFTW2 10 /* " */
22 #define _PAGE_BIT_SOFTW3 11 /* " */
23 #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
24 #define _PAGE_BIT_SOFTW4 58 /* available for programmer */
25 #define _PAGE_BIT_PKEY_BIT0 59 /* Protection Keys, bit 1/4 */
26 #define _PAGE_BIT_PKEY_BIT1 60 /* Protection Keys, bit 2/4 */
27 #define _PAGE_BIT_PKEY_BIT2 61 /* Protection Keys, bit 3/4 */
28 #define _PAGE_BIT_PKEY_BIT3 62 /* Protection Keys, bit 4/4 */
29 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
31 #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
32 #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
33 #define _PAGE_BIT_UFFD_WP _PAGE_BIT_SOFTW2 /* userfaultfd wrprotected */
34 #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */
35 #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4
37 /* If _PAGE_BIT_PRESENT is clear, we use these: */
38 /* - if the user mapped it with PROT_NONE; pte_present gives true */
39 #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
41 #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
42 #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
43 #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
44 #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
45 #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
46 #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
47 #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
48 #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
49 #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
50 #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
51 #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
52 #define _PAGE_SOFTW3 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW3)
53 #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
54 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
55 #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
56 #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
57 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
58 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT0)
59 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT1)
60 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT2)
61 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT3)
63 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 0))
64 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 0))
65 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0))
66 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0))
69 #define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \
74 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
75 #define _PAGE_KNL_ERRATUM_MASK (_PAGE_DIRTY | _PAGE_ACCESSED)
77 #define _PAGE_KNL_ERRATUM_MASK 0
80 #ifdef CONFIG_MEM_SOFT_DIRTY
81 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
83 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))
87 * Tracking soft dirty bit when a page goes to a swap is tricky.
88 * We need a bit which can be stored in pte _and_ not conflict
89 * with swap entry format. On x86 bits 1-4 are *not* involved
90 * into swap entry computation, but bit 7 is used for thp migration,
91 * so we borrow bit 1 for soft dirty tracking.
93 * Please note that this bit must be treated as swap dirty page
94 * mark if and only if the PTE/PMD has present bit clear!
96 #ifdef CONFIG_MEM_SOFT_DIRTY
97 #define _PAGE_SWP_SOFT_DIRTY _PAGE_RW
99 #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))
102 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
103 #define _PAGE_UFFD_WP (_AT(pteval_t, 1) << _PAGE_BIT_UFFD_WP)
104 #define _PAGE_SWP_UFFD_WP _PAGE_USER
106 #define _PAGE_UFFD_WP (_AT(pteval_t, 0))
107 #define _PAGE_SWP_UFFD_WP (_AT(pteval_t, 0))
110 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
111 #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
112 #define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP)
113 #define _PAGE_SOFTW4 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW4)
115 #define _PAGE_NX (_AT(pteval_t, 0))
116 #define _PAGE_DEVMAP (_AT(pteval_t, 0))
117 #define _PAGE_SOFTW4 (_AT(pteval_t, 0))
120 #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
123 * Set of bits not changed in pte_modify. The pte's
124 * protection key is treated like _PAGE_RW, for
125 * instance, and is *not* included in this mask since
126 * pte_modify() does modify it.
128 #define _COMMON_PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
129 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY |\
130 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_CC | \
132 #define _PAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PAT)
133 #define _HPAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PSE | _PAGE_PAT_LARGE)
136 * The cache modes defined here are used to translate between pure SW usage
137 * and the HW defined cache mode bits and/or PAT entries.
139 * The resulting bits for PWT, PCD and PAT should be chosen in a way
140 * to have the WB mode at index 0 (all bits clear). This is the default
141 * right now and likely would break too much if changed.
144 enum page_cache_mode {
145 _PAGE_CACHE_MODE_WB = 0,
146 _PAGE_CACHE_MODE_WC = 1,
147 _PAGE_CACHE_MODE_UC_MINUS = 2,
148 _PAGE_CACHE_MODE_UC = 3,
149 _PAGE_CACHE_MODE_WT = 4,
150 _PAGE_CACHE_MODE_WP = 5,
152 _PAGE_CACHE_MODE_NUM = 8
156 #define _PAGE_CC (_AT(pteval_t, cc_mask))
157 #define _PAGE_ENC (_AT(pteval_t, sme_me_mask))
159 #define _PAGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)
160 #define _PAGE_LARGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT_LARGE)
162 #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
163 #define _PAGE_CACHE_WP (cachemode2protval(_PAGE_CACHE_MODE_WP))
165 #define __PP _PAGE_PRESENT
166 #define __RW _PAGE_RW
167 #define _USR _PAGE_USER
168 #define ___A _PAGE_ACCESSED
169 #define ___D _PAGE_DIRTY
170 #define ___G _PAGE_GLOBAL
171 #define __NX _PAGE_NX
173 #define _ENC _PAGE_ENC
174 #define __WP _PAGE_CACHE_WP
175 #define __NC _PAGE_NOCACHE
176 #define _PSE _PAGE_PSE
178 #define pgprot_val(x) ((x).pgprot)
179 #define __pgprot(x) ((pgprot_t) { (x) } )
180 #define __pg(x) __pgprot(x)
182 #define PAGE_NONE __pg( 0| 0| 0|___A| 0| 0| 0|___G)
183 #define PAGE_SHARED __pg(__PP|__RW|_USR|___A|__NX| 0| 0| 0)
184 #define PAGE_SHARED_EXEC __pg(__PP|__RW|_USR|___A| 0| 0| 0| 0)
185 #define PAGE_COPY_NOEXEC __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
186 #define PAGE_COPY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0)
187 #define PAGE_COPY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
188 #define PAGE_READONLY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0)
189 #define PAGE_READONLY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0)
191 #define __PAGE_KERNEL (__PP|__RW| 0|___A|__NX|___D| 0|___G)
192 #define __PAGE_KERNEL_EXEC (__PP|__RW| 0|___A| 0|___D| 0|___G)
193 #define _KERNPG_TABLE_NOENC (__PP|__RW| 0|___A| 0|___D| 0| 0)
194 #define _KERNPG_TABLE (__PP|__RW| 0|___A| 0|___D| 0| 0| _ENC)
195 #define _PAGE_TABLE_NOENC (__PP|__RW|_USR|___A| 0|___D| 0| 0)
196 #define _PAGE_TABLE (__PP|__RW|_USR|___A| 0|___D| 0| 0| _ENC)
197 #define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G)
198 #define __PAGE_KERNEL_ROX (__PP| 0| 0|___A| 0|___D| 0|___G)
199 #define __PAGE_KERNEL_NOCACHE (__PP|__RW| 0|___A|__NX|___D| 0|___G| __NC)
200 #define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G)
201 #define __PAGE_KERNEL_LARGE (__PP|__RW| 0|___A|__NX|___D|_PSE|___G)
202 #define __PAGE_KERNEL_LARGE_EXEC (__PP|__RW| 0|___A| 0|___D|_PSE|___G)
203 #define __PAGE_KERNEL_WP (__PP|__RW| 0|___A|__NX|___D| 0|___G| __WP)
206 #define __PAGE_KERNEL_IO __PAGE_KERNEL
207 #define __PAGE_KERNEL_IO_NOCACHE __PAGE_KERNEL_NOCACHE
212 #define __PAGE_KERNEL_ENC (__PAGE_KERNEL | _ENC)
213 #define __PAGE_KERNEL_ENC_WP (__PAGE_KERNEL_WP | _ENC)
214 #define __PAGE_KERNEL_NOENC (__PAGE_KERNEL | 0)
215 #define __PAGE_KERNEL_NOENC_WP (__PAGE_KERNEL_WP | 0)
217 #define __pgprot_mask(x) __pgprot((x) & __default_kernel_pte_mask)
219 #define PAGE_KERNEL __pgprot_mask(__PAGE_KERNEL | _ENC)
220 #define PAGE_KERNEL_NOENC __pgprot_mask(__PAGE_KERNEL | 0)
221 #define PAGE_KERNEL_RO __pgprot_mask(__PAGE_KERNEL_RO | _ENC)
222 #define PAGE_KERNEL_EXEC __pgprot_mask(__PAGE_KERNEL_EXEC | _ENC)
223 #define PAGE_KERNEL_EXEC_NOENC __pgprot_mask(__PAGE_KERNEL_EXEC | 0)
224 #define PAGE_KERNEL_ROX __pgprot_mask(__PAGE_KERNEL_ROX | _ENC)
225 #define PAGE_KERNEL_NOCACHE __pgprot_mask(__PAGE_KERNEL_NOCACHE | _ENC)
226 #define PAGE_KERNEL_LARGE __pgprot_mask(__PAGE_KERNEL_LARGE | _ENC)
227 #define PAGE_KERNEL_LARGE_EXEC __pgprot_mask(__PAGE_KERNEL_LARGE_EXEC | _ENC)
228 #define PAGE_KERNEL_VVAR __pgprot_mask(__PAGE_KERNEL_VVAR | _ENC)
230 #define PAGE_KERNEL_IO __pgprot_mask(__PAGE_KERNEL_IO)
231 #define PAGE_KERNEL_IO_NOCACHE __pgprot_mask(__PAGE_KERNEL_IO_NOCACHE)
233 #endif /* __ASSEMBLY__ */
236 * early identity mapping pte attrib macros.
239 #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
241 #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
242 #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */
243 #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
247 # include <asm/pgtable_32_types.h>
249 # include <asm/pgtable_64_types.h>
254 #include <linux/types.h>
256 /* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */
257 #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
260 * Extracts the flags from a (pte|pmd|pud|pgd)val_t
261 * This includes the protection key value.
263 #define PTE_FLAGS_MASK (~PTE_PFN_MASK)
265 typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
267 typedef struct { pgdval_t pgd; } pgd_t;
269 static inline pgprot_t pgprot_nx(pgprot_t prot)
271 return __pgprot(pgprot_val(prot) | _PAGE_NX);
273 #define pgprot_nx pgprot_nx
275 #ifdef CONFIG_X86_PAE
278 * PHYSICAL_PAGE_MASK might be non-constant when SME is compiled in, so we can't
282 #define PGD_PAE_PAGE_MASK ((signed long)PAGE_MASK)
283 #define PGD_PAE_PHYS_MASK (((1ULL << __PHYSICAL_MASK_SHIFT)-1) & PGD_PAE_PAGE_MASK)
286 * PAE allows Base Address, P, PWT, PCD and AVL bits to be set in PGD entries.
287 * All other bits are Reserved MBZ
289 #define PGD_ALLOWED_BITS (PGD_PAE_PHYS_MASK | _PAGE_PRESENT | \
290 _PAGE_PWT | _PAGE_PCD | \
291 _PAGE_SOFTW1 | _PAGE_SOFTW2 | _PAGE_SOFTW3)
294 /* No need to mask any bits for !PAE */
295 #define PGD_ALLOWED_BITS (~0ULL)
298 static inline pgd_t native_make_pgd(pgdval_t val)
300 return (pgd_t) { val & PGD_ALLOWED_BITS };
303 static inline pgdval_t native_pgd_val(pgd_t pgd)
305 return pgd.pgd & PGD_ALLOWED_BITS;
308 static inline pgdval_t pgd_flags(pgd_t pgd)
310 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
313 #if CONFIG_PGTABLE_LEVELS > 4
314 typedef struct { p4dval_t p4d; } p4d_t;
316 static inline p4d_t native_make_p4d(pudval_t val)
318 return (p4d_t) { val };
321 static inline p4dval_t native_p4d_val(p4d_t p4d)
326 #include <asm-generic/pgtable-nop4d.h>
328 static inline p4d_t native_make_p4d(pudval_t val)
330 return (p4d_t) { .pgd = native_make_pgd((pgdval_t)val) };
333 static inline p4dval_t native_p4d_val(p4d_t p4d)
335 return native_pgd_val(p4d.pgd);
339 #if CONFIG_PGTABLE_LEVELS > 3
340 typedef struct { pudval_t pud; } pud_t;
342 static inline pud_t native_make_pud(pmdval_t val)
344 return (pud_t) { val };
347 static inline pudval_t native_pud_val(pud_t pud)
352 #include <asm-generic/pgtable-nopud.h>
354 static inline pud_t native_make_pud(pudval_t val)
356 return (pud_t) { .p4d.pgd = native_make_pgd(val) };
359 static inline pudval_t native_pud_val(pud_t pud)
361 return native_pgd_val(pud.p4d.pgd);
365 #if CONFIG_PGTABLE_LEVELS > 2
366 typedef struct { pmdval_t pmd; } pmd_t;
368 static inline pmd_t native_make_pmd(pmdval_t val)
370 return (pmd_t) { val };
373 static inline pmdval_t native_pmd_val(pmd_t pmd)
378 #include <asm-generic/pgtable-nopmd.h>
380 static inline pmd_t native_make_pmd(pmdval_t val)
382 return (pmd_t) { .pud.p4d.pgd = native_make_pgd(val) };
385 static inline pmdval_t native_pmd_val(pmd_t pmd)
387 return native_pgd_val(pmd.pud.p4d.pgd);
391 static inline p4dval_t p4d_pfn_mask(p4d_t p4d)
393 /* No 512 GiB huge pages yet */
397 static inline p4dval_t p4d_flags_mask(p4d_t p4d)
399 return ~p4d_pfn_mask(p4d);
402 static inline p4dval_t p4d_flags(p4d_t p4d)
404 return native_p4d_val(p4d) & p4d_flags_mask(p4d);
407 static inline pudval_t pud_pfn_mask(pud_t pud)
409 if (native_pud_val(pud) & _PAGE_PSE)
410 return PHYSICAL_PUD_PAGE_MASK;
415 static inline pudval_t pud_flags_mask(pud_t pud)
417 return ~pud_pfn_mask(pud);
420 static inline pudval_t pud_flags(pud_t pud)
422 return native_pud_val(pud) & pud_flags_mask(pud);
425 static inline pmdval_t pmd_pfn_mask(pmd_t pmd)
427 if (native_pmd_val(pmd) & _PAGE_PSE)
428 return PHYSICAL_PMD_PAGE_MASK;
433 static inline pmdval_t pmd_flags_mask(pmd_t pmd)
435 return ~pmd_pfn_mask(pmd);
438 static inline pmdval_t pmd_flags(pmd_t pmd)
440 return native_pmd_val(pmd) & pmd_flags_mask(pmd);
443 static inline pte_t native_make_pte(pteval_t val)
445 return (pte_t) { .pte = val };
448 static inline pteval_t native_pte_val(pte_t pte)
453 static inline pteval_t pte_flags(pte_t pte)
455 return native_pte_val(pte) & PTE_FLAGS_MASK;
458 #define __pte2cm_idx(cb) \
459 ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \
460 (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \
461 (((cb) >> _PAGE_BIT_PWT) & 1))
462 #define __cm_idx2pte(i) \
463 ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \
464 (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \
465 (((i) & 1) << _PAGE_BIT_PWT))
467 unsigned long cachemode2protval(enum page_cache_mode pcm);
469 static inline pgprotval_t protval_4k_2_large(pgprotval_t val)
471 return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
472 ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
474 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
476 return __pgprot(protval_4k_2_large(pgprot_val(pgprot)));
478 static inline pgprotval_t protval_large_2_4k(pgprotval_t val)
480 return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
481 ((val & _PAGE_PAT_LARGE) >>
482 (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
484 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
486 return __pgprot(protval_large_2_4k(pgprot_val(pgprot)));
490 typedef struct page *pgtable_t;
492 extern pteval_t __supported_pte_mask;
493 extern pteval_t __default_kernel_pte_mask;
494 extern void set_nx(void);
495 extern int nx_enabled;
497 #define pgprot_writecombine pgprot_writecombine
498 extern pgprot_t pgprot_writecombine(pgprot_t prot);
500 #define pgprot_writethrough pgprot_writethrough
501 extern pgprot_t pgprot_writethrough(pgprot_t prot);
503 /* Indicate that x86 has its own track and untrack pfn vma functions */
504 #define __HAVE_PFNMAP_TRACKING
506 #define __HAVE_PHYS_MEM_ACCESS_PROT
508 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
509 unsigned long size, pgprot_t vma_prot);
511 /* Install a pte for a particular vaddr in kernel space. */
512 void set_pte_vaddr(unsigned long vaddr, pte_t pte);
515 extern void native_pagetable_init(void);
517 #define native_pagetable_init paging_init
521 extern void arch_report_meminfo(struct seq_file *m);
532 #ifdef CONFIG_PROC_FS
533 extern void update_page_count(int level, unsigned long pages);
535 static inline void update_page_count(int level, unsigned long pages) { }
539 * Helper function that returns the kernel pagetable entry controlling
540 * the virtual address 'address'. NULL means no pagetable entry present.
541 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
544 extern pte_t *lookup_address(unsigned long address, unsigned int *level);
545 extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
546 unsigned int *level);
547 extern pmd_t *lookup_pmd_address(unsigned long address);
548 extern phys_addr_t slow_virt_to_phys(void *__address);
549 extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn,
550 unsigned long address,
552 unsigned long page_flags);
553 extern int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address,
554 unsigned long numpages);
555 #endif /* !__ASSEMBLY__ */
557 #endif /* _ASM_X86_PGTABLE_DEFS_H */