1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PAGE_64_H
3 #define _ASM_X86_PAGE_64_H
5 #include <asm/page_64_types.h>
8 #include <asm/cpufeatures.h>
9 #include <asm/alternative.h>
11 #include <linux/kmsan-checks.h>
13 /* duplicated to the one in bootmem.h */
14 extern unsigned long max_pfn;
15 extern unsigned long phys_base;
17 extern unsigned long page_offset_base;
18 extern unsigned long vmalloc_base;
19 extern unsigned long vmemmap_base;
21 static __always_inline unsigned long __phys_addr_nodebug(unsigned long x)
23 unsigned long y = x - __START_KERNEL_map;
25 /* use the carry flag to determine if x was < __START_KERNEL_map */
26 x = y + ((x > y) ? phys_base : (__START_KERNEL_map - PAGE_OFFSET));
31 #ifdef CONFIG_DEBUG_VIRTUAL
32 extern unsigned long __phys_addr(unsigned long);
33 extern unsigned long __phys_addr_symbol(unsigned long);
35 #define __phys_addr(x) __phys_addr_nodebug(x)
36 #define __phys_addr_symbol(x) \
37 ((unsigned long)(x) - __START_KERNEL_map + phys_base)
40 #define __phys_reloc_hide(x) (x)
43 #define pfn_valid(pfn) ((pfn) < max_pfn)
46 void clear_page_orig(void *page);
47 void clear_page_rep(void *page);
48 void clear_page_erms(void *page);
50 static inline void clear_page(void *page)
53 * Clean up KMSAN metadata for the page being cleared. The assembly call
54 * below clobbers @page, so we perform unpoisoning before it.
56 kmsan_unpoison_memory(page, PAGE_SIZE);
57 alternative_call_2(clear_page_orig,
58 clear_page_rep, X86_FEATURE_REP_GOOD,
59 clear_page_erms, X86_FEATURE_ERMS,
62 : "cc", "memory", "rax", "rcx");
65 void copy_page(void *to, void *from);
67 #ifdef CONFIG_X86_5LEVEL
69 * User space process size. This is the first address outside the user range.
70 * There are a few constraints that determine this:
72 * On Intel CPUs, if a SYSCALL instruction is at the highest canonical
73 * address, then that syscall will enter the kernel with a
74 * non-canonical return address, and SYSRET will explode dangerously.
75 * We avoid this particular problem by preventing anything
76 * from being mapped at the maximum canonical address.
78 * On AMD CPUs in the Ryzen family, there's a nasty bug in which the
79 * CPUs malfunction if they execute code from the highest canonical page.
80 * They'll speculate right off the end of the canonical space, and
81 * bad things happen. This is worked around in the same way as the
84 * With page table isolation enabled, we map the LDT in ... [stay tuned]
86 static __always_inline unsigned long task_size_max(void)
90 alternative_io("movq %[small],%0","movq %[large],%0",
93 [small] "i" ((1ul << 47)-PAGE_SIZE),
94 [large] "i" ((1ul << 56)-PAGE_SIZE));
98 #endif /* CONFIG_X86_5LEVEL */
100 #endif /* !__ASSEMBLY__ */
102 #ifdef CONFIG_X86_VSYSCALL_EMULATION
103 # define __HAVE_ARCH_GATE_AREA 1
106 #endif /* _ASM_X86_PAGE_64_H */