1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Glue Code for the AVX/AES-NI/GFNI assembler implementation of the ARIA Cipher
5 * Copyright (c) 2022 Taehee Yoo <ap420073@gmail.com>
8 #include <crypto/algapi.h>
9 #include <crypto/internal/simd.h>
10 #include <crypto/aria.h>
11 #include <linux/crypto.h>
12 #include <linux/err.h>
13 #include <linux/module.h>
14 #include <linux/types.h>
16 #include "ecb_cbc_helpers.h"
19 asmlinkage void aria_aesni_avx_encrypt_16way(const void *ctx, u8 *dst,
21 asmlinkage void aria_aesni_avx_decrypt_16way(const void *ctx, u8 *dst,
23 asmlinkage void aria_aesni_avx_ctr_crypt_16way(const void *ctx, u8 *dst,
25 u8 *keystream, u8 *iv);
26 asmlinkage void aria_aesni_avx_gfni_encrypt_16way(const void *ctx, u8 *dst,
28 asmlinkage void aria_aesni_avx_gfni_decrypt_16way(const void *ctx, u8 *dst,
30 asmlinkage void aria_aesni_avx_gfni_ctr_crypt_16way(const void *ctx, u8 *dst,
32 u8 *keystream, u8 *iv);
34 static struct aria_avx_ops aria_ops;
36 static int ecb_do_encrypt(struct skcipher_request *req, const u32 *rkey)
38 ECB_WALK_START(req, ARIA_BLOCK_SIZE, ARIA_AESNI_PARALLEL_BLOCKS);
39 ECB_BLOCK(ARIA_AESNI_PARALLEL_BLOCKS, aria_ops.aria_encrypt_16way);
40 ECB_BLOCK(1, aria_encrypt);
44 static int ecb_do_decrypt(struct skcipher_request *req, const u32 *rkey)
46 ECB_WALK_START(req, ARIA_BLOCK_SIZE, ARIA_AESNI_PARALLEL_BLOCKS);
47 ECB_BLOCK(ARIA_AESNI_PARALLEL_BLOCKS, aria_ops.aria_decrypt_16way);
48 ECB_BLOCK(1, aria_decrypt);
52 static int aria_avx_ecb_encrypt(struct skcipher_request *req)
54 struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
55 struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);
57 return ecb_do_encrypt(req, ctx->enc_key[0]);
60 static int aria_avx_ecb_decrypt(struct skcipher_request *req)
62 struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
63 struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);
65 return ecb_do_decrypt(req, ctx->dec_key[0]);
68 static int aria_avx_set_key(struct crypto_skcipher *tfm, const u8 *key,
71 return aria_set_key(&tfm->base, key, keylen);
74 static int aria_avx_ctr_encrypt(struct skcipher_request *req)
76 struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
77 struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);
78 struct skcipher_walk walk;
82 err = skcipher_walk_virt(&walk, req, false);
84 while ((nbytes = walk.nbytes) > 0) {
85 const u8 *src = walk.src.virt.addr;
86 u8 *dst = walk.dst.virt.addr;
88 while (nbytes >= ARIA_AESNI_PARALLEL_BLOCK_SIZE) {
89 u8 keystream[ARIA_AESNI_PARALLEL_BLOCK_SIZE];
92 aria_ops.aria_ctr_crypt_16way(ctx, dst, src, keystream,
95 dst += ARIA_AESNI_PARALLEL_BLOCK_SIZE;
96 src += ARIA_AESNI_PARALLEL_BLOCK_SIZE;
97 nbytes -= ARIA_AESNI_PARALLEL_BLOCK_SIZE;
100 while (nbytes >= ARIA_BLOCK_SIZE) {
101 u8 keystream[ARIA_BLOCK_SIZE];
103 memcpy(keystream, walk.iv, ARIA_BLOCK_SIZE);
104 crypto_inc(walk.iv, ARIA_BLOCK_SIZE);
106 aria_encrypt(ctx, keystream, keystream);
108 crypto_xor_cpy(dst, src, keystream, ARIA_BLOCK_SIZE);
109 dst += ARIA_BLOCK_SIZE;
110 src += ARIA_BLOCK_SIZE;
111 nbytes -= ARIA_BLOCK_SIZE;
114 if (walk.nbytes == walk.total && nbytes > 0) {
115 u8 keystream[ARIA_BLOCK_SIZE];
117 memcpy(keystream, walk.iv, ARIA_BLOCK_SIZE);
118 crypto_inc(walk.iv, ARIA_BLOCK_SIZE);
120 aria_encrypt(ctx, keystream, keystream);
122 crypto_xor_cpy(dst, src, keystream, nbytes);
127 err = skcipher_walk_done(&walk, nbytes);
133 static struct skcipher_alg aria_algs[] = {
135 .base.cra_name = "__ecb(aria)",
136 .base.cra_driver_name = "__ecb-aria-avx",
137 .base.cra_priority = 400,
138 .base.cra_flags = CRYPTO_ALG_INTERNAL,
139 .base.cra_blocksize = ARIA_BLOCK_SIZE,
140 .base.cra_ctxsize = sizeof(struct aria_ctx),
141 .base.cra_module = THIS_MODULE,
142 .min_keysize = ARIA_MIN_KEY_SIZE,
143 .max_keysize = ARIA_MAX_KEY_SIZE,
144 .setkey = aria_avx_set_key,
145 .encrypt = aria_avx_ecb_encrypt,
146 .decrypt = aria_avx_ecb_decrypt,
148 .base.cra_name = "__ctr(aria)",
149 .base.cra_driver_name = "__ctr-aria-avx",
150 .base.cra_priority = 400,
151 .base.cra_flags = CRYPTO_ALG_INTERNAL,
152 .base.cra_blocksize = 1,
153 .base.cra_ctxsize = sizeof(struct aria_ctx),
154 .base.cra_module = THIS_MODULE,
155 .min_keysize = ARIA_MIN_KEY_SIZE,
156 .max_keysize = ARIA_MAX_KEY_SIZE,
157 .ivsize = ARIA_BLOCK_SIZE,
158 .chunksize = ARIA_BLOCK_SIZE,
159 .walksize = 16 * ARIA_BLOCK_SIZE,
160 .setkey = aria_avx_set_key,
161 .encrypt = aria_avx_ctr_encrypt,
162 .decrypt = aria_avx_ctr_encrypt,
166 static struct simd_skcipher_alg *aria_simd_algs[ARRAY_SIZE(aria_algs)];
168 static int __init aria_avx_init(void)
170 const char *feature_name;
172 if (!boot_cpu_has(X86_FEATURE_AVX) ||
173 !boot_cpu_has(X86_FEATURE_AES) ||
174 !boot_cpu_has(X86_FEATURE_OSXSAVE)) {
175 pr_info("AVX or AES-NI instructions are not detected.\n");
179 if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
181 pr_info("CPU feature '%s' is not supported.\n", feature_name);
185 if (boot_cpu_has(X86_FEATURE_GFNI)) {
186 aria_ops.aria_encrypt_16way = aria_aesni_avx_gfni_encrypt_16way;
187 aria_ops.aria_decrypt_16way = aria_aesni_avx_gfni_decrypt_16way;
188 aria_ops.aria_ctr_crypt_16way = aria_aesni_avx_gfni_ctr_crypt_16way;
190 aria_ops.aria_encrypt_16way = aria_aesni_avx_encrypt_16way;
191 aria_ops.aria_decrypt_16way = aria_aesni_avx_decrypt_16way;
192 aria_ops.aria_ctr_crypt_16way = aria_aesni_avx_ctr_crypt_16way;
195 return simd_register_skciphers_compat(aria_algs,
196 ARRAY_SIZE(aria_algs),
200 static void __exit aria_avx_exit(void)
202 simd_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs),
206 module_init(aria_avx_init);
207 module_exit(aria_avx_exit);
209 MODULE_LICENSE("GPL");
210 MODULE_AUTHOR("Taehee Yoo <ap420073@gmail.com>");
211 MODULE_DESCRIPTION("ARIA Cipher Algorithm, AVX/AES-NI/GFNI optimized");
212 MODULE_ALIAS_CRYPTO("aria");
213 MODULE_ALIAS_CRYPTO("aria-aesni-avx");