1 * Qualcomm Atheros ath10k wireless devices
4 - compatible: Should be one of the following:
8 PCI based devices uses compatible string "qcom,ath10k" and takes calibration
9 data along with board specific data via "qcom,ath10k-calibration-data".
10 Rest of the properties are not applicable for PCI based devices.
12 AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
13 and also uses most of the properties defined in this doc (except
14 "qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
15 to carry pre calibration data.
17 In general, entry "qcom,ath10k-pre-calibration-data" and
18 "qcom,ath10k-calibration-data" conflict with each other and only one
19 can be provided per device.
22 - reg: Address and length of the register set for the device.
23 - resets: Must contain an entry for each entry in reset-names.
24 See ../reset/reseti.txt for details.
25 - reset-names: Must include the list of following reset names,
32 - clocks: List of clock specifiers, must contain an entry for each required
34 - clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",
36 - interrupts: List of interrupt lines. Must contain an entry
37 for each entry in the interrupt-names property.
38 - interrupt-names: Must include the entries for MSI interrupt
39 names ("msi0" to "msi15") and legacy interrupt
41 - qcom,msi_addr: MSI interrupt address.
42 - qcom,msi_base: Base value to add before writing MSI data into
44 - qcom,ath10k-calibration-data : calibration data + board specific data
45 as an array, the length can vary between
47 - qcom,ath10k-pre-calibration-data : pre calibration data as an array,
48 the length can vary between hw versions.
50 Example (to supply the calibration data alone):
52 In this example, the node is defined as child node of the PCI controller.
57 #interrupt-cells = <1>;
65 qcom,ath10k-calibration-data = [ 01 02 03 ... ];
70 Example (to supply ipq4019 SoC wifi block details):
73 compatible = "qcom,ipq4019-wifi";
74 reg = <0xa000000 0x200000>;
75 resets = <&gcc WIFI0_CPU_INIT_RESET>,
76 <&gcc WIFI0_RADIO_SRIF_RESET>,
77 <&gcc WIFI0_RADIO_WARM_RESET>,
78 <&gcc WIFI0_RADIO_COLD_RESET>,
79 <&gcc WIFI0_CORE_WARM_RESET>,
80 <&gcc WIFI0_CORE_COLD_RESET>;
81 reset-names = "wifi_cpu_init",
87 clocks = <&gcc GCC_WCSS2G_CLK>,
88 <&gcc GCC_WCSS2G_REF_CLK>,
89 <&gcc GCC_WCSS2G_RTC_CLK>;
90 clock-names = "wifi_wcss_cmd",
93 interrupts = <0 0x20 0x1>,
110 interrupt-names = "msi0", "msi1", "msi2", "msi3",
111 "msi4", "msi5", "msi6", "msi7",
112 "msi8", "msi9", "msi10", "msi11",
113 "msi12", "msi13", "msi14", "msi15",
115 qcom,msi_addr = <0x0b006040>;
116 qcom,msi_base = <0x40>;
117 qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];