2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/etherdevice.h>
18 #include <net/ieee80211_radiotap.h>
19 #include <linux/if_arp.h>
20 #include <linux/moduleparam.h>
22 #include <linux/ipv6.h>
24 #include <linux/prefetch.h>
31 static bool rtap_include_phy_info;
32 module_param(rtap_include_phy_info, bool, S_IRUGO);
33 MODULE_PARM_DESC(rtap_include_phy_info,
34 " Include PHY info in the radiotap header, default - no");
37 module_param(rx_align_2, bool, S_IRUGO);
38 MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no");
40 static inline uint wil_rx_snaplen(void)
42 return rx_align_2 ? 6 : 0;
45 static inline int wil_vring_is_empty(struct vring *vring)
47 return vring->swhead == vring->swtail;
50 static inline u32 wil_vring_next_tail(struct vring *vring)
52 return (vring->swtail + 1) % vring->size;
55 static inline void wil_vring_advance_head(struct vring *vring, int n)
57 vring->swhead = (vring->swhead + n) % vring->size;
60 static inline int wil_vring_is_full(struct vring *vring)
62 return wil_vring_next_tail(vring) == vring->swhead;
65 /* Used space in Tx Vring */
66 static inline int wil_vring_used_tx(struct vring *vring)
68 u32 swhead = vring->swhead;
69 u32 swtail = vring->swtail;
70 return (vring->size + swhead - swtail) % vring->size;
73 /* Available space in Tx Vring */
74 static inline int wil_vring_avail_tx(struct vring *vring)
76 return vring->size - wil_vring_used_tx(vring) - 1;
79 /* wil_vring_wmark_low - low watermark for available descriptor space */
80 static inline int wil_vring_wmark_low(struct vring *vring)
85 /* wil_vring_wmark_high - high watermark for available descriptor space */
86 static inline int wil_vring_wmark_high(struct vring *vring)
91 /* wil_val_in_range - check if value in [min,max) */
92 static inline bool wil_val_in_range(int val, int min, int max)
94 return val >= min && val < max;
97 static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring)
99 struct device *dev = wil_to_dev(wil);
100 size_t sz = vring->size * sizeof(vring->va[0]);
103 wil_dbg_misc(wil, "%s()\n", __func__);
105 BUILD_BUG_ON(sizeof(vring->va[0]) != 32);
109 vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL);
114 /* vring->va should be aligned on its size rounded up to power of 2
115 * This is granted by the dma_alloc_coherent
117 vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL);
123 /* initially, all descriptors are SW owned
124 * For Tx and Rx, ownership bit is at the same location, thus
127 for (i = 0; i < vring->size; i++) {
128 volatile struct vring_tx_desc *_d = &vring->va[i].tx;
130 _d->dma.status = TX_DMA_STATUS_DU;
133 wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size,
134 vring->va, &vring->pa, vring->ctx);
139 static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d,
142 dma_addr_t pa = wil_desc_addr(&d->dma.addr);
143 u16 dmalen = le16_to_cpu(d->dma.length);
145 switch (ctx->mapped_as) {
146 case wil_mapped_as_single:
147 dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE);
149 case wil_mapped_as_page:
150 dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE);
157 static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring,
160 struct device *dev = wil_to_dev(wil);
161 size_t sz = vring->size * sizeof(vring->va[0]);
163 lockdep_assert_held(&wil->mutex);
165 int vring_index = vring - wil->vring_tx;
167 wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n",
168 vring_index, vring->size, vring->va,
169 &vring->pa, vring->ctx);
171 wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n",
172 vring->size, vring->va,
173 &vring->pa, vring->ctx);
176 while (!wil_vring_is_empty(vring)) {
182 struct vring_tx_desc dd, *d = ⅆ
183 volatile struct vring_tx_desc *_d =
184 &vring->va[vring->swtail].tx;
186 ctx = &vring->ctx[vring->swtail];
189 "ctx(%d) was already completed\n",
191 vring->swtail = wil_vring_next_tail(vring);
195 wil_txdesc_unmap(dev, d, ctx);
197 dev_kfree_skb_any(ctx->skb);
198 vring->swtail = wil_vring_next_tail(vring);
200 struct vring_rx_desc dd, *d = ⅆ
201 volatile struct vring_rx_desc *_d =
202 &vring->va[vring->swhead].rx;
204 ctx = &vring->ctx[vring->swhead];
206 pa = wil_desc_addr(&d->dma.addr);
207 dmalen = le16_to_cpu(d->dma.length);
208 dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE);
210 wil_vring_advance_head(vring, 1);
213 dma_free_coherent(dev, sz, (void *)vring->va, vring->pa);
221 * Allocate one skb for Rx VRING
223 * Safe to call from IRQ
225 static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring,
228 struct device *dev = wil_to_dev(wil);
229 unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen();
230 struct vring_rx_desc dd, *d = ⅆ
231 volatile struct vring_rx_desc *_d = &vring->va[i].rx;
233 struct sk_buff *skb = dev_alloc_skb(sz + headroom);
238 skb_reserve(skb, headroom);
241 pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE);
242 if (unlikely(dma_mapping_error(dev, pa))) {
247 d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT;
248 wil_desc_addr_set(&d->dma.addr, pa);
249 /* ip_length don't care */
251 /* error don't care */
252 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
253 d->dma.length = cpu_to_le16(sz);
255 vring->ctx[i].skb = skb;
261 * Adds radiotap header
263 * Any error indicated as "Bad FCS"
265 * Vendor data for 04:ce:14-1 (Wilocity-1) consists of:
266 * - Rx descriptor: 32 bytes
269 static void wil_rx_add_radiotap_header(struct wil6210_priv *wil,
272 struct wireless_dev *wdev = wil->wdev;
273 struct wil6210_rtap {
274 struct ieee80211_radiotap_header rthdr;
275 /* fields should be in the order of bits in rthdr.it_present */
279 __le16 chnl_freq __aligned(2);
286 struct wil6210_rtap_vendor {
287 struct wil6210_rtap rtap;
289 u8 vendor_oui[3] __aligned(2);
294 struct vring_rx_desc *d = wil_skb_rxdesc(skb);
295 struct wil6210_rtap_vendor *rtap_vendor;
296 int rtap_len = sizeof(struct wil6210_rtap);
297 int phy_length = 0; /* phy info header size, bytes */
298 static char phy_data[128];
299 struct ieee80211_channel *ch = wdev->preset_chandef.chan;
301 if (rtap_include_phy_info) {
302 rtap_len = sizeof(*rtap_vendor) + sizeof(*d);
303 /* calculate additional length */
304 if (d->dma.status & RX_DMA_STATUS_PHY_INFO) {
306 * PHY info starts from 8-byte boundary
307 * there are 8-byte lines, last line may be partially
308 * written (HW bug), thus FW configures for last line
309 * to be excessive. Driver skips this last line.
311 int len = min_t(int, 8 + sizeof(phy_data),
312 wil_rxdesc_phy_length(d));
315 void *p = skb_tail_pointer(skb);
316 void *pa = PTR_ALIGN(p, 8);
318 if (skb_tailroom(skb) >= len + (pa - p)) {
319 phy_length = len - 8;
320 memcpy(phy_data, pa, phy_length);
324 rtap_len += phy_length;
327 if (skb_headroom(skb) < rtap_len &&
328 pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) {
329 wil_err(wil, "Unable to expand headrom to %d\n", rtap_len);
333 rtap_vendor = (void *)skb_push(skb, rtap_len);
334 memset(rtap_vendor, 0, rtap_len);
336 rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION;
337 rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len);
338 rtap_vendor->rtap.rthdr.it_present = cpu_to_le32(
339 (1 << IEEE80211_RADIOTAP_FLAGS) |
340 (1 << IEEE80211_RADIOTAP_CHANNEL) |
341 (1 << IEEE80211_RADIOTAP_MCS));
342 if (d->dma.status & RX_DMA_STATUS_ERROR)
343 rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS;
345 rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320);
346 rtap_vendor->rtap.chnl_flags = cpu_to_le16(0);
348 rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS;
349 rtap_vendor->rtap.mcs_flags = 0;
350 rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d);
352 if (rtap_include_phy_info) {
353 rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 <<
354 IEEE80211_RADIOTAP_VENDOR_NAMESPACE);
355 /* OUI for Wilocity 04:ce:14 */
356 rtap_vendor->vendor_oui[0] = 0x04;
357 rtap_vendor->vendor_oui[1] = 0xce;
358 rtap_vendor->vendor_oui[2] = 0x14;
359 rtap_vendor->vendor_ns = 1;
360 /* Rx descriptor + PHY data */
361 rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) +
363 memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d));
364 memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data,
369 /* similar to ieee80211_ version, but FC contain only 1-st byte */
370 static inline int wil_is_back_req(u8 fc)
372 return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
373 (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ);
377 * reap 1 frame from @swhead
379 * Rx descriptor copied to skb->cb
381 * Safe to call from IRQ
383 static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil,
386 struct device *dev = wil_to_dev(wil);
387 struct net_device *ndev = wil_to_ndev(wil);
388 volatile struct vring_rx_desc *_d;
389 struct vring_rx_desc *d;
392 unsigned int snaplen = wil_rx_snaplen();
393 unsigned int sz = mtu_max + ETH_HLEN + snaplen;
398 struct wil_net_stats *stats;
400 BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb));
403 if (unlikely(wil_vring_is_empty(vring)))
406 i = (int)vring->swhead;
407 _d = &vring->va[i].rx;
408 if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) {
409 /* it is not error, we just reached end of Rx done area */
413 skb = vring->ctx[i].skb;
414 vring->ctx[i].skb = NULL;
415 wil_vring_advance_head(vring, 1);
417 wil_err(wil, "No Rx skb at [%d]\n", i);
420 d = wil_skb_rxdesc(skb);
422 pa = wil_desc_addr(&d->dma.addr);
424 dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE);
425 dmalen = le16_to_cpu(d->dma.length);
427 trace_wil6210_rx(i, d);
428 wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen);
429 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4,
430 (const void *)d, sizeof(*d), false);
432 cid = wil_rxdesc_cid(d);
433 stats = &wil->sta[cid].stats;
435 if (unlikely(dmalen > sz)) {
436 wil_err(wil, "Rx size too large: %d bytes!\n", dmalen);
437 stats->rx_large_frame++;
441 skb_trim(skb, dmalen);
445 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
446 skb->data, skb_headlen(skb), false);
448 stats->last_mcs_rx = wil_rxdesc_mcs(d);
449 if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs))
450 stats->rx_per_mcs[stats->last_mcs_rx]++;
452 /* use radiotap header only if required */
453 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP)
454 wil_rx_add_radiotap_header(wil, skb);
456 /* no extra checks if in sniffer mode */
457 if (ndev->type != ARPHRD_ETHER)
459 /* Non-data frames may be delivered through Rx DMA channel (ex: BAR)
460 * Driver should recognize it by frame type, that is found
461 * in Rx descriptor. If type is not data, it is 802.11 frame as is
463 ftype = wil_rxdesc_ftype(d) << 2;
464 if (unlikely(ftype != IEEE80211_FTYPE_DATA)) {
465 u8 fc1 = wil_rxdesc_fc1(d);
466 int mid = wil_rxdesc_mid(d);
467 int tid = wil_rxdesc_tid(d);
468 u16 seq = wil_rxdesc_seq(d);
471 "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
472 fc1, mid, cid, tid, seq);
473 stats->rx_non_data_frame++;
474 if (wil_is_back_req(fc1)) {
476 "BAR: MID %d CID %d TID %d Seq 0x%03x\n",
478 wil_rx_bar(wil, cid, tid, seq);
480 /* print again all info. One can enable only this
481 * without overhead for printing every Rx frame
484 "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
485 fc1, mid, cid, tid, seq);
486 wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4,
487 (const void *)d, sizeof(*d), false);
488 wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
489 skb->data, skb_headlen(skb), false);
495 if (unlikely(skb->len < ETH_HLEN + snaplen)) {
496 wil_err(wil, "Short frame, len = %d\n", skb->len);
497 stats->rx_short_frame++;
502 /* L4 IDENT is on when HW calculated checksum, check status
503 * and in case of error drop the packet
504 * higher stack layers will handle retransmission (if required)
506 if (likely(d->dma.status & RX_DMA_STATUS_L4I)) {
507 /* L4 protocol identified, csum calculated */
508 if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0))
509 skb->ip_summed = CHECKSUM_UNNECESSARY;
510 /* If HW reports bad checksum, let IP stack re-check it
511 * For example, HW don't understand Microsoft IP stack that
512 * mis-calculates TCP checksum - if it should be 0x0,
513 * it writes 0xffff in violation of RFC 1624
519 * +-------+-------+---------+------------+------+
520 * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA |
521 * +-------+-------+---------+------------+------+
522 * Need to remove SNAP, shifting SA and DA forward
524 memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN);
525 skb_pull(skb, snaplen);
532 * allocate and fill up to @count buffers in rx ring
533 * buffers posted at @swtail
535 static int wil_rx_refill(struct wil6210_priv *wil, int count)
537 struct net_device *ndev = wil_to_ndev(wil);
538 struct vring *v = &wil->vring_rx;
541 int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ?
542 WIL6210_RTAP_SIZE : 0;
544 for (; next_tail = wil_vring_next_tail(v),
545 (next_tail != v->swhead) && (count-- > 0);
546 v->swtail = next_tail) {
547 rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom);
549 wil_err_ratelimited(wil, "Error %d in rx refill[%d]\n",
555 /* make sure all writes to descriptors (shared memory) are done before
556 * committing them to HW
560 wil_w(wil, v->hwtail, v->swtail);
566 * reverse_memcmp - Compare two areas of memory, in reverse order
567 * @cs: One area of memory
568 * @ct: Another area of memory
569 * @count: The size of the area.
571 * Cut'n'paste from original memcmp (see lib/string.c)
572 * with minimal modifications
574 static int reverse_memcmp(const void *cs, const void *ct, size_t count)
576 const unsigned char *su1, *su2;
579 for (su1 = cs + count - 1, su2 = ct + count - 1; count > 0;
580 --su1, --su2, count--) {
588 static int wil_rx_crypto_check(struct wil6210_priv *wil, struct sk_buff *skb)
590 struct vring_rx_desc *d = wil_skb_rxdesc(skb);
591 int cid = wil_rxdesc_cid(d);
592 int tid = wil_rxdesc_tid(d);
593 int key_id = wil_rxdesc_key_id(d);
594 int mc = wil_rxdesc_mcast(d);
595 struct wil_sta_info *s = &wil->sta[cid];
596 struct wil_tid_crypto_rx *c = mc ? &s->group_crypto_rx :
597 &s->tid_crypto_rx[tid];
598 struct wil_tid_crypto_rx_single *cc = &c->key_id[key_id];
599 const u8 *pn = (u8 *)&d->mac.pn_15_0;
602 wil_err_ratelimited(wil,
603 "Key missing. CID %d TID %d MCast %d KEY_ID %d\n",
604 cid, tid, mc, key_id);
608 if (reverse_memcmp(pn, cc->pn, IEEE80211_GCMP_PN_LEN) <= 0) {
609 wil_err_ratelimited(wil,
610 "Replay attack. CID %d TID %d MCast %d KEY_ID %d PN %6phN last %6phN\n",
611 cid, tid, mc, key_id, pn, cc->pn);
614 memcpy(cc->pn, pn, IEEE80211_GCMP_PN_LEN);
620 * Pass Rx packet to the netif. Update statistics.
621 * Called in softirq context (NAPI poll).
623 void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev)
625 gro_result_t rc = GRO_NORMAL;
626 struct wil6210_priv *wil = ndev_to_wil(ndev);
627 struct wireless_dev *wdev = wil_to_wdev(wil);
628 unsigned int len = skb->len;
629 struct vring_rx_desc *d = wil_skb_rxdesc(skb);
630 int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */
631 int security = wil_rxdesc_security(d);
632 struct ethhdr *eth = (void *)skb->data;
633 /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication
634 * is not suitable, need to look at data
636 int mcast = is_multicast_ether_addr(eth->h_dest);
637 struct wil_net_stats *stats = &wil->sta[cid].stats;
638 struct sk_buff *xmit_skb = NULL;
639 static const char * const gro_res_str[] = {
640 [GRO_MERGED] = "GRO_MERGED",
641 [GRO_MERGED_FREE] = "GRO_MERGED_FREE",
642 [GRO_HELD] = "GRO_HELD",
643 [GRO_NORMAL] = "GRO_NORMAL",
644 [GRO_DROP] = "GRO_DROP",
647 if (ndev->features & NETIF_F_RXHASH)
648 /* fake L4 to ensure it won't be re-calculated later
649 * set hash to any non-zero value to activate rps
650 * mechanism, core will be chosen according
651 * to user-level rps configuration.
653 skb_set_hash(skb, 1, PKT_HASH_TYPE_L4);
657 if (security && (wil_rx_crypto_check(wil, skb) != 0)) {
664 if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) {
666 /* send multicast frames both to higher layers in
667 * local net stack and back to the wireless medium
669 xmit_skb = skb_copy(skb, GFP_ATOMIC);
671 int xmit_cid = wil_find_cid(wil, eth->h_dest);
674 /* The destination station is associated to
675 * this AP (in this VLAN), so send the frame
676 * directly to it and do not pass it to local
685 /* Send to wireless media and increase priority by 256 to
686 * keep the received priority instead of reclassifying
687 * the frame (see cfg80211_classify8021d).
689 xmit_skb->dev = ndev;
690 xmit_skb->priority += 256;
691 xmit_skb->protocol = htons(ETH_P_802_3);
692 skb_reset_network_header(xmit_skb);
693 skb_reset_mac_header(xmit_skb);
694 wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len);
695 dev_queue_xmit(xmit_skb);
698 if (skb) { /* deliver to local stack */
700 skb->protocol = eth_type_trans(skb, ndev);
701 rc = napi_gro_receive(&wil->napi_rx, skb);
702 wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n",
703 len, gro_res_str[rc]);
706 /* statistics. rc set to GRO_NORMAL for AP bridging */
707 if (unlikely(rc == GRO_DROP)) {
708 ndev->stats.rx_dropped++;
710 wil_dbg_txrx(wil, "Rx drop %d bytes\n", len);
712 ndev->stats.rx_packets++;
714 ndev->stats.rx_bytes += len;
715 stats->rx_bytes += len;
717 ndev->stats.multicast++;
722 * Proceed all completed skb's from Rx VRING
724 * Safe to call from NAPI poll, i.e. softirq with interrupts enabled
726 void wil_rx_handle(struct wil6210_priv *wil, int *quota)
728 struct net_device *ndev = wil_to_ndev(wil);
729 struct vring *v = &wil->vring_rx;
732 if (unlikely(!v->va)) {
733 wil_err(wil, "Rx IRQ while Rx not yet initialized\n");
736 wil_dbg_txrx(wil, "%s()\n", __func__);
737 while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) {
740 if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) {
742 skb_reset_mac_header(skb);
743 skb->ip_summed = CHECKSUM_UNNECESSARY;
744 skb->pkt_type = PACKET_OTHERHOST;
745 skb->protocol = htons(ETH_P_802_2);
746 wil_netif_rx_any(skb, ndev);
748 wil_rx_reorder(wil, skb);
751 wil_rx_refill(wil, v->size);
754 int wil_rx_init(struct wil6210_priv *wil, u16 size)
756 struct vring *vring = &wil->vring_rx;
759 wil_dbg_misc(wil, "%s()\n", __func__);
762 wil_err(wil, "Rx ring already allocated\n");
767 rc = wil_vring_alloc(wil, vring);
771 rc = wmi_rx_chain_add(wil, vring);
775 rc = wil_rx_refill(wil, vring->size);
781 wil_vring_free(wil, vring, 0);
786 void wil_rx_fini(struct wil6210_priv *wil)
788 struct vring *vring = &wil->vring_rx;
790 wil_dbg_misc(wil, "%s()\n", __func__);
793 wil_vring_free(wil, vring, 0);
796 static inline void wil_tx_data_init(struct vring_tx_data *txdata)
798 spin_lock_bh(&txdata->lock);
799 txdata->dot1x_open = 0;
802 txdata->last_idle = 0;
804 txdata->agg_wsize = 0;
805 txdata->agg_timeout = 0;
806 txdata->agg_amsdu = 0;
807 txdata->addba_in_progress = false;
808 spin_unlock_bh(&txdata->lock);
811 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
815 struct wmi_vring_cfg_cmd cmd = {
816 .action = cpu_to_le32(WMI_VRING_CMD_ADD),
820 cpu_to_le16(wil_mtu2macbuf(mtu_max)),
821 .ring_size = cpu_to_le16(size),
824 .cidxtid = mk_cidxtid(cid, tid),
825 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3,
830 .priority = cpu_to_le16(0),
831 .timeslot_us = cpu_to_le16(0xfff),
836 struct wmi_cmd_hdr wmi;
837 struct wmi_vring_cfg_done_event cmd;
839 struct vring *vring = &wil->vring_tx[id];
840 struct vring_tx_data *txdata = &wil->vring_tx_data[id];
842 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__,
843 cmd.vring_cfg.tx_sw_ring.max_mpdu_size);
844 lockdep_assert_held(&wil->mutex);
847 wil_err(wil, "Tx ring [%d] already allocated\n", id);
852 wil_tx_data_init(txdata);
854 rc = wil_vring_alloc(wil, vring);
858 wil->vring2cid_tid[id][0] = cid;
859 wil->vring2cid_tid[id][1] = tid;
861 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa);
864 txdata->dot1x_open = true;
865 rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd),
866 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100);
870 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) {
871 wil_err(wil, "Tx config failed, status 0x%02x\n",
877 spin_lock_bh(&txdata->lock);
878 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr);
880 spin_unlock_bh(&txdata->lock);
882 if (txdata->dot1x_open && (agg_wsize >= 0))
883 wil_addba_tx_request(wil, id, agg_wsize);
887 spin_lock_bh(&txdata->lock);
888 txdata->dot1x_open = false;
890 spin_unlock_bh(&txdata->lock);
891 wil_vring_free(wil, vring, 1);
892 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID;
893 wil->vring2cid_tid[id][1] = 0;
900 int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size)
903 struct wmi_bcast_vring_cfg_cmd cmd = {
904 .action = cpu_to_le32(WMI_VRING_CMD_ADD),
908 cpu_to_le16(wil_mtu2macbuf(mtu_max)),
909 .ring_size = cpu_to_le16(size),
912 .encap_trans_type = WMI_VRING_ENC_TYPE_802_3,
916 struct wmi_cmd_hdr wmi;
917 struct wmi_vring_cfg_done_event cmd;
919 struct vring *vring = &wil->vring_tx[id];
920 struct vring_tx_data *txdata = &wil->vring_tx_data[id];
922 wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__,
923 cmd.vring_cfg.tx_sw_ring.max_mpdu_size);
924 lockdep_assert_held(&wil->mutex);
927 wil_err(wil, "Tx ring [%d] already allocated\n", id);
932 wil_tx_data_init(txdata);
934 rc = wil_vring_alloc(wil, vring);
938 wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */
939 wil->vring2cid_tid[id][1] = 0; /* TID */
941 cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa);
944 txdata->dot1x_open = true;
945 rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd),
946 WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100);
950 if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) {
951 wil_err(wil, "Tx config failed, status 0x%02x\n",
957 spin_lock_bh(&txdata->lock);
958 vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr);
960 spin_unlock_bh(&txdata->lock);
964 spin_lock_bh(&txdata->lock);
966 txdata->dot1x_open = false;
967 spin_unlock_bh(&txdata->lock);
968 wil_vring_free(wil, vring, 1);
974 void wil_vring_fini_tx(struct wil6210_priv *wil, int id)
976 struct vring *vring = &wil->vring_tx[id];
977 struct vring_tx_data *txdata = &wil->vring_tx_data[id];
979 lockdep_assert_held(&wil->mutex);
984 wil_dbg_misc(wil, "%s() id=%d\n", __func__, id);
986 spin_lock_bh(&txdata->lock);
987 txdata->dot1x_open = false;
988 txdata->enabled = 0; /* no Tx can be in progress or start anew */
989 spin_unlock_bh(&txdata->lock);
990 /* napi_synchronize waits for completion of the current NAPI but will
991 * not prevent the next NAPI run.
992 * Add a memory barrier to guarantee that txdata->enabled is zeroed
993 * before napi_synchronize so that the next scheduled NAPI will not
997 /* make sure NAPI won't touch this vring */
998 if (test_bit(wil_status_napi_en, wil->status))
999 napi_synchronize(&wil->napi_tx);
1001 wil_vring_free(wil, vring, 1);
1004 static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil,
1005 struct sk_buff *skb)
1008 struct ethhdr *eth = (void *)skb->data;
1009 int cid = wil_find_cid(wil, eth->h_dest);
1014 /* TODO: fix for multiple TID */
1015 for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) {
1016 if (!wil->vring_tx_data[i].dot1x_open &&
1017 (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1019 if (wil->vring2cid_tid[i][0] == cid) {
1020 struct vring *v = &wil->vring_tx[i];
1021 struct vring_tx_data *txdata = &wil->vring_tx_data[i];
1023 wil_dbg_txrx(wil, "%s(%pM) -> [%d]\n",
1024 __func__, eth->h_dest, i);
1025 if (v->va && txdata->enabled) {
1028 wil_dbg_txrx(wil, "vring[%d] not valid\n", i);
1037 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
1038 struct sk_buff *skb);
1040 static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil,
1041 struct sk_buff *skb)
1046 struct vring_tx_data *txdata;
1048 /* In the STA mode, it is expected to have only 1 VRING
1049 * for the AP we connected to.
1050 * find 1-st vring eligible for this skb and use it.
1052 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
1053 v = &wil->vring_tx[i];
1054 txdata = &wil->vring_tx_data[i];
1055 if (!v->va || !txdata->enabled)
1058 cid = wil->vring2cid_tid[i][0];
1059 if (cid >= WIL6210_MAX_CID) /* skip BCAST */
1062 if (!wil->vring_tx_data[i].dot1x_open &&
1063 (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1066 wil_dbg_txrx(wil, "Tx -> ring %d\n", i);
1071 wil_dbg_txrx(wil, "Tx while no vrings active?\n");
1076 /* Use one of 2 strategies:
1078 * 1. New (real broadcast):
1079 * use dedicated broadcast vring
1080 * 2. Old (pseudo-DMS):
1081 * Find 1-st vring and return it;
1082 * duplicate skb and send it to other active vrings;
1083 * in all cases override dest address to unicast peer's address
1084 * Use old strategy when new is not supported yet:
1087 static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil,
1088 struct sk_buff *skb)
1091 struct vring_tx_data *txdata;
1092 int i = wil->bcast_vring;
1096 v = &wil->vring_tx[i];
1097 txdata = &wil->vring_tx_data[i];
1098 if (!v->va || !txdata->enabled)
1100 if (!wil->vring_tx_data[i].dot1x_open &&
1101 (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1107 static void wil_set_da_for_vring(struct wil6210_priv *wil,
1108 struct sk_buff *skb, int vring_index)
1110 struct ethhdr *eth = (void *)skb->data;
1111 int cid = wil->vring2cid_tid[vring_index][0];
1113 ether_addr_copy(eth->h_dest, wil->sta[cid].addr);
1116 static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil,
1117 struct sk_buff *skb)
1119 struct vring *v, *v2;
1120 struct sk_buff *skb2;
1123 struct ethhdr *eth = (void *)skb->data;
1124 char *src = eth->h_source;
1125 struct vring_tx_data *txdata;
1127 /* find 1-st vring eligible for data */
1128 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
1129 v = &wil->vring_tx[i];
1130 txdata = &wil->vring_tx_data[i];
1131 if (!v->va || !txdata->enabled)
1134 cid = wil->vring2cid_tid[i][0];
1135 if (cid >= WIL6210_MAX_CID) /* skip BCAST */
1137 if (!wil->vring_tx_data[i].dot1x_open &&
1138 (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1141 /* don't Tx back to source when re-routing Rx->Tx at the AP */
1142 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN))
1148 wil_dbg_txrx(wil, "Tx while no vrings active?\n");
1153 wil_dbg_txrx(wil, "BCAST -> ring %d\n", i);
1154 wil_set_da_for_vring(wil, skb, i);
1156 /* find other active vrings and duplicate skb for each */
1157 for (i++; i < WIL6210_MAX_TX_RINGS; i++) {
1158 v2 = &wil->vring_tx[i];
1161 cid = wil->vring2cid_tid[i][0];
1162 if (cid >= WIL6210_MAX_CID) /* skip BCAST */
1164 if (!wil->vring_tx_data[i].dot1x_open &&
1165 (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1168 if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN))
1171 skb2 = skb_copy(skb, GFP_ATOMIC);
1173 wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i);
1174 wil_set_da_for_vring(wil, skb2, i);
1175 wil_tx_vring(wil, v2, skb2);
1177 wil_err(wil, "skb_copy failed\n");
1184 static struct vring *wil_find_tx_bcast(struct wil6210_priv *wil,
1185 struct sk_buff *skb)
1187 struct wireless_dev *wdev = wil->wdev;
1189 if (wdev->iftype != NL80211_IFTYPE_AP)
1190 return wil_find_tx_bcast_2(wil, skb);
1192 return wil_find_tx_bcast_1(wil, skb);
1195 static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len,
1198 wil_desc_addr_set(&d->dma.addr, pa);
1199 d->dma.ip_length = 0;
1200 /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/
1201 d->dma.b11 = 0/*14 | BIT(7)*/;
1203 d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
1204 d->dma.length = cpu_to_le16((u16)len);
1205 d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS);
1209 d->mac.ucode_cmd = 0;
1210 /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */
1211 d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) |
1212 (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS);
1218 void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags)
1220 d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS);
1224 * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding
1225 * @skb is used to obtain the protocol and headers length.
1226 * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data,
1227 * 2 - middle, 3 - last descriptor.
1230 static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d,
1231 struct sk_buff *skb,
1232 int tso_desc_type, bool is_ipv4,
1233 int tcp_hdr_len, int skb_net_hdr_len)
1235 d->dma.b11 = ETH_HLEN; /* MAC header length */
1236 d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS;
1238 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS);
1239 /* L4 header len: TCP header length */
1240 d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
1242 /* Setup TSO: bit and desc type */
1243 d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) |
1244 (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS);
1245 d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS);
1247 d->dma.ip_length = skb_net_hdr_len;
1248 /* Enable TCP/UDP checksum */
1249 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS);
1250 /* Calculate pseudo-header */
1251 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS);
1255 * Sets the descriptor @d up for csum. The corresponding
1256 * @skb is used to obtain the protocol and headers length.
1257 * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6.
1258 * Note, if d==NULL, the function only returns the protocol result.
1260 * It is very similar to previous wil_tx_desc_offload_setup_tso. This
1261 * is "if unrolling" to optimize the critical path.
1264 static int wil_tx_desc_offload_setup(struct vring_tx_desc *d,
1265 struct sk_buff *skb){
1268 if (skb->ip_summed != CHECKSUM_PARTIAL)
1271 d->dma.b11 = ETH_HLEN; /* MAC header length */
1273 switch (skb->protocol) {
1274 case cpu_to_be16(ETH_P_IP):
1275 protocol = ip_hdr(skb)->protocol;
1276 d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS);
1278 case cpu_to_be16(ETH_P_IPV6):
1279 protocol = ipv6_hdr(skb)->nexthdr;
1287 d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS);
1288 /* L4 header len: TCP header length */
1290 (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
1293 /* L4 header len: UDP header length */
1295 (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
1301 d->dma.ip_length = skb_network_header_len(skb);
1302 /* Enable TCP/UDP checksum */
1303 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS);
1304 /* Calculate pseudo-header */
1305 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS);
1310 static inline void wil_tx_last_desc(struct vring_tx_desc *d)
1312 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) |
1313 BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) |
1314 BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
1317 static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d)
1319 d->dma.d0 |= wil_tso_type_lst <<
1320 DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS;
1323 static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring,
1324 struct sk_buff *skb)
1326 struct device *dev = wil_to_dev(wil);
1328 /* point to descriptors in shared memory */
1329 volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc,
1330 *_first_desc = NULL;
1332 /* pointers to shadow descriptors */
1333 struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem,
1334 *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem,
1335 *first_desc = &first_desc_mem;
1337 /* pointer to shadow descriptors' context */
1338 struct wil_ctx *hdr_ctx, *first_ctx = NULL;
1340 int descs_used = 0; /* total number of used descriptors */
1341 int sg_desc_cnt = 0; /* number of descriptors for current mss*/
1343 u32 swhead = vring->swhead;
1344 int used, avail = wil_vring_avail_tx(vring);
1345 int nr_frags = skb_shinfo(skb)->nr_frags;
1346 int min_desc_required = nr_frags + 1;
1347 int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */
1348 int f, len, hdrlen, headlen;
1349 int vring_index = vring - wil->vring_tx;
1350 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
1353 const skb_frag_t *frag = NULL;
1356 int hdr_compensation_need = true;
1357 int desc_tso_type = wil_tso_type_first;
1360 int skb_net_hdr_len;
1364 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n",
1365 __func__, skb->len, vring_index);
1367 if (unlikely(!txdata->enabled))
1370 /* A typical page 4K is 3-4 payloads, we assume each fragment
1371 * is a full payload, that's how min_desc_required has been
1372 * calculated. In real we might need more or less descriptors,
1373 * this is the initial check only.
1375 if (unlikely(avail < min_desc_required)) {
1376 wil_err_ratelimited(wil,
1377 "TSO: Tx ring[%2d] full. No space for %d fragments\n",
1378 vring_index, min_desc_required);
1382 /* Header Length = MAC header len + IP header len + TCP header len*/
1384 (int)skb_network_header_len(skb) +
1387 gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4);
1390 /* TCP v4, zero out the IP length and IPv4 checksum fields
1391 * as required by the offloading doc
1393 ip_hdr(skb)->tot_len = 0;
1394 ip_hdr(skb)->check = 0;
1398 /* TCP v6, zero out the payload length */
1399 ipv6_hdr(skb)->payload_len = 0;
1403 /* other than TCPv4 or TCPv6 types are not supported for TSO.
1404 * It is also illegal for both to be set simultaneously
1409 if (skb->ip_summed != CHECKSUM_PARTIAL)
1412 /* tcp header length and skb network header length are fixed for all
1413 * packet's descriptors - read then once here
1415 tcp_hdr_len = tcp_hdrlen(skb);
1416 skb_net_hdr_len = skb_network_header_len(skb);
1418 _hdr_desc = &vring->va[i].tx;
1420 pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE);
1421 if (unlikely(dma_mapping_error(dev, pa))) {
1422 wil_err(wil, "TSO: Skb head DMA map error\n");
1426 wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index);
1427 wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4,
1428 tcp_hdr_len, skb_net_hdr_len);
1429 wil_tx_last_desc(hdr_desc);
1431 vring->ctx[i].mapped_as = wil_mapped_as_single;
1432 hdr_ctx = &vring->ctx[i];
1435 headlen = skb_headlen(skb) - hdrlen;
1437 for (f = headlen ? -1 : 0; f < nr_frags; f++) {
1440 wil_dbg_txrx(wil, "TSO: process skb head, len %u\n",
1443 frag = &skb_shinfo(skb)->frags[f];
1445 wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len);
1450 "TSO: len %d, rem_data %d, descs_used %d\n",
1451 len, rem_data, descs_used);
1453 if (descs_used == avail) {
1454 wil_err_ratelimited(wil, "TSO: ring overflow\n");
1459 lenmss = min_t(int, rem_data, len);
1460 i = (swhead + descs_used) % vring->size;
1461 wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i);
1464 pa = skb_frag_dma_map(dev, frag,
1465 frag->size - len, lenmss,
1467 vring->ctx[i].mapped_as = wil_mapped_as_page;
1469 pa = dma_map_single(dev,
1471 skb_headlen(skb) - headlen,
1474 vring->ctx[i].mapped_as = wil_mapped_as_single;
1478 if (unlikely(dma_mapping_error(dev, pa))) {
1479 wil_err(wil, "TSO: DMA map page error\n");
1483 _desc = &vring->va[i].tx;
1486 _first_desc = _desc;
1487 first_ctx = &vring->ctx[i];
1493 wil_tx_desc_map(d, pa, lenmss, vring_index);
1494 wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type,
1495 is_ipv4, tcp_hdr_len,
1498 /* use tso_type_first only once */
1499 desc_tso_type = wil_tso_type_mid;
1501 descs_used++; /* desc used so far */
1502 sg_desc_cnt++; /* desc used for this segment */
1507 "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n",
1508 len, rem_data, descs_used, sg_desc_cnt);
1510 /* Close the segment if reached mss size or last frag*/
1511 if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) {
1512 if (hdr_compensation_need) {
1513 /* first segment include hdr desc for
1516 hdr_ctx->nr_frags = sg_desc_cnt;
1517 wil_tx_desc_set_nr_frags(first_desc,
1520 hdr_compensation_need = false;
1522 wil_tx_desc_set_nr_frags(first_desc,
1525 first_ctx->nr_frags = sg_desc_cnt - 1;
1527 wil_tx_last_desc(d);
1529 /* first descriptor may also be the last
1530 * for this mss - make sure not to copy
1533 if (first_desc != d)
1534 *_first_desc = *first_desc;
1536 /*last descriptor will be copied at the end
1537 * of this TS processing
1539 if (f < nr_frags - 1 || len > 0)
1545 } else if (first_desc != d) /* update mid descriptor */
1550 /* first descriptor may also be the last.
1551 * in this case d pointer is invalid
1553 if (_first_desc == _desc)
1556 /* Last data descriptor */
1557 wil_set_tx_desc_last_tso(d);
1560 /* Fill the total number of descriptors in first desc (hdr)*/
1561 wil_tx_desc_set_nr_frags(hdr_desc, descs_used);
1562 *_hdr_desc = *hdr_desc;
1564 /* hold reference to skb
1565 * to prevent skb release before accounting
1566 * in case of immediate "tx done"
1568 vring->ctx[i].skb = skb_get(skb);
1570 /* performance monitoring */
1571 used = wil_vring_used_tx(vring);
1572 if (wil_val_in_range(vring_idle_trsh,
1573 used, used + descs_used)) {
1574 txdata->idle += get_cycles() - txdata->last_idle;
1575 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n",
1576 vring_index, used, used + descs_used);
1579 /* Make sure to advance the head only after descriptor update is done.
1580 * This will prevent a race condition where the completion thread
1581 * will see the DU bit set from previous run and will handle the
1582 * skb before it was completed.
1586 /* advance swhead */
1587 wil_vring_advance_head(vring, descs_used);
1588 wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead);
1590 /* make sure all writes to descriptors (shared memory) are done before
1591 * committing them to HW
1595 wil_w(wil, vring->hwtail, vring->swhead);
1599 while (descs_used > 0) {
1600 struct wil_ctx *ctx;
1602 i = (swhead + descs_used - 1) % vring->size;
1603 d = (struct vring_tx_desc *)&vring->va[i].tx;
1604 _desc = &vring->va[i].tx;
1606 _desc->dma.status = TX_DMA_STATUS_DU;
1607 ctx = &vring->ctx[i];
1608 wil_txdesc_unmap(dev, d, ctx);
1609 memset(ctx, 0, sizeof(*ctx));
1616 static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
1617 struct sk_buff *skb)
1619 struct device *dev = wil_to_dev(wil);
1620 struct vring_tx_desc dd, *d = ⅆ
1621 volatile struct vring_tx_desc *_d;
1622 u32 swhead = vring->swhead;
1623 int avail = wil_vring_avail_tx(vring);
1624 int nr_frags = skb_shinfo(skb)->nr_frags;
1626 int vring_index = vring - wil->vring_tx;
1627 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
1631 bool mcast = (vring_index == wil->bcast_vring);
1632 uint len = skb_headlen(skb);
1634 wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n",
1635 __func__, skb->len, vring_index);
1637 if (unlikely(!txdata->enabled))
1640 if (unlikely(avail < 1 + nr_frags)) {
1641 wil_err_ratelimited(wil,
1642 "Tx ring[%2d] full. No space for %d fragments\n",
1643 vring_index, 1 + nr_frags);
1646 _d = &vring->va[i].tx;
1648 pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1650 wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index,
1651 skb_headlen(skb), skb->data, &pa);
1652 wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1,
1653 skb->data, skb_headlen(skb), false);
1655 if (unlikely(dma_mapping_error(dev, pa)))
1657 vring->ctx[i].mapped_as = wil_mapped_as_single;
1659 wil_tx_desc_map(d, pa, len, vring_index);
1660 if (unlikely(mcast)) {
1661 d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */
1662 if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */
1663 d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS);
1665 /* Process TCP/UDP checksum offloading */
1666 if (unlikely(wil_tx_desc_offload_setup(d, skb))) {
1667 wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n",
1672 vring->ctx[i].nr_frags = nr_frags;
1673 wil_tx_desc_set_nr_frags(d, nr_frags + 1);
1675 /* middle segments */
1676 for (; f < nr_frags; f++) {
1677 const struct skb_frag_struct *frag =
1678 &skb_shinfo(skb)->frags[f];
1679 int len = skb_frag_size(frag);
1682 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i);
1683 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4,
1684 (const void *)d, sizeof(*d), false);
1685 i = (swhead + f + 1) % vring->size;
1686 _d = &vring->va[i].tx;
1687 pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag),
1689 if (unlikely(dma_mapping_error(dev, pa))) {
1690 wil_err(wil, "Tx[%2d] failed to map fragment\n",
1694 vring->ctx[i].mapped_as = wil_mapped_as_page;
1695 wil_tx_desc_map(d, pa, len, vring_index);
1696 /* no need to check return code -
1697 * if it succeeded for 1-st descriptor,
1698 * it will succeed here too
1700 wil_tx_desc_offload_setup(d, skb);
1702 /* for the last seg only */
1703 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS);
1704 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS);
1705 d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
1707 wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i);
1708 wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4,
1709 (const void *)d, sizeof(*d), false);
1711 /* hold reference to skb
1712 * to prevent skb release before accounting
1713 * in case of immediate "tx done"
1715 vring->ctx[i].skb = skb_get(skb);
1717 /* performance monitoring */
1718 used = wil_vring_used_tx(vring);
1719 if (wil_val_in_range(vring_idle_trsh,
1720 used, used + nr_frags + 1)) {
1721 txdata->idle += get_cycles() - txdata->last_idle;
1722 wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n",
1723 vring_index, used, used + nr_frags + 1);
1726 /* Make sure to advance the head only after descriptor update is done.
1727 * This will prevent a race condition where the completion thread
1728 * will see the DU bit set from previous run and will handle the
1729 * skb before it was completed.
1733 /* advance swhead */
1734 wil_vring_advance_head(vring, nr_frags + 1);
1735 wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead,
1737 trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags);
1739 /* make sure all writes to descriptors (shared memory) are done before
1740 * committing them to HW
1744 wil_w(wil, vring->hwtail, vring->swhead);
1748 /* unmap what we have mapped */
1749 nr_frags = f + 1; /* frags mapped + one for skb head */
1750 for (f = 0; f < nr_frags; f++) {
1751 struct wil_ctx *ctx;
1753 i = (swhead + f) % vring->size;
1754 ctx = &vring->ctx[i];
1755 _d = &vring->va[i].tx;
1757 _d->dma.status = TX_DMA_STATUS_DU;
1758 wil_txdesc_unmap(dev, d, ctx);
1760 memset(ctx, 0, sizeof(*ctx));
1766 static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
1767 struct sk_buff *skb)
1769 int vring_index = vring - wil->vring_tx;
1770 struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
1773 spin_lock(&txdata->lock);
1775 rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring)
1778 spin_unlock(&txdata->lock);
1783 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1785 struct wil6210_priv *wil = ndev_to_wil(ndev);
1786 struct ethhdr *eth = (void *)skb->data;
1787 bool bcast = is_multicast_ether_addr(eth->h_dest);
1788 struct vring *vring;
1789 static bool pr_once_fw;
1792 wil_dbg_txrx(wil, "%s()\n", __func__);
1793 if (unlikely(!test_bit(wil_status_fwready, wil->status))) {
1795 wil_err(wil, "FW not ready\n");
1800 if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) {
1801 wil_dbg_ratelimited(wil, "FW not connected, packet dropped\n");
1804 if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) {
1805 wil_err(wil, "Xmit in monitor mode not supported\n");
1811 if (wil->wdev->iftype == NL80211_IFTYPE_STATION) {
1812 /* in STA mode (ESS), all to same VRING */
1813 vring = wil_find_tx_vring_sta(wil, skb);
1814 } else { /* direct communication, find matching VRING */
1815 vring = bcast ? wil_find_tx_bcast(wil, skb) :
1816 wil_find_tx_ucast(wil, skb);
1818 if (unlikely(!vring)) {
1819 wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest);
1822 /* set up vring entry */
1823 rc = wil_tx_vring(wil, vring, skb);
1825 /* do we still have enough room in the vring? */
1826 if (unlikely(wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring))) {
1827 netif_tx_stop_all_queues(wil_to_ndev(wil));
1828 wil_dbg_txrx(wil, "netif_tx_stop : ring full\n");
1833 /* statistics will be updated on the tx_complete */
1834 dev_kfree_skb_any(skb);
1835 return NETDEV_TX_OK;
1837 return NETDEV_TX_BUSY;
1839 break; /* goto drop; */
1842 ndev->stats.tx_dropped++;
1843 dev_kfree_skb_any(skb);
1845 return NET_XMIT_DROP;
1848 static inline bool wil_need_txstat(struct sk_buff *skb)
1850 struct ethhdr *eth = (void *)skb->data;
1852 return is_unicast_ether_addr(eth->h_dest) && skb->sk &&
1853 (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS);
1856 static inline void wil_consume_skb(struct sk_buff *skb, bool acked)
1858 if (unlikely(wil_need_txstat(skb)))
1859 skb_complete_wifi_ack(skb, acked);
1861 acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb);
1865 * Clean up transmitted skb's from the Tx VRING
1867 * Return number of descriptors cleared
1869 * Safe to call from IRQ
1871 int wil_tx_complete(struct wil6210_priv *wil, int ringid)
1873 struct net_device *ndev = wil_to_ndev(wil);
1874 struct device *dev = wil_to_dev(wil);
1875 struct vring *vring = &wil->vring_tx[ringid];
1876 struct vring_tx_data *txdata = &wil->vring_tx_data[ringid];
1878 int cid = wil->vring2cid_tid[ringid][0];
1879 struct wil_net_stats *stats = NULL;
1880 volatile struct vring_tx_desc *_d;
1881 int used_before_complete;
1884 if (unlikely(!vring->va)) {
1885 wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid);
1889 if (unlikely(!txdata->enabled)) {
1890 wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid);
1894 wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid);
1896 used_before_complete = wil_vring_used_tx(vring);
1898 if (cid < WIL6210_MAX_CID)
1899 stats = &wil->sta[cid].stats;
1901 while (!wil_vring_is_empty(vring)) {
1903 struct wil_ctx *ctx = &vring->ctx[vring->swtail];
1905 * For the fragmented skb, HW will set DU bit only for the
1906 * last fragment. look for it.
1907 * In TSO the first DU will include hdr desc
1909 int lf = (vring->swtail + ctx->nr_frags) % vring->size;
1910 /* TODO: check we are not past head */
1912 _d = &vring->va[lf].tx;
1913 if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU)))
1916 new_swtail = (lf + 1) % vring->size;
1917 while (vring->swtail != new_swtail) {
1918 struct vring_tx_desc dd, *d = ⅆ
1920 struct sk_buff *skb;
1922 ctx = &vring->ctx[vring->swtail];
1924 _d = &vring->va[vring->swtail].tx;
1928 dmalen = le16_to_cpu(d->dma.length);
1929 trace_wil6210_tx_done(ringid, vring->swtail, dmalen,
1932 "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n",
1933 ringid, vring->swtail, dmalen,
1934 d->dma.status, d->dma.error);
1935 wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4,
1936 (const void *)d, sizeof(*d), false);
1938 wil_txdesc_unmap(dev, d, ctx);
1941 if (likely(d->dma.error == 0)) {
1942 ndev->stats.tx_packets++;
1943 ndev->stats.tx_bytes += skb->len;
1945 stats->tx_packets++;
1946 stats->tx_bytes += skb->len;
1949 ndev->stats.tx_errors++;
1953 wil_consume_skb(skb, d->dma.error == 0);
1955 memset(ctx, 0, sizeof(*ctx));
1956 /* Make sure the ctx is zeroed before updating the tail
1957 * to prevent a case where wil_tx_vring will see
1958 * this descriptor as used and handle it before ctx zero
1962 /* There is no need to touch HW descriptor:
1963 * - ststus bit TX_DMA_STATUS_DU is set by design,
1964 * so hardware will not try to process this desc.,
1965 * - rest of descriptor will be initialized on Tx.
1967 vring->swtail = wil_vring_next_tail(vring);
1972 /* performance monitoring */
1973 used_new = wil_vring_used_tx(vring);
1974 if (wil_val_in_range(vring_idle_trsh,
1975 used_new, used_before_complete)) {
1976 wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n",
1977 ringid, used_before_complete, used_new);
1978 txdata->last_idle = get_cycles();
1981 if (wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring)) {
1982 wil_dbg_txrx(wil, "netif_tx_wake : ring not full\n");
1983 netif_tx_wake_all_queues(wil_to_ndev(wil));