2 * w1_ds28e17.c - w1 family 19 (DS28E17) driver
4 * Copyright (c) 2016 Jan Kandziora <jjj@gmx.de>
6 * This source code is licensed under the GNU General Public License,
7 * Version 2. See the file COPYING for more details.
10 #include <linux/crc16.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/i2c.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/uaccess.h>
25 #define W1_FAMILY_DS28E17 0x19
28 MODULE_LICENSE("GPL v2");
29 MODULE_AUTHOR("Jan Kandziora <jjj@gmx.de>");
30 MODULE_DESCRIPTION("w1 family 19 driver for DS28E17, 1-wire to I2C master bridge");
31 MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS28E17));
34 /* Default I2C speed to be set when a DS28E17 is detected. */
35 static int i2c_speed = 100;
36 module_param_named(speed, i2c_speed, int, (S_IRUSR | S_IWUSR));
37 MODULE_PARM_DESC(speed, "Default I2C speed to be set when a DS28E17 is detected");
39 /* Default I2C stretch value to be set when a DS28E17 is detected. */
40 static char i2c_stretch = 1;
41 module_param_named(stretch, i2c_stretch, byte, (S_IRUSR | S_IWUSR));
42 MODULE_PARM_DESC(stretch, "Default I2C stretch value to be set when a DS28E17 is detected");
44 /* DS28E17 device command codes. */
45 #define W1_F19_WRITE_DATA_WITH_STOP 0x4B
46 #define W1_F19_WRITE_DATA_NO_STOP 0x5A
47 #define W1_F19_WRITE_DATA_ONLY 0x69
48 #define W1_F19_WRITE_DATA_ONLY_WITH_STOP 0x78
49 #define W1_F19_READ_DATA_WITH_STOP 0x87
50 #define W1_F19_WRITE_READ_DATA_WITH_STOP 0x2D
51 #define W1_F19_WRITE_CONFIGURATION 0xD2
52 #define W1_F19_READ_CONFIGURATION 0xE1
53 #define W1_F19_ENABLE_SLEEP_MODE 0x1E
54 #define W1_F19_READ_DEVICE_REVISION 0xC4
56 /* DS28E17 status bits */
57 #define W1_F19_STATUS_CRC 0x01
58 #define W1_F19_STATUS_ADDRESS 0x02
59 #define W1_F19_STATUS_START 0x08
62 * Maximum number of I2C bytes to transfer within one CRC16 protected onewire
65 #define W1_F19_WRITE_DATA_LIMIT 255
67 /* Maximum number of I2C bytes to read with one onewire command. */
68 #define W1_F19_READ_DATA_LIMIT 255
70 /* Constants for calculating the busy sleep. */
71 #define W1_F19_BUSY_TIMEBASES { 90, 23, 10 }
72 #define W1_F19_BUSY_GRATUITY 1000
74 /* Number of checks for the busy flag before timeout. */
75 #define W1_F19_BUSY_CHECKS 1000
78 /* Slave specific data. */
82 struct i2c_adapter adapter;
86 /* Wait a while until the busy flag clears. */
87 static int w1_f19_i2c_busy_wait(struct w1_slave *sl, size_t count)
89 const unsigned long timebases[3] = W1_F19_BUSY_TIMEBASES;
90 struct w1_f19_data *data = sl->family_data;
93 /* Check the busy flag first in any case.*/
94 if (w1_touch_bit(sl->master, 1) == 0)
98 * Do a generously long sleep in the beginning,
99 * as we have to wait at least this time for all
100 * the I2C bytes at the given speed to be transferred.
102 usleep_range(timebases[data->speed] * (data->stretch) * count,
103 timebases[data->speed] * (data->stretch) * count
104 + W1_F19_BUSY_GRATUITY);
106 /* Now continusly check the busy flag sent by the DS28E17. */
107 checks = W1_F19_BUSY_CHECKS;
108 while ((checks--) > 0) {
109 /* Return success if the busy flag is cleared. */
110 if (w1_touch_bit(sl->master, 1) == 0)
113 /* Wait one non-streched byte timeslot. */
114 udelay(timebases[data->speed]);
118 dev_warn(&sl->dev, "busy timeout\n");
123 /* Utility function: result. */
124 static size_t w1_f19_error(struct w1_slave *sl, u8 w1_buf[])
127 if (w1_buf[0] & W1_F19_STATUS_CRC)
128 dev_warn(&sl->dev, "crc16 mismatch\n");
129 if (w1_buf[0] & W1_F19_STATUS_ADDRESS)
130 dev_warn(&sl->dev, "i2c device not responding\n");
131 if ((w1_buf[0] & (W1_F19_STATUS_CRC | W1_F19_STATUS_ADDRESS)) == 0
133 dev_warn(&sl->dev, "i2c short write, %d bytes not acknowledged\n",
137 /* Check error conditions. */
138 if (w1_buf[0] & W1_F19_STATUS_ADDRESS)
140 if (w1_buf[0] & W1_F19_STATUS_START)
142 if (w1_buf[0] != 0 || w1_buf[1] != 0)
150 /* Utility function: write data to I2C slave, single chunk. */
151 static int __w1_f19_i2c_write(struct w1_slave *sl,
152 const u8 *command, size_t command_count,
153 const u8 *buffer, size_t count)
159 /* Send command and I2C data to DS28E17. */
160 crc = crc16(CRC16_INIT, command, command_count);
161 w1_write_block(sl->master, command, command_count);
164 crc = crc16(crc, w1_buf, 1);
165 w1_write_8(sl->master, w1_buf[0]);
167 crc = crc16(crc, buffer, count);
168 w1_write_block(sl->master, buffer, count);
170 w1_buf[0] = ~(crc & 0xFF);
171 w1_buf[1] = ~((crc >> 8) & 0xFF);
172 w1_write_block(sl->master, w1_buf, 2);
174 /* Wait until busy flag clears (or timeout). */
175 if (w1_f19_i2c_busy_wait(sl, count + 1) < 0)
178 /* Read status from DS28E17. */
179 w1_read_block(sl->master, w1_buf, 2);
181 /* Check error conditions. */
182 error = w1_f19_error(sl, w1_buf);
186 /* Return number of bytes written. */
191 /* Write data to I2C slave. */
192 static int w1_f19_i2c_write(struct w1_slave *sl, u16 i2c_address,
193 const u8 *buffer, size_t count, bool stop)
196 int remaining = count;
204 /* Check whether we need multiple commands. */
205 if (count <= W1_F19_WRITE_DATA_LIMIT) {
207 * Small data amount. Data can be sent with
208 * a single onewire command.
211 /* Send all data to DS28E17. */
212 command[0] = (stop ? W1_F19_WRITE_DATA_WITH_STOP
213 : W1_F19_WRITE_DATA_NO_STOP);
214 command[1] = i2c_address << 1;
215 result = __w1_f19_i2c_write(sl, command, 2, buffer, count);
217 /* Large data amount. Data has to be sent in multiple chunks. */
219 /* Send first chunk to DS28E17. */
221 command[0] = W1_F19_WRITE_DATA_NO_STOP;
222 command[1] = i2c_address << 1;
223 result = __w1_f19_i2c_write(sl, command, 2, p,
224 W1_F19_WRITE_DATA_LIMIT);
228 /* Resume to same DS28E17. */
229 if (w1_reset_resume_command(sl->master))
232 /* Next data chunk. */
233 p += W1_F19_WRITE_DATA_LIMIT;
234 remaining -= W1_F19_WRITE_DATA_LIMIT;
236 while (remaining > W1_F19_WRITE_DATA_LIMIT) {
237 /* Send intermediate chunk to DS28E17. */
238 command[0] = W1_F19_WRITE_DATA_ONLY;
239 result = __w1_f19_i2c_write(sl, command, 1, p,
240 W1_F19_WRITE_DATA_LIMIT);
244 /* Resume to same DS28E17. */
245 if (w1_reset_resume_command(sl->master))
248 /* Next data chunk. */
249 p += W1_F19_WRITE_DATA_LIMIT;
250 remaining -= W1_F19_WRITE_DATA_LIMIT;
253 /* Send final chunk to DS28E17. */
254 command[0] = (stop ? W1_F19_WRITE_DATA_ONLY_WITH_STOP
255 : W1_F19_WRITE_DATA_ONLY);
256 result = __w1_f19_i2c_write(sl, command, 1, p, remaining);
263 /* Read data from I2C slave. */
264 static int w1_f19_i2c_read(struct w1_slave *sl, u16 i2c_address,
265 u8 *buffer, size_t count)
275 /* Send command to DS28E17. */
276 w1_buf[0] = W1_F19_READ_DATA_WITH_STOP;
277 w1_buf[1] = i2c_address << 1 | 0x01;
279 crc = crc16(CRC16_INIT, w1_buf, 3);
280 w1_buf[3] = ~(crc & 0xFF);
281 w1_buf[4] = ~((crc >> 8) & 0xFF);
282 w1_write_block(sl->master, w1_buf, 5);
284 /* Wait until busy flag clears (or timeout). */
285 if (w1_f19_i2c_busy_wait(sl, count + 1) < 0)
288 /* Read status from DS28E17. */
289 w1_buf[0] = w1_read_8(sl->master);
292 /* Check error conditions. */
293 error = w1_f19_error(sl, w1_buf);
297 /* Read received I2C data from DS28E17. */
298 return w1_read_block(sl->master, buffer, count);
302 /* Write to, then read data from I2C slave. */
303 static int w1_f19_i2c_write_read(struct w1_slave *sl, u16 i2c_address,
304 const u8 *wbuffer, size_t wcount, u8 *rbuffer, size_t rcount)
311 if (wcount == 0 || rcount == 0)
314 /* Send command and I2C data to DS28E17. */
315 w1_buf[0] = W1_F19_WRITE_READ_DATA_WITH_STOP;
316 w1_buf[1] = i2c_address << 1;
318 crc = crc16(CRC16_INIT, w1_buf, 3);
319 w1_write_block(sl->master, w1_buf, 3);
321 crc = crc16(crc, wbuffer, wcount);
322 w1_write_block(sl->master, wbuffer, wcount);
325 crc = crc16(crc, w1_buf, 1);
326 w1_buf[1] = ~(crc & 0xFF);
327 w1_buf[2] = ~((crc >> 8) & 0xFF);
328 w1_write_block(sl->master, w1_buf, 3);
330 /* Wait until busy flag clears (or timeout). */
331 if (w1_f19_i2c_busy_wait(sl, wcount + rcount + 2) < 0)
334 /* Read status from DS28E17. */
335 w1_read_block(sl->master, w1_buf, 2);
337 /* Check error conditions. */
338 error = w1_f19_error(sl, w1_buf);
342 /* Read received I2C data from DS28E17. */
343 return w1_read_block(sl->master, rbuffer, rcount);
347 /* Do an I2C master transfer. */
348 static int w1_f19_i2c_master_transfer(struct i2c_adapter *adapter,
349 struct i2c_msg *msgs, int num)
351 struct w1_slave *sl = (struct w1_slave *) adapter->algo_data;
355 /* Start onewire transaction. */
356 mutex_lock(&sl->master->bus_mutex);
358 /* Select DS28E17. */
359 if (w1_reset_select_slave(sl)) {
364 /* Loop while there are still messages to transfer. */
367 * Check for special case: Small write followed
368 * by read to same I2C device.
371 && msgs[i].addr == msgs[i+1].addr
372 && !(msgs[i].flags & I2C_M_RD)
373 && (msgs[i+1].flags & I2C_M_RD)
374 && (msgs[i].len <= W1_F19_WRITE_DATA_LIMIT)) {
376 * The DS28E17 has a combined transfer
377 * for small write+read.
379 result = w1_f19_i2c_write_read(sl, msgs[i].addr,
380 msgs[i].buf, msgs[i].len,
381 msgs[i+1].buf, msgs[i+1].len);
388 * Check if we should interpret the read data
389 * as a length byte. The DS28E17 unfortunately
390 * has no read without stop, so we can just do
391 * another simple read in that case.
393 if (msgs[i+1].flags & I2C_M_RECV_LEN) {
394 result = w1_f19_i2c_read(sl, msgs[i+1].addr,
395 &(msgs[i+1].buf[1]), msgs[i+1].buf[0]);
402 /* Eat up read message, too. */
404 } else if (msgs[i].flags & I2C_M_RD) {
406 result = w1_f19_i2c_read(sl, msgs[i].addr,
407 msgs[i].buf, msgs[i].len);
414 * Check if we should interpret the read data
415 * as a length byte. The DS28E17 unfortunately
416 * has no read without stop, so we can just do
417 * another simple read in that case.
419 if (msgs[i].flags & I2C_M_RECV_LEN) {
420 result = w1_f19_i2c_read(sl,
432 * Stop condition only for last
435 result = w1_f19_i2c_write(sl,
449 /* Are there still messages to send/receive? */
451 /* Yes. Resume to same DS28E17. */
452 if (w1_reset_resume_command(sl->master)) {
460 /* End onewire transaction. */
461 mutex_unlock(&sl->master->bus_mutex);
463 /* Return number of messages processed or error. */
468 /* Get I2C adapter functionality. */
469 static u32 w1_f19_i2c_functionality(struct i2c_adapter *adapter)
472 * Plain I2C functions only.
473 * SMBus is emulated by the kernel's I2C layer.
474 * No "I2C_FUNC_SMBUS_QUICK"
475 * No "I2C_FUNC_SMBUS_READ_BLOCK_DATA"
476 * No "I2C_FUNC_SMBUS_BLOCK_PROC_CALL"
478 return I2C_FUNC_I2C |
479 I2C_FUNC_SMBUS_BYTE |
480 I2C_FUNC_SMBUS_BYTE_DATA |
481 I2C_FUNC_SMBUS_WORD_DATA |
482 I2C_FUNC_SMBUS_PROC_CALL |
483 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA |
484 I2C_FUNC_SMBUS_I2C_BLOCK |
489 /* I2C adapter quirks. */
490 static const struct i2c_adapter_quirks w1_f19_i2c_adapter_quirks = {
491 .max_read_len = W1_F19_READ_DATA_LIMIT,
495 static const struct i2c_algorithm w1_f19_i2c_algorithm = {
496 .master_xfer = w1_f19_i2c_master_transfer,
497 .functionality = w1_f19_i2c_functionality,
501 /* Read I2C speed from DS28E17. */
502 static int w1_f19_get_i2c_speed(struct w1_slave *sl)
504 struct w1_f19_data *data = sl->family_data;
507 /* Start onewire transaction. */
508 mutex_lock(&sl->master->bus_mutex);
511 if (w1_reset_select_slave(sl))
514 /* Read slave configuration byte. */
515 w1_write_8(sl->master, W1_F19_READ_CONFIGURATION);
516 result = w1_read_8(sl->master);
517 if (result < 0 || result > 2) {
522 /* Update speed in slave specific data. */
523 data->speed = result;
526 /* End onewire transaction. */
527 mutex_unlock(&sl->master->bus_mutex);
533 /* Set I2C speed on DS28E17. */
534 static int __w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed)
536 struct w1_f19_data *data = sl->family_data;
537 const int i2c_speeds[3] = { 100, 400, 900 };
541 if (w1_reset_select_slave(sl))
544 w1_buf[0] = W1_F19_WRITE_CONFIGURATION;
546 w1_write_block(sl->master, w1_buf, 2);
548 /* Update speed in slave specific data. */
551 dev_info(&sl->dev, "i2c speed set to %d kBaud\n", i2c_speeds[speed]);
556 static int w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed)
560 /* Start onewire transaction. */
561 mutex_lock(&sl->master->bus_mutex);
563 /* Set I2C speed on DS28E17. */
564 result = __w1_f19_set_i2c_speed(sl, speed);
566 /* End onewire transaction. */
567 mutex_unlock(&sl->master->bus_mutex);
573 /* Sysfs attributes. */
575 /* I2C speed attribute for a single chip. */
576 static ssize_t speed_show(struct device *dev, struct device_attribute *attr,
579 struct w1_slave *sl = dev_to_w1_slave(dev);
582 /* Read current speed from slave. Updates data->speed. */
583 result = w1_f19_get_i2c_speed(sl);
587 /* Return current speed value. */
588 return sprintf(buf, "%d\n", result);
591 static ssize_t speed_store(struct device *dev, struct device_attribute *attr,
592 const char *buf, size_t count)
594 struct w1_slave *sl = dev_to_w1_slave(dev);
597 /* Valid values are: "100", "400", "900" */
598 if (count < 3 || count > 4 || !buf)
600 if (count == 4 && buf[3] != '\n')
602 if (buf[1] != '0' || buf[2] != '0')
605 /* Set speed on slave. */
608 error = w1_f19_set_i2c_speed(sl, 0);
611 error = w1_f19_set_i2c_speed(sl, 1);
614 error = w1_f19_set_i2c_speed(sl, 2);
623 /* Return bytes written. */
627 static DEVICE_ATTR_RW(speed);
630 /* Busy stretch attribute for a single chip. */
631 static ssize_t stretch_show(struct device *dev, struct device_attribute *attr,
634 struct w1_slave *sl = dev_to_w1_slave(dev);
635 struct w1_f19_data *data = sl->family_data;
637 /* Return current stretch value. */
638 return sprintf(buf, "%d\n", data->stretch);
641 static ssize_t stretch_store(struct device *dev, struct device_attribute *attr,
642 const char *buf, size_t count)
644 struct w1_slave *sl = dev_to_w1_slave(dev);
645 struct w1_f19_data *data = sl->family_data;
647 /* Valid values are '1' to '9' */
648 if (count < 1 || count > 2 || !buf)
650 if (count == 2 && buf[1] != '\n')
652 if (buf[0] < '1' || buf[0] > '9')
655 /* Set busy stretch value. */
656 data->stretch = buf[0] & 0x0F;
658 /* Return bytes written. */
662 static DEVICE_ATTR_RW(stretch);
665 /* All attributes. */
666 static struct attribute *w1_f19_attrs[] = {
667 &dev_attr_speed.attr,
668 &dev_attr_stretch.attr,
672 static const struct attribute_group w1_f19_group = {
673 .attrs = w1_f19_attrs,
676 static const struct attribute_group *w1_f19_groups[] = {
682 /* Slave add and remove functions. */
683 static int w1_f19_add_slave(struct w1_slave *sl)
685 struct w1_f19_data *data = NULL;
687 /* Allocate memory for slave specific data. */
688 data = devm_kzalloc(&sl->dev, sizeof(*data), GFP_KERNEL);
691 sl->family_data = data;
693 /* Setup default I2C speed on slave. */
696 __w1_f19_set_i2c_speed(sl, 0);
699 __w1_f19_set_i2c_speed(sl, 1);
702 __w1_f19_set_i2c_speed(sl, 2);
706 * A i2c_speed module parameter of anything else
707 * than 100, 400, 900 means not to touch the
708 * speed of the DS28E17.
709 * We assume 400kBaud, the power-on value.
715 * Setup default busy stretch
716 * configuration for the DS28E17.
718 data->stretch = i2c_stretch;
720 /* Setup I2C adapter. */
721 data->adapter.owner = THIS_MODULE;
722 data->adapter.algo = &w1_f19_i2c_algorithm;
723 data->adapter.algo_data = sl;
724 strcpy(data->adapter.name, "w1-");
725 strcat(data->adapter.name, sl->name);
726 data->adapter.dev.parent = &sl->dev;
727 data->adapter.quirks = &w1_f19_i2c_adapter_quirks;
729 return i2c_add_adapter(&data->adapter);
732 static void w1_f19_remove_slave(struct w1_slave *sl)
734 struct w1_f19_data *family_data = sl->family_data;
736 /* Delete I2C adapter. */
737 i2c_del_adapter(&family_data->adapter);
739 /* Free slave specific data. */
740 devm_kfree(&sl->dev, family_data);
741 sl->family_data = NULL;
745 /* Declarations within the w1 subsystem. */
746 static struct w1_family_ops w1_f19_fops = {
747 .add_slave = w1_f19_add_slave,
748 .remove_slave = w1_f19_remove_slave,
749 .groups = w1_f19_groups,
752 static struct w1_family w1_family_19 = {
753 .fid = W1_FAMILY_DS28E17,
754 .fops = &w1_f19_fops,
758 /* Module init and remove functions. */
759 static int __init w1_f19_init(void)
761 return w1_register_family(&w1_family_19);
764 static void __exit w1_f19_fini(void)
766 w1_unregister_family(&w1_family_19);
769 module_init(w1_f19_init);
770 module_exit(w1_f19_fini);