1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2012
5 * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
6 * Roger Nilsson <roger.xr.nilsson@stericsson.com>
10 #include <linux/module.h>
11 #include <linux/slab.h>
12 #include <linux/bitops.h>
13 #include <linux/platform_device.h>
14 #include <linux/clk.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/mfd/dbx500-prcmu.h>
18 #include <linux/platform_data/asoc-ux500-msp.h>
20 #include <sound/soc.h>
21 #include <sound/soc-dai.h>
22 #include <sound/dmaengine_pcm.h>
24 #include "ux500_msp_i2s.h"
25 #include "ux500_msp_dai.h"
26 #include "ux500_pcm.h"
28 static int setup_pcm_multichan(struct snd_soc_dai *dai,
29 struct ux500_msp_config *msp_config)
31 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
32 struct msp_multichannel_config *multi =
33 &msp_config->multichannel_config;
35 if (drvdata->slots > 1) {
36 msp_config->multichannel_configured = 1;
38 multi->tx_multichannel_enable = true;
39 multi->rx_multichannel_enable = true;
40 multi->rx_comparison_enable_mode = MSP_COMPARISON_DISABLED;
42 multi->tx_channel_0_enable = drvdata->tx_mask;
43 multi->tx_channel_1_enable = 0;
44 multi->tx_channel_2_enable = 0;
45 multi->tx_channel_3_enable = 0;
47 multi->rx_channel_0_enable = drvdata->rx_mask;
48 multi->rx_channel_1_enable = 0;
49 multi->rx_channel_2_enable = 0;
50 multi->rx_channel_3_enable = 0;
53 "%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
54 __func__, drvdata->slots, multi->tx_channel_0_enable,
55 multi->rx_channel_0_enable);
61 static int setup_frameper(struct snd_soc_dai *dai, unsigned int rate,
62 struct msp_protdesc *prot_desc)
64 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
66 switch (drvdata->slots) {
70 prot_desc->frame_period =
71 FRAME_PER_SINGLE_SLOT_8_KHZ;
75 prot_desc->frame_period =
76 FRAME_PER_SINGLE_SLOT_16_KHZ;
80 prot_desc->frame_period =
81 FRAME_PER_SINGLE_SLOT_44_1_KHZ;
85 prot_desc->frame_period =
86 FRAME_PER_SINGLE_SLOT_48_KHZ;
91 "%s: Error: Unsupported sample-rate (freq = %d)!\n",
98 prot_desc->frame_period = FRAME_PER_2_SLOTS;
102 prot_desc->frame_period = FRAME_PER_8_SLOTS;
106 prot_desc->frame_period = FRAME_PER_16_SLOTS;
110 "%s: Error: Unsupported slot-count (slots = %d)!\n",
111 __func__, drvdata->slots);
115 prot_desc->clocks_per_frame =
116 prot_desc->frame_period+1;
118 dev_dbg(dai->dev, "%s: Clocks per frame: %u\n",
120 prot_desc->clocks_per_frame);
125 static int setup_pcm_framing(struct snd_soc_dai *dai, unsigned int rate,
126 struct msp_protdesc *prot_desc)
128 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
130 u32 frame_length = MSP_FRAME_LEN_1;
132 prot_desc->frame_width = 0;
134 switch (drvdata->slots) {
136 frame_length = MSP_FRAME_LEN_1;
140 frame_length = MSP_FRAME_LEN_2;
144 frame_length = MSP_FRAME_LEN_8;
148 frame_length = MSP_FRAME_LEN_16;
152 "%s: Error: Unsupported slot-count (slots = %d)!\n",
153 __func__, drvdata->slots);
157 prot_desc->tx_frame_len_1 = frame_length;
158 prot_desc->rx_frame_len_1 = frame_length;
159 prot_desc->tx_frame_len_2 = frame_length;
160 prot_desc->rx_frame_len_2 = frame_length;
162 prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
163 prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
164 prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
165 prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
167 return setup_frameper(dai, rate, prot_desc);
170 static int setup_clocking(struct snd_soc_dai *dai,
172 struct ux500_msp_config *msp_config)
174 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
175 case SND_SOC_DAIFMT_NB_NF:
178 case SND_SOC_DAIFMT_NB_IF:
179 msp_config->tx_fsync_pol ^= 1 << TFSPOL_SHIFT;
180 msp_config->rx_fsync_pol ^= 1 << RFSPOL_SHIFT;
186 "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
192 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
193 case SND_SOC_DAIFMT_BC_FC:
194 dev_dbg(dai->dev, "%s: Codec is master.\n", __func__);
196 msp_config->iodelay = 0x20;
197 msp_config->rx_fsync_sel = 0;
198 msp_config->tx_fsync_sel = 1 << TFSSEL_SHIFT;
199 msp_config->tx_clk_sel = 0;
200 msp_config->rx_clk_sel = 0;
201 msp_config->srg_clk_sel = 0x2 << SCKSEL_SHIFT;
205 case SND_SOC_DAIFMT_BP_FP:
206 dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__);
208 msp_config->tx_clk_sel = TX_CLK_SEL_SRG;
209 msp_config->tx_fsync_sel = TX_SYNC_SRG_PROG;
210 msp_config->rx_clk_sel = RX_CLK_SEL_SRG;
211 msp_config->rx_fsync_sel = RX_SYNC_SRG;
212 msp_config->srg_clk_sel = 1 << SCKSEL_SHIFT;
217 dev_err(dai->dev, "%s: Error: Unsupported master (fmt = 0x%x)!\n",
226 static int setup_pcm_protdesc(struct snd_soc_dai *dai,
228 struct msp_protdesc *prot_desc)
230 prot_desc->rx_phase_mode = MSP_SINGLE_PHASE;
231 prot_desc->tx_phase_mode = MSP_SINGLE_PHASE;
232 prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
233 prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
234 prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
235 prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
236 prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI);
237 prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_HI << RFSPOL_SHIFT;
239 if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_DSP_A) {
240 dev_dbg(dai->dev, "%s: DSP_A.\n", __func__);
241 prot_desc->rx_clk_pol = MSP_RISING_EDGE;
242 prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
244 prot_desc->rx_data_delay = MSP_DELAY_1;
245 prot_desc->tx_data_delay = MSP_DELAY_1;
247 dev_dbg(dai->dev, "%s: DSP_B.\n", __func__);
248 prot_desc->rx_clk_pol = MSP_FALLING_EDGE;
249 prot_desc->tx_clk_pol = MSP_RISING_EDGE;
251 prot_desc->rx_data_delay = MSP_DELAY_0;
252 prot_desc->tx_data_delay = MSP_DELAY_0;
255 prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
256 prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
257 prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
258 prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
259 prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
264 static int setup_i2s_protdesc(struct msp_protdesc *prot_desc)
266 prot_desc->rx_phase_mode = MSP_DUAL_PHASE;
267 prot_desc->tx_phase_mode = MSP_DUAL_PHASE;
268 prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
269 prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
270 prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
271 prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
272 prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO);
273 prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_LO << RFSPOL_SHIFT;
275 prot_desc->rx_frame_len_1 = MSP_FRAME_LEN_1;
276 prot_desc->rx_frame_len_2 = MSP_FRAME_LEN_1;
277 prot_desc->tx_frame_len_1 = MSP_FRAME_LEN_1;
278 prot_desc->tx_frame_len_2 = MSP_FRAME_LEN_1;
279 prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
280 prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
281 prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
282 prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
284 prot_desc->rx_clk_pol = MSP_RISING_EDGE;
285 prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
287 prot_desc->rx_data_delay = MSP_DELAY_0;
288 prot_desc->tx_data_delay = MSP_DELAY_0;
290 prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
291 prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
292 prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
293 prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
294 prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
299 static int setup_msp_config(struct snd_pcm_substream *substream,
300 struct snd_soc_dai *dai,
301 struct ux500_msp_config *msp_config)
303 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
304 struct msp_protdesc *prot_desc = &msp_config->protdesc;
305 struct snd_pcm_runtime *runtime = substream->runtime;
306 unsigned int fmt = drvdata->fmt;
309 memset(msp_config, 0, sizeof(*msp_config));
311 msp_config->f_inputclk = drvdata->master_clk;
313 msp_config->tx_fifo_config = TX_FIFO_ENABLE;
314 msp_config->rx_fifo_config = RX_FIFO_ENABLE;
315 msp_config->def_elem_len = 1;
316 msp_config->direction = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
317 MSP_DIR_TX : MSP_DIR_RX;
318 msp_config->data_size = MSP_DATA_BITS_32;
319 msp_config->frame_freq = runtime->rate;
321 dev_dbg(dai->dev, "%s: f_inputclk = %u, frame_freq = %u.\n",
322 __func__, msp_config->f_inputclk, msp_config->frame_freq);
323 /* To avoid division by zero */
324 prot_desc->clocks_per_frame = 1;
326 dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__,
327 runtime->rate, runtime->channels);
329 (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
330 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
331 dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
333 msp_config->default_protdesc = 1;
334 msp_config->protocol = MSP_I2S_PROTOCOL;
337 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
338 dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
340 msp_config->data_size = MSP_DATA_BITS_16;
341 msp_config->protocol = MSP_I2S_PROTOCOL;
343 ret = setup_i2s_protdesc(prot_desc);
349 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
350 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
351 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
352 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
353 dev_dbg(dai->dev, "%s: PCM format.\n", __func__);
355 msp_config->data_size = MSP_DATA_BITS_16;
356 msp_config->protocol = MSP_PCM_PROTOCOL;
358 ret = setup_pcm_protdesc(dai, fmt, prot_desc);
362 ret = setup_pcm_multichan(dai, msp_config);
366 ret = setup_pcm_framing(dai, runtime->rate, prot_desc);
373 dev_err(dai->dev, "%s: Error: Unsupported format (%d)!\n",
378 return setup_clocking(dai, fmt, msp_config);
381 static int ux500_msp_dai_startup(struct snd_pcm_substream *substream,
382 struct snd_soc_dai *dai)
385 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
387 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
388 snd_pcm_stream_str(substream));
390 /* Enable regulator */
391 ret = regulator_enable(drvdata->reg_vape);
393 dev_err(drvdata->msp->dev,
394 "%s: Failed to enable regulator!\n", __func__);
398 /* Prepare and enable clocks */
399 dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__);
400 ret = clk_prepare_enable(drvdata->pclk);
402 dev_err(drvdata->msp->dev,
403 "%s: Failed to prepare/enable pclk!\n", __func__);
407 ret = clk_prepare_enable(drvdata->clk);
409 dev_err(drvdata->msp->dev,
410 "%s: Failed to prepare/enable clk!\n", __func__);
416 clk_disable_unprepare(drvdata->pclk);
418 regulator_disable(drvdata->reg_vape);
422 static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream,
423 struct snd_soc_dai *dai)
426 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
427 bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
429 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
430 snd_pcm_stream_str(substream));
432 if (drvdata->vape_opp_constraint == 1) {
433 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
434 "ux500_msp_i2s", 50);
435 drvdata->vape_opp_constraint = 0;
438 if (ux500_msp_i2s_close(drvdata->msp,
439 is_playback ? MSP_DIR_TX : MSP_DIR_RX)) {
441 "%s: Error: MSP %d (%s): Unable to close i2s.\n",
442 __func__, dai->id, snd_pcm_stream_str(substream));
445 /* Disable and unprepare clocks */
446 clk_disable_unprepare(drvdata->clk);
447 clk_disable_unprepare(drvdata->pclk);
449 /* Disable regulator */
450 ret = regulator_disable(drvdata->reg_vape);
453 "%s: ERROR: Failed to disable regulator (%d)!\n",
457 static int ux500_msp_dai_prepare(struct snd_pcm_substream *substream,
458 struct snd_soc_dai *dai)
461 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
462 struct snd_pcm_runtime *runtime = substream->runtime;
463 struct ux500_msp_config msp_config;
465 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__,
466 dai->id, snd_pcm_stream_str(substream), runtime->rate);
468 setup_msp_config(substream, dai, &msp_config);
470 ret = ux500_msp_i2s_open(drvdata->msp, &msp_config);
472 dev_err(dai->dev, "%s: Error: msp_setup failed (ret = %d)!\n",
478 if ((drvdata->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) &&
479 (drvdata->msp->f_bitclk > 19200000)) {
480 /* If the bit-clock is higher than 19.2MHz, Vape should be
481 * run in 100% OPP. Only when bit-clock is used (MSP master)
483 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
484 "ux500-msp-i2s", 100);
485 drvdata->vape_opp_constraint = 1;
487 prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
488 "ux500-msp-i2s", 50);
489 drvdata->vape_opp_constraint = 0;
495 static int ux500_msp_dai_hw_params(struct snd_pcm_substream *substream,
496 struct snd_pcm_hw_params *params,
497 struct snd_soc_dai *dai)
499 unsigned int mask, slots_active;
500 struct snd_pcm_runtime *runtime = substream->runtime;
501 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
503 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n",
504 __func__, dai->id, snd_pcm_stream_str(substream));
506 switch (drvdata->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
507 case SND_SOC_DAIFMT_I2S:
508 snd_pcm_hw_constraint_minmax(runtime,
509 SNDRV_PCM_HW_PARAM_CHANNELS,
513 case SND_SOC_DAIFMT_DSP_B:
514 case SND_SOC_DAIFMT_DSP_A:
515 mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
519 slots_active = hweight32(mask);
520 dev_dbg(dai->dev, "TDM-slots active: %d", slots_active);
522 snd_pcm_hw_constraint_single(runtime,
523 SNDRV_PCM_HW_PARAM_CHANNELS,
529 "%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
530 __func__, drvdata->fmt);
537 static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai *dai,
540 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
542 dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id);
544 switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
545 SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
546 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
547 case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
548 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
549 case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
550 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
551 case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
556 "%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
557 __func__, drvdata->fmt);
561 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
562 case SND_SOC_DAIFMT_NB_NF:
563 case SND_SOC_DAIFMT_NB_IF:
564 case SND_SOC_DAIFMT_IB_IF:
569 "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
570 __func__, drvdata->fmt);
578 static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai *dai,
579 unsigned int tx_mask,
580 unsigned int rx_mask,
581 int slots, int slot_width)
583 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
600 dev_err(dai->dev, "%s: Error: Unsupported slot-count (%d)!\n",
604 drvdata->slots = slots;
606 if (!(slot_width == 16)) {
607 dev_err(dai->dev, "%s: Error: Unsupported slot-width (%d)!\n",
608 __func__, slot_width);
611 drvdata->slot_width = slot_width;
613 drvdata->tx_mask = tx_mask & cap;
614 drvdata->rx_mask = rx_mask & cap;
619 static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai *dai,
620 int clk_id, unsigned int freq, int dir)
622 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
624 dev_dbg(dai->dev, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
625 __func__, dai->id, clk_id, freq);
628 case UX500_MSP_MASTER_CLOCK:
629 drvdata->master_clk = freq;
633 dev_err(dai->dev, "%s: MSP %d: Invalid clk-id (%d)!\n",
634 __func__, dai->id, clk_id);
641 static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream,
642 int cmd, struct snd_soc_dai *dai)
645 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
647 dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
648 __func__, dai->id, snd_pcm_stream_str(substream),
649 (int)drvdata->msp->id, cmd);
651 ret = ux500_msp_i2s_trigger(drvdata->msp, cmd, substream->stream);
656 static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
658 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
659 struct snd_dmaengine_dai_dma_data *playback_dma_data;
660 struct snd_dmaengine_dai_dma_data *capture_dma_data;
662 playback_dma_data = devm_kzalloc(dai->dev,
663 sizeof(*playback_dma_data),
665 if (!playback_dma_data)
668 capture_dma_data = devm_kzalloc(dai->dev,
669 sizeof(*capture_dma_data),
671 if (!capture_dma_data)
674 playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr;
675 capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr;
677 playback_dma_data->maxburst = 4;
678 capture_dma_data->maxburst = 4;
680 snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
685 static int ux500_msp_dai_probe(struct snd_soc_dai *dai)
687 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
688 struct msp_i2s_platform_data *pdata = dai->dev->platform_data;
692 ret = ux500_msp_dai_of_probe(dai);
696 drvdata->msp->playback_dma_data.data_size = drvdata->slot_width;
697 drvdata->msp->capture_dma_data.data_size = drvdata->slot_width;
699 snd_soc_dai_init_dma_data(dai,
700 &drvdata->msp->playback_dma_data,
701 &drvdata->msp->capture_dma_data);
705 static const struct snd_soc_dai_ops ux500_msp_dai_ops[] = {
707 .set_sysclk = ux500_msp_dai_set_dai_sysclk,
708 .set_fmt = ux500_msp_dai_set_dai_fmt,
709 .set_tdm_slot = ux500_msp_dai_set_tdm_slot,
710 .startup = ux500_msp_dai_startup,
711 .shutdown = ux500_msp_dai_shutdown,
712 .prepare = ux500_msp_dai_prepare,
713 .trigger = ux500_msp_dai_trigger,
714 .hw_params = ux500_msp_dai_hw_params,
718 static struct snd_soc_dai_driver ux500_msp_dai_drv = {
719 .probe = ux500_msp_dai_probe,
720 .playback.channels_min = UX500_MSP_MIN_CHANNELS,
721 .playback.channels_max = UX500_MSP_MAX_CHANNELS,
722 .playback.rates = UX500_I2S_RATES,
723 .playback.formats = UX500_I2S_FORMATS,
724 .capture.channels_min = UX500_MSP_MIN_CHANNELS,
725 .capture.channels_max = UX500_MSP_MAX_CHANNELS,
726 .capture.rates = UX500_I2S_RATES,
727 .capture.formats = UX500_I2S_FORMATS,
728 .ops = ux500_msp_dai_ops,
731 static const struct snd_soc_component_driver ux500_msp_component = {
733 .legacy_dai_naming = 1,
737 static int ux500_msp_drv_probe(struct platform_device *pdev)
739 struct ux500_msp_i2s_drvdata *drvdata;
740 struct msp_i2s_platform_data *pdata = pdev->dev.platform_data;
741 struct device_node *np = pdev->dev.of_node;
745 dev_err(&pdev->dev, "No platform data or Device Tree found\n");
749 drvdata = devm_kzalloc(&pdev->dev,
750 sizeof(struct ux500_msp_i2s_drvdata),
757 drvdata->tx_mask = 0x01;
758 drvdata->rx_mask = 0x01;
759 drvdata->slot_width = 16;
760 drvdata->master_clk = MSP_INPUT_FREQ_APB;
762 drvdata->reg_vape = devm_regulator_get(&pdev->dev, "v-ape");
763 if (IS_ERR(drvdata->reg_vape)) {
764 ret = (int)PTR_ERR(drvdata->reg_vape);
766 "%s: ERROR: Failed to get Vape supply (%d)!\n",
770 prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50);
772 drvdata->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
773 if (IS_ERR(drvdata->pclk)) {
774 ret = (int)PTR_ERR(drvdata->pclk);
776 "%s: ERROR: devm_clk_get of pclk failed (%d)!\n",
781 drvdata->clk = devm_clk_get(&pdev->dev, NULL);
782 if (IS_ERR(drvdata->clk)) {
783 ret = (int)PTR_ERR(drvdata->clk);
785 "%s: ERROR: devm_clk_get failed (%d)!\n",
790 ret = ux500_msp_i2s_init_msp(pdev, &drvdata->msp,
791 pdev->dev.platform_data);
794 "%s: ERROR: Failed to init MSP-struct (%d)!",
798 dev_set_drvdata(&pdev->dev, drvdata);
800 ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component,
801 &ux500_msp_dai_drv, 1);
803 dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n",
804 __func__, drvdata->msp->id);
808 ret = ux500_pcm_register_platform(pdev);
811 "Error: %s: Failed to register PCM platform device!\n",
819 snd_soc_unregister_component(&pdev->dev);
823 static int ux500_msp_drv_remove(struct platform_device *pdev)
825 struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
827 ux500_pcm_unregister_platform(pdev);
829 snd_soc_unregister_component(&pdev->dev);
831 prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s");
833 ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp);
838 static const struct of_device_id ux500_msp_i2s_match[] = {
839 { .compatible = "stericsson,ux500-msp-i2s", },
842 MODULE_DEVICE_TABLE(of, ux500_msp_i2s_match);
844 static struct platform_driver msp_i2s_driver = {
846 .name = "ux500-msp-i2s",
847 .of_match_table = ux500_msp_i2s_match,
849 .probe = ux500_msp_drv_probe,
850 .remove = ux500_msp_drv_remove,
852 module_platform_driver(msp_i2s_driver);
854 MODULE_LICENSE("GPL v2");