4 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
10 * Original copyright for the ov511 driver is:
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
19 * ov51x-jpeg original copyright is:
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
42 #define MODULE_NAME "ov519"
44 #include <linux/input.h>
47 /* The jpeg_hdr is used by w996Xcf only */
48 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
52 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
53 MODULE_DESCRIPTION("OV519 USB Camera Driver");
54 MODULE_LICENSE("GPL");
56 /* global parameters */
57 static int frame_rate;
59 /* Number of times to retry a failed I2C transaction. Increase this if you
60 * are getting "Failed to read sensor ID..." */
61 static int i2c_detect_tries = 10;
63 /* ov519 device descriptor */
65 struct gspca_dev gspca_dev; /* !! must be the first item */
67 struct v4l2_ctrl *jpegqual;
68 struct v4l2_ctrl *freq;
69 struct { /* h/vflip control cluster */
70 struct v4l2_ctrl *hflip;
71 struct v4l2_ctrl *vflip;
73 struct { /* autobrightness/brightness control cluster */
74 struct v4l2_ctrl *autobright;
75 struct v4l2_ctrl *brightness;
83 #define BRIDGE_OV511 0
84 #define BRIDGE_OV511PLUS 1
85 #define BRIDGE_OV518 2
86 #define BRIDGE_OV518PLUS 3
87 #define BRIDGE_OV519 4 /* = ov530 */
88 #define BRIDGE_OVFX2 5
89 #define BRIDGE_W9968CF 6
93 #define BRIDGE_INVERT_LED 8
95 char snapshot_pressed;
96 char snapshot_needs_reset;
98 /* Determined by sensor type */
101 #define QUALITY_MIN 50
102 #define QUALITY_MAX 70
103 #define QUALITY_DEF 50
105 u8 stopped; /* Streaming is temporarily paused */
108 u8 frame_rate; /* current Framerate */
109 u8 clockdiv; /* clockdiv override */
111 s8 sensor; /* Type of image sensor chip (SEN_*) */
116 s16 sensor_reg_cache[256];
118 u8 jpeg_hdr[JPEG_HDR_SZ];
139 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
140 the ov sensors which is already present here. When we have the time we
141 really should move the sensor drivers to v4l2 sub drivers. */
144 /* table of the disabled controls */
146 unsigned int has_brightness:1;
147 unsigned int has_contrast:1;
148 unsigned int has_exposure:1;
149 unsigned int has_autogain:1;
150 unsigned int has_sat:1;
151 unsigned int has_hvflip:1;
152 unsigned int has_autobright:1;
153 unsigned int has_freq:1;
156 static const struct ctrl_valid valid_controls[] = {
252 static const struct v4l2_pix_format ov519_vga_mode[] = {
253 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
255 .sizeimage = 320 * 240 * 3 / 8 + 590,
256 .colorspace = V4L2_COLORSPACE_JPEG,
258 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
260 .sizeimage = 640 * 480 * 3 / 8 + 590,
261 .colorspace = V4L2_COLORSPACE_JPEG,
264 static const struct v4l2_pix_format ov519_sif_mode[] = {
265 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
267 .sizeimage = 160 * 120 * 3 / 8 + 590,
268 .colorspace = V4L2_COLORSPACE_JPEG,
270 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
272 .sizeimage = 176 * 144 * 3 / 8 + 590,
273 .colorspace = V4L2_COLORSPACE_JPEG,
275 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
277 .sizeimage = 320 * 240 * 3 / 8 + 590,
278 .colorspace = V4L2_COLORSPACE_JPEG,
280 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
282 .sizeimage = 352 * 288 * 3 / 8 + 590,
283 .colorspace = V4L2_COLORSPACE_JPEG,
287 /* Note some of the sizeimage values for the ov511 / ov518 may seem
288 larger then necessary, however they need to be this big as the ov511 /
289 ov518 always fills the entire isoc frame, using 0 padding bytes when
290 it doesn't have any data. So with low framerates the amount of data
291 transferred can become quite large (libv4l will remove all the 0 padding
293 static const struct v4l2_pix_format ov518_vga_mode[] = {
294 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
296 .sizeimage = 320 * 240 * 3,
297 .colorspace = V4L2_COLORSPACE_JPEG,
299 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
301 .sizeimage = 640 * 480 * 2,
302 .colorspace = V4L2_COLORSPACE_JPEG,
305 static const struct v4l2_pix_format ov518_sif_mode[] = {
306 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
309 .colorspace = V4L2_COLORSPACE_JPEG,
311 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
314 .colorspace = V4L2_COLORSPACE_JPEG,
316 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
318 .sizeimage = 320 * 240 * 3,
319 .colorspace = V4L2_COLORSPACE_JPEG,
321 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
323 .sizeimage = 352 * 288 * 3,
324 .colorspace = V4L2_COLORSPACE_JPEG,
328 static const struct v4l2_pix_format ov511_vga_mode[] = {
329 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
331 .sizeimage = 320 * 240 * 3,
332 .colorspace = V4L2_COLORSPACE_JPEG,
334 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
336 .sizeimage = 640 * 480 * 2,
337 .colorspace = V4L2_COLORSPACE_JPEG,
340 static const struct v4l2_pix_format ov511_sif_mode[] = {
341 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
344 .colorspace = V4L2_COLORSPACE_JPEG,
346 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
349 .colorspace = V4L2_COLORSPACE_JPEG,
351 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
353 .sizeimage = 320 * 240 * 3,
354 .colorspace = V4L2_COLORSPACE_JPEG,
356 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
358 .sizeimage = 352 * 288 * 3,
359 .colorspace = V4L2_COLORSPACE_JPEG,
363 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
364 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
366 .sizeimage = 800 * 600,
367 .colorspace = V4L2_COLORSPACE_SRGB,
369 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
370 .bytesperline = 1600,
371 .sizeimage = 1600 * 1200,
372 .colorspace = V4L2_COLORSPACE_SRGB},
374 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
375 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
377 .sizeimage = 640 * 480,
378 .colorspace = V4L2_COLORSPACE_SRGB,
380 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
382 .sizeimage = 800 * 600,
383 .colorspace = V4L2_COLORSPACE_SRGB,
385 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
386 .bytesperline = 1024,
387 .sizeimage = 1024 * 768,
388 .colorspace = V4L2_COLORSPACE_SRGB,
390 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
391 .bytesperline = 1600,
392 .sizeimage = 1600 * 1200,
393 .colorspace = V4L2_COLORSPACE_SRGB,
395 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
396 .bytesperline = 2048,
397 .sizeimage = 2048 * 1536,
398 .colorspace = V4L2_COLORSPACE_SRGB,
401 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
402 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
404 .sizeimage = 640 * 480,
405 .colorspace = V4L2_COLORSPACE_SRGB,
407 {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
408 .bytesperline = 1280,
409 .sizeimage = 1280 * 1024,
410 .colorspace = V4L2_COLORSPACE_SRGB},
413 /* Registers common to OV511 / OV518 */
414 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
415 #define R51x_SYS_RESET 0x50
416 /* Reset type flags */
417 #define OV511_RESET_OMNICE 0x08
418 #define R51x_SYS_INIT 0x53
419 #define R51x_SYS_SNAP 0x52
420 #define R51x_SYS_CUST_ID 0x5f
421 #define R51x_COMP_LUT_BEGIN 0x80
423 /* OV511 Camera interface register numbers */
424 #define R511_CAM_DELAY 0x10
425 #define R511_CAM_EDGE 0x11
426 #define R511_CAM_PXCNT 0x12
427 #define R511_CAM_LNCNT 0x13
428 #define R511_CAM_PXDIV 0x14
429 #define R511_CAM_LNDIV 0x15
430 #define R511_CAM_UV_EN 0x16
431 #define R511_CAM_LINE_MODE 0x17
432 #define R511_CAM_OPTS 0x18
434 #define R511_SNAP_FRAME 0x19
435 #define R511_SNAP_PXCNT 0x1a
436 #define R511_SNAP_LNCNT 0x1b
437 #define R511_SNAP_PXDIV 0x1c
438 #define R511_SNAP_LNDIV 0x1d
439 #define R511_SNAP_UV_EN 0x1e
440 #define R511_SNAP_OPTS 0x1f
442 #define R511_DRAM_FLOW_CTL 0x20
443 #define R511_FIFO_OPTS 0x31
444 #define R511_I2C_CTL 0x40
445 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
446 #define R511_COMP_EN 0x78
447 #define R511_COMP_LUT_EN 0x79
449 /* OV518 Camera interface register numbers */
450 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
451 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
453 /* OV519 Camera interface register numbers */
454 #define OV519_R10_H_SIZE 0x10
455 #define OV519_R11_V_SIZE 0x11
456 #define OV519_R12_X_OFFSETL 0x12
457 #define OV519_R13_X_OFFSETH 0x13
458 #define OV519_R14_Y_OFFSETL 0x14
459 #define OV519_R15_Y_OFFSETH 0x15
460 #define OV519_R16_DIVIDER 0x16
461 #define OV519_R20_DFR 0x20
462 #define OV519_R25_FORMAT 0x25
464 /* OV519 System Controller register numbers */
465 #define OV519_R51_RESET1 0x51
466 #define OV519_R54_EN_CLK1 0x54
467 #define OV519_R57_SNAPSHOT 0x57
469 #define OV519_GPIO_DATA_OUT0 0x71
470 #define OV519_GPIO_IO_CTRL0 0x72
472 /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
475 * The FX2 chip does not give us a zero length read at end of frame.
476 * It does, however, give a short read at the end of a frame, if
477 * necessary, rather than run two frames together.
479 * By choosing the right bulk transfer size, we are guaranteed to always
480 * get a short read for the last read of each frame. Frame sizes are
481 * always a composite number (width * height, or a multiple) so if we
482 * choose a prime number, we are guaranteed that the last read of a
483 * frame will be short.
485 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
486 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
487 * to figure out why. [PMiller]
489 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
491 * It isn't enough to know the number of bytes per frame, in case we
492 * have data dropouts or buffer overruns (even though the FX2 double
493 * buffers, there are some pretty strict real time constraints for
494 * isochronous transfer for larger frame sizes).
496 /*jfm: this value does not work for 800x600 - see isoc_init */
497 #define OVFX2_BULK_SIZE (13 * 4096)
500 #define R51x_I2C_W_SID 0x41
501 #define R51x_I2C_SADDR_3 0x42
502 #define R51x_I2C_SADDR_2 0x43
503 #define R51x_I2C_R_SID 0x44
504 #define R51x_I2C_DATA 0x45
505 #define R518_I2C_CTL 0x47 /* OV518(+) only */
506 #define OVFX2_I2C_ADDR 0x00
509 #define OV7xx0_SID 0x42
510 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
511 #define OV8xx0_SID 0xa0
512 #define OV6xx0_SID 0xc0
514 /* OV7610 registers */
515 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
516 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
517 #define OV7610_REG_RED 0x02 /* red channel balance */
518 #define OV7610_REG_SAT 0x03 /* saturation */
519 #define OV8610_REG_HUE 0x04 /* 04 reserved */
520 #define OV7610_REG_CNT 0x05 /* Y contrast */
521 #define OV7610_REG_BRT 0x06 /* Y brightness */
522 #define OV7610_REG_COM_C 0x14 /* misc common regs */
523 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
524 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
525 #define OV7610_REG_COM_I 0x29 /* misc settings */
527 /* OV7660 and OV7670 registers */
528 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
529 #define OV7670_R01_BLUE 0x01 /* blue gain */
530 #define OV7670_R02_RED 0x02 /* red gain */
531 #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
532 #define OV7670_R04_COM1 0x04 /* Control 1 */
533 /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
534 #define OV7670_R0C_COM3 0x0c /* Control 3 */
535 #define OV7670_R0D_COM4 0x0d /* Control 4 */
536 #define OV7670_R0E_COM5 0x0e /* All "reserved" */
537 #define OV7670_R0F_COM6 0x0f /* Control 6 */
538 #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
539 #define OV7670_R11_CLKRC 0x11 /* Clock control */
540 #define OV7670_R12_COM7 0x12 /* Control 7 */
541 #define OV7670_COM7_FMT_VGA 0x00
542 /*#define OV7670_COM7_YUV 0x00 * YUV */
543 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
544 #define OV7670_COM7_FMT_MASK 0x38
545 #define OV7670_COM7_RESET 0x80 /* Register reset */
546 #define OV7670_R13_COM8 0x13 /* Control 8 */
547 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
548 #define OV7670_COM8_AWB 0x02 /* White balance enable */
549 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
550 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
551 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
552 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
553 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
554 #define OV7670_R15_COM10 0x15 /* Control 10 */
555 #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
556 #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
557 #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
558 #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
559 #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
560 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
561 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
562 #define OV7670_R24_AEW 0x24 /* AGC upper limit */
563 #define OV7670_R25_AEB 0x25 /* AGC lower limit */
564 #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
565 #define OV7670_R32_HREF 0x32 /* HREF pieces */
566 #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
567 #define OV7670_R3B_COM11 0x3b /* Control 11 */
568 #define OV7670_COM11_EXP 0x02
569 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
570 #define OV7670_R3C_COM12 0x3c /* Control 12 */
571 #define OV7670_R3D_COM13 0x3d /* Control 13 */
572 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
573 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
574 #define OV7670_R3E_COM14 0x3e /* Control 14 */
575 #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
576 #define OV7670_R40_COM15 0x40 /* Control 15 */
577 /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
578 #define OV7670_R41_COM16 0x41 /* Control 16 */
579 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
580 /* end of ov7660 common registers */
581 #define OV7670_R55_BRIGHT 0x55 /* Brightness */
582 #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
583 #define OV7670_R69_GFIX 0x69 /* Fix gain control */
584 /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
585 #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
586 #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
587 #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
588 #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
589 #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
590 #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
591 #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
592 #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
593 #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
599 struct ov_i2c_regvals {
604 /* Settings for OV2610 camera chip */
605 static const struct ov_i2c_regvals norm_2610[] = {
606 { 0x12, 0x80 }, /* reset */
609 static const struct ov_i2c_regvals norm_2610ae[] = {
610 {0x12, 0x80}, /* reset */
615 {0x12, 0x20}, /* 1600x1200 */
620 {0x11, 0x83}, /* clock / 3 ? */
621 {0x2d, 0x00}, /* 60 Hz filter */
622 {0x24, 0xb0}, /* normal colors */
627 static const struct ov_i2c_regvals norm_3620b[] = {
629 * From the datasheet: "Note that after writing to register COMH
630 * (0x12) to change the sensor mode, registers related to the
631 * sensor’s cropping window will be reset back to their default
634 * "wait 4096 external clock ... to make sure the sensor is
635 * stable and ready to access registers" i.e. 160us at 24MHz
637 { 0x12, 0x80 }, /* COMH reset */
638 { 0x12, 0x00 }, /* QXGA, master */
641 * 11 CLKRC "Clock Rate Control"
642 * [7] internal frequency doublers: on
643 * [6] video port mode: master
644 * [5:0] clock divider: 1
649 * 13 COMI "Common Control I"
650 * = 192 (0xC0) 11000000
651 * COMI[7] "AEC speed selection"
652 * = 1 (0x01) 1....... "Faster AEC correction"
653 * COMI[6] "AEC speed step selection"
654 * = 1 (0x01) .1...... "Big steps, fast"
655 * COMI[5] "Banding filter on off"
656 * = 0 (0x00) ..0..... "Off"
657 * COMI[4] "Banding filter option"
658 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
661 * = 0 (0x00) ....0...
662 * COMI[2] "AGC auto manual control selection"
663 * = 0 (0x00) .....0.. "Manual"
664 * COMI[1] "AWB auto manual control selection"
665 * = 0 (0x00) ......0. "Manual"
666 * COMI[0] "Exposure control"
667 * = 0 (0x00) .......0 "Manual"
672 * 09 COMC "Common Control C"
673 * = 8 (0x08) 00001000
674 * COMC[7:5] "Reserved"
675 * = 0 (0x00) 000.....
676 * COMC[4] "Sleep Mode Enable"
677 * = 0 (0x00) ...0.... "Normal mode"
678 * COMC[3:2] "Sensor sampling reset timing selection"
679 * = 2 (0x02) ....10.. "Longer reset time"
680 * COMC[1:0] "Output drive current select"
681 * = 0 (0x00) ......00 "Weakest"
686 * 0C COMD "Common Control D"
687 * = 8 (0x08) 00001000
689 * = 0 (0x00) 0.......
690 * COMD[6] "Swap MSB and LSB at the output port"
691 * = 0 (0x00) .0...... "False"
692 * COMD[5:3] "Reserved"
693 * = 1 (0x01) ..001...
694 * COMD[2] "Output Average On Off"
695 * = 0 (0x00) .....0.. "Output Normal"
696 * COMD[1] "Sensor precharge voltage selection"
697 * = 0 (0x00) ......0. "Selects internal
698 * reference precharge
700 * COMD[0] "Snapshot option"
701 * = 0 (0x00) .......0 "Enable live video output
702 * after snapshot sequence"
707 * 0D COME "Common Control E"
708 * = 161 (0xA1) 10100001
709 * COME[7] "Output average option"
710 * = 1 (0x01) 1....... "Output average of 4 pixels"
711 * COME[6] "Anti-blooming control"
712 * = 0 (0x00) .0...... "Off"
713 * COME[5:3] "Reserved"
714 * = 4 (0x04) ..100...
715 * COME[2] "Clock output power down pin status"
716 * = 0 (0x00) .....0.. "Tri-state data output pin
718 * COME[1] "Data output pin status selection at power down"
719 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
720 * HREF, and CHSYNC pins on
722 * COME[0] "Auto zero circuit select"
723 * = 1 (0x01) .......1 "On"
728 * 0E COMF "Common Control F"
729 * = 112 (0x70) 01110000
730 * COMF[7] "System clock selection"
731 * = 0 (0x00) 0....... "Use 24 MHz system clock"
732 * COMF[6:4] "Reserved"
733 * = 7 (0x07) .111....
734 * COMF[3] "Manual auto negative offset canceling selection"
735 * = 0 (0x00) ....0... "Auto detect negative
736 * offset and cancel it"
737 * COMF[2:0] "Reserved"
738 * = 0 (0x00) .....000
743 * 0F COMG "Common Control G"
744 * = 66 (0x42) 01000010
745 * COMG[7] "Optical black output selection"
746 * = 0 (0x00) 0....... "Disable"
747 * COMG[6] "Black level calibrate selection"
748 * = 1 (0x01) .1...... "Use optical black pixels
750 * COMG[5:4] "Reserved"
751 * = 0 (0x00) ..00....
752 * COMG[3] "Channel offset adjustment"
753 * = 0 (0x00) ....0... "Disable offset adjustment"
754 * COMG[2] "ADC black level calibration option"
755 * = 0 (0x00) .....0.. "Use B/G line and G/R
756 * line to calibrate each
757 * channel's black level"
759 * = 1 (0x01) ......1.
760 * COMG[0] "ADC black level calibration enable"
761 * = 0 (0x00) .......0 "Disable"
766 * 14 COMJ "Common Control J"
767 * = 198 (0xC6) 11000110
768 * COMJ[7:6] "AGC gain ceiling"
769 * = 3 (0x03) 11...... "8x"
770 * COMJ[5:4] "Reserved"
771 * = 0 (0x00) ..00....
772 * COMJ[3] "Auto banding filter"
773 * = 0 (0x00) ....0... "Banding filter is always
774 * on off depending on
776 * COMJ[2] "VSYNC drop option"
777 * = 1 (0x01) .....1.. "SYNC is dropped if frame
779 * COMJ[1] "Frame data drop"
780 * = 1 (0x01) ......1. "Drop frame data if
781 * exposure is not within
782 * tolerance. In AEC mode,
783 * data is normally dropped
784 * when data is out of
787 * = 0 (0x00) .......0
792 * 15 COMK "Common Control K"
793 * = 2 (0x02) 00000010
794 * COMK[7] "CHSYNC pin output swap"
795 * = 0 (0x00) 0....... "CHSYNC"
796 * COMK[6] "HREF pin output swap"
797 * = 0 (0x00) .0...... "HREF"
798 * COMK[5] "PCLK output selection"
799 * = 0 (0x00) ..0..... "PCLK always output"
800 * COMK[4] "PCLK edge selection"
801 * = 0 (0x00) ...0.... "Data valid on falling edge"
802 * COMK[3] "HREF output polarity"
803 * = 0 (0x00) ....0... "positive"
805 * = 0 (0x00) .....0..
806 * COMK[1] "VSYNC polarity"
807 * = 1 (0x01) ......1. "negative"
808 * COMK[0] "HSYNC polarity"
809 * = 0 (0x00) .......0 "positive"
814 * 33 CHLF "Current Control"
815 * = 9 (0x09) 00001001
816 * CHLF[7:6] "Sensor current control"
817 * = 0 (0x00) 00......
818 * CHLF[5] "Sensor current range control"
819 * = 0 (0x00) ..0..... "normal range"
820 * CHLF[4] "Sensor current"
821 * = 0 (0x00) ...0.... "normal current"
822 * CHLF[3] "Sensor buffer current control"
823 * = 1 (0x01) ....1... "half current"
824 * CHLF[2] "Column buffer current control"
825 * = 0 (0x00) .....0.. "normal current"
826 * CHLF[1] "Analog DSP current control"
827 * = 0 (0x00) ......0. "normal current"
828 * CHLF[1] "ADC current control"
829 * = 0 (0x00) ......0. "normal current"
834 * 34 VBLM "Blooming Control"
835 * = 80 (0x50) 01010000
836 * VBLM[7] "Hard soft reset switch"
837 * = 0 (0x00) 0....... "Hard reset"
838 * VBLM[6:4] "Blooming voltage selection"
839 * = 5 (0x05) .101....
840 * VBLM[3:0] "Sensor current control"
841 * = 0 (0x00) ....0000
846 * 36 VCHG "Sensor Precharge Voltage Control"
847 * = 0 (0x00) 00000000
849 * = 0 (0x00) 0.......
850 * VCHG[6:4] "Sensor precharge voltage control"
851 * = 0 (0x00) .000....
852 * VCHG[3:0] "Sensor array common reference"
853 * = 0 (0x00) ....0000
858 * 37 ADC "ADC Reference Control"
859 * = 4 (0x04) 00000100
860 * ADC[7:4] "Reserved"
861 * = 0 (0x00) 0000....
862 * ADC[3] "ADC input signal range"
863 * = 0 (0x00) ....0... "Input signal 1.0x"
864 * ADC[2:0] "ADC range control"
865 * = 4 (0x04) .....100
870 * 38 ACOM "Analog Common Ground"
871 * = 82 (0x52) 01010010
872 * ACOM[7] "Analog gain control"
873 * = 0 (0x00) 0....... "Gain 1x"
874 * ACOM[6] "Analog black level calibration"
875 * = 1 (0x01) .1...... "On"
876 * ACOM[5:0] "Reserved"
877 * = 18 (0x12) ..010010
882 * 3A FREFA "Internal Reference Adjustment"
883 * = 0 (0x00) 00000000
885 * = 0 (0x00) 00000000
890 * 3C FVOPT "Internal Reference Adjustment"
891 * = 31 (0x1F) 00011111
893 * = 31 (0x1F) 00011111
898 * 44 Undocumented = 0 (0x00) 00000000
899 * 44[7:0] "It's a secret"
900 * = 0 (0x00) 00000000
905 * 40 Undocumented = 0 (0x00) 00000000
906 * 40[7:0] "It's a secret"
907 * = 0 (0x00) 00000000
912 * 41 Undocumented = 0 (0x00) 00000000
913 * 41[7:0] "It's a secret"
914 * = 0 (0x00) 00000000
919 * 42 Undocumented = 0 (0x00) 00000000
920 * 42[7:0] "It's a secret"
921 * = 0 (0x00) 00000000
926 * 43 Undocumented = 0 (0x00) 00000000
927 * 43[7:0] "It's a secret"
928 * = 0 (0x00) 00000000
933 * 45 Undocumented = 128 (0x80) 10000000
934 * 45[7:0] "It's a secret"
935 * = 128 (0x80) 10000000
940 * 48 Undocumented = 192 (0xC0) 11000000
941 * 48[7:0] "It's a secret"
942 * = 192 (0xC0) 11000000
947 * 49 Undocumented = 25 (0x19) 00011001
948 * 49[7:0] "It's a secret"
949 * = 25 (0x19) 00011001
954 * 4B Undocumented = 128 (0x80) 10000000
955 * 4B[7:0] "It's a secret"
956 * = 128 (0x80) 10000000
961 * 4D Undocumented = 196 (0xC4) 11000100
962 * 4D[7:0] "It's a secret"
963 * = 196 (0xC4) 11000100
968 * 35 VREF "Reference Voltage Control"
969 * = 76 (0x4c) 01001100
970 * VREF[7:5] "Column high reference control"
971 * = 2 (0x02) 010..... "higher voltage"
972 * VREF[4:2] "Column low reference control"
973 * = 3 (0x03) ...011.. "Highest voltage"
974 * VREF[1:0] "Reserved"
975 * = 0 (0x00) ......00
980 * 3D Undocumented = 0 (0x00) 00000000
981 * 3D[7:0] "It's a secret"
982 * = 0 (0x00) 00000000
987 * 3E Undocumented = 0 (0x00) 00000000
988 * 3E[7:0] "It's a secret"
989 * = 0 (0x00) 00000000
994 * 3B FREFB "Internal Reference Adjustment"
995 * = 24 (0x18) 00011000
997 * = 24 (0x18) 00011000
1002 * 33 CHLF "Current Control"
1003 * = 25 (0x19) 00011001
1004 * CHLF[7:6] "Sensor current control"
1005 * = 0 (0x00) 00......
1006 * CHLF[5] "Sensor current range control"
1007 * = 0 (0x00) ..0..... "normal range"
1008 * CHLF[4] "Sensor current"
1009 * = 1 (0x01) ...1.... "double current"
1010 * CHLF[3] "Sensor buffer current control"
1011 * = 1 (0x01) ....1... "half current"
1012 * CHLF[2] "Column buffer current control"
1013 * = 0 (0x00) .....0.. "normal current"
1014 * CHLF[1] "Analog DSP current control"
1015 * = 0 (0x00) ......0. "normal current"
1016 * CHLF[1] "ADC current control"
1017 * = 0 (0x00) ......0. "normal current"
1022 * 34 VBLM "Blooming Control"
1023 * = 90 (0x5A) 01011010
1024 * VBLM[7] "Hard soft reset switch"
1025 * = 0 (0x00) 0....... "Hard reset"
1026 * VBLM[6:4] "Blooming voltage selection"
1027 * = 5 (0x05) .101....
1028 * VBLM[3:0] "Sensor current control"
1029 * = 10 (0x0A) ....1010
1034 * 3B FREFB "Internal Reference Adjustment"
1035 * = 0 (0x00) 00000000
1036 * FREFB[7:0] "Range"
1037 * = 0 (0x00) 00000000
1042 * 33 CHLF "Current Control"
1043 * = 9 (0x09) 00001001
1044 * CHLF[7:6] "Sensor current control"
1045 * = 0 (0x00) 00......
1046 * CHLF[5] "Sensor current range control"
1047 * = 0 (0x00) ..0..... "normal range"
1048 * CHLF[4] "Sensor current"
1049 * = 0 (0x00) ...0.... "normal current"
1050 * CHLF[3] "Sensor buffer current control"
1051 * = 1 (0x01) ....1... "half current"
1052 * CHLF[2] "Column buffer current control"
1053 * = 0 (0x00) .....0.. "normal current"
1054 * CHLF[1] "Analog DSP current control"
1055 * = 0 (0x00) ......0. "normal current"
1056 * CHLF[1] "ADC current control"
1057 * = 0 (0x00) ......0. "normal current"
1062 * 34 VBLM "Blooming Control"
1063 * = 80 (0x50) 01010000
1064 * VBLM[7] "Hard soft reset switch"
1065 * = 0 (0x00) 0....... "Hard reset"
1066 * VBLM[6:4] "Blooming voltage selection"
1067 * = 5 (0x05) .101....
1068 * VBLM[3:0] "Sensor current control"
1069 * = 0 (0x00) ....0000
1074 * 12 COMH "Common Control H"
1075 * = 64 (0x40) 01000000
1077 * = 0 (0x00) 0....... "No-op"
1078 * COMH[6:4] "Resolution selection"
1079 * = 4 (0x04) .100.... "XGA"
1080 * COMH[3] "Master slave selection"
1081 * = 0 (0x00) ....0... "Master mode"
1082 * COMH[2] "Internal B/R channel option"
1083 * = 0 (0x00) .....0.. "B/R use same channel"
1084 * COMH[1] "Color bar test pattern"
1085 * = 0 (0x00) ......0. "Off"
1086 * COMH[0] "Reserved"
1087 * = 0 (0x00) .......0
1092 * 17 HREFST "Horizontal window start"
1093 * = 31 (0x1F) 00011111
1094 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1095 * = 31 (0x1F) 00011111
1100 * 18 HREFEND "Horizontal window end"
1101 * = 95 (0x5F) 01011111
1102 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1103 * = 95 (0x5F) 01011111
1108 * 19 VSTRT "Vertical window start"
1109 * = 0 (0x00) 00000000
1110 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1111 * = 0 (0x00) 00000000
1116 * 1A VEND "Vertical window end"
1117 * = 96 (0x60) 01100000
1118 * VEND[7:0] "Vertical Window End, 8 MSBs"
1119 * = 96 (0x60) 01100000
1124 * 32 COMM "Common Control M"
1125 * = 18 (0x12) 00010010
1126 * COMM[7:6] "Pixel clock divide option"
1127 * = 0 (0x00) 00...... "/1"
1128 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1129 * = 2 (0x02) ..010...
1130 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1131 * = 2 (0x02) .....010
1136 * 03 COMA "Common Control A"
1137 * = 74 (0x4A) 01001010
1138 * COMA[7:4] "AWB Update Threshold"
1139 * = 4 (0x04) 0100....
1140 * COMA[3:2] "Vertical window end line control 2 LSBs"
1141 * = 2 (0x02) ....10..
1142 * COMA[1:0] "Vertical window start line control 2 LSBs"
1143 * = 2 (0x02) ......10
1148 * 11 CLKRC "Clock Rate Control"
1149 * = 128 (0x80) 10000000
1150 * CLKRC[7] "Internal frequency doublers on off seclection"
1151 * = 1 (0x01) 1....... "On"
1152 * CLKRC[6] "Digital video master slave selection"
1153 * = 0 (0x00) .0...... "Master mode, sensor
1155 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1156 * = 0 (0x00) ..000000
1161 * 12 COMH "Common Control H"
1162 * = 0 (0x00) 00000000
1164 * = 0 (0x00) 0....... "No-op"
1165 * COMH[6:4] "Resolution selection"
1166 * = 0 (0x00) .000.... "QXGA"
1167 * COMH[3] "Master slave selection"
1168 * = 0 (0x00) ....0... "Master mode"
1169 * COMH[2] "Internal B/R channel option"
1170 * = 0 (0x00) .....0.. "B/R use same channel"
1171 * COMH[1] "Color bar test pattern"
1172 * = 0 (0x00) ......0. "Off"
1173 * COMH[0] "Reserved"
1174 * = 0 (0x00) .......0
1179 * 12 COMH "Common Control H"
1180 * = 64 (0x40) 01000000
1182 * = 0 (0x00) 0....... "No-op"
1183 * COMH[6:4] "Resolution selection"
1184 * = 4 (0x04) .100.... "XGA"
1185 * COMH[3] "Master slave selection"
1186 * = 0 (0x00) ....0... "Master mode"
1187 * COMH[2] "Internal B/R channel option"
1188 * = 0 (0x00) .....0.. "B/R use same channel"
1189 * COMH[1] "Color bar test pattern"
1190 * = 0 (0x00) ......0. "Off"
1191 * COMH[0] "Reserved"
1192 * = 0 (0x00) .......0
1197 * 17 HREFST "Horizontal window start"
1198 * = 31 (0x1F) 00011111
1199 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1200 * = 31 (0x1F) 00011111
1205 * 18 HREFEND "Horizontal window end"
1206 * = 95 (0x5F) 01011111
1207 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1208 * = 95 (0x5F) 01011111
1213 * 19 VSTRT "Vertical window start"
1214 * = 0 (0x00) 00000000
1215 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1216 * = 0 (0x00) 00000000
1221 * 1A VEND "Vertical window end"
1222 * = 96 (0x60) 01100000
1223 * VEND[7:0] "Vertical Window End, 8 MSBs"
1224 * = 96 (0x60) 01100000
1229 * 32 COMM "Common Control M"
1230 * = 18 (0x12) 00010010
1231 * COMM[7:6] "Pixel clock divide option"
1232 * = 0 (0x00) 00...... "/1"
1233 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1234 * = 2 (0x02) ..010...
1235 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1236 * = 2 (0x02) .....010
1241 * 03 COMA "Common Control A"
1242 * = 74 (0x4A) 01001010
1243 * COMA[7:4] "AWB Update Threshold"
1244 * = 4 (0x04) 0100....
1245 * COMA[3:2] "Vertical window end line control 2 LSBs"
1246 * = 2 (0x02) ....10..
1247 * COMA[1:0] "Vertical window start line control 2 LSBs"
1248 * = 2 (0x02) ......10
1253 * 02 RED "Red Gain Control"
1254 * = 175 (0xAF) 10101111
1256 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1258 * = 47 (0x2F) .0101111
1263 * 2D ADDVSL "VSYNC Pulse Width"
1264 * = 210 (0xD2) 11010010
1265 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1266 * = 210 (0xD2) 11010010
1271 * 00 GAIN = 24 (0x18) 00011000
1272 * GAIN[7:6] "Reserved"
1273 * = 0 (0x00) 00......
1275 * = 0 (0x00) ..0..... "False"
1277 * = 1 (0x01) ...1.... "True"
1279 * = 8 (0x08) ....1000
1284 * 01 BLUE "Blue Gain Control"
1285 * = 240 (0xF0) 11110000
1287 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1289 * = 112 (0x70) .1110000
1294 * 10 AEC "Automatic Exposure Control"
1295 * = 10 (0x0A) 00001010
1296 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1297 * = 10 (0x0A) 00001010
1309 static const struct ov_i2c_regvals norm_6x20[] = {
1310 { 0x12, 0x80 }, /* reset */
1313 { 0x05, 0x7f }, /* For when autoadjust is off */
1315 /* The ratio of 0x0c and 0x0d controls the white point */
1318 { 0x0f, 0x15 }, /* COMS */
1319 { 0x10, 0x75 }, /* AEC Exposure time */
1320 { 0x12, 0x24 }, /* Enable AGC */
1322 /* 0x16: 0x06 helps frame stability with moving objects */
1324 /* { 0x20, 0x30 }, * Aperture correction enable */
1325 { 0x26, 0xb2 }, /* BLC enable */
1326 /* 0x28: 0x05 Selects RGB format if RGB on */
1328 { 0x2a, 0x04 }, /* Disable framerate adjust */
1329 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1331 { 0x33, 0xa0 }, /* Color Processing Parameter */
1332 { 0x34, 0xd2 }, /* Max A/D range */
1336 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1337 { 0x3c, 0x3c }, /* Change AEC mode */
1338 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1341 /* These next two registers (0x4a, 0x4b) are undocumented.
1342 * They control the color balance */
1345 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1348 /* Do 50-53 have any effect? */
1349 /* Toggle 0x12[2] off and on here? */
1352 static const struct ov_i2c_regvals norm_6x30[] = {
1353 { 0x12, 0x80 }, /* Reset */
1354 { 0x00, 0x1f }, /* Gain */
1355 { 0x01, 0x99 }, /* Blue gain */
1356 { 0x02, 0x7c }, /* Red gain */
1357 { 0x03, 0xc0 }, /* Saturation */
1358 { 0x05, 0x0a }, /* Contrast */
1359 { 0x06, 0x95 }, /* Brightness */
1360 { 0x07, 0x2d }, /* Sharpness */
1363 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1366 { 0x11, 0x00 }, /* Pixel clock = fastest */
1367 { 0x12, 0x24 }, /* Enable AGC and AWB */
1382 { 0x23, 0xc0 }, /* Crystal circuit power level */
1383 { 0x25, 0x9a }, /* Increase AEC black ratio */
1384 { 0x26, 0xb2 }, /* BLC enable */
1388 { 0x2a, 0x84 }, /* 60 Hz power */
1389 { 0x2b, 0xa8 }, /* 60 Hz power */
1391 { 0x2d, 0x95 }, /* Enable auto-brightness */
1405 { 0x40, 0x00 }, /* White bal */
1406 { 0x41, 0x00 }, /* White bal */
1408 { 0x43, 0x3f }, /* White bal */
1418 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1420 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1422 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1427 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1429 { 0x5b, 0x0f }, /* AWB chrominance levels */
1433 { 0x12, 0x20 }, /* Toggle AWB */
1437 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1439 * Register 0x0f in the 7610 has the following effects:
1441 * 0x85 (AEC method 1): Best overall, good contrast range
1442 * 0x45 (AEC method 2): Very overexposed
1443 * 0xa5 (spec sheet default): Ok, but the black level is
1444 * shifted resulting in loss of contrast
1445 * 0x05 (old driver setting): very overexposed, too much
1448 static const struct ov_i2c_regvals norm_7610[] = {
1455 { 0x28, 0x24 }, /* 0c */
1456 { 0x0f, 0x85 }, /* lg's setting */
1478 static const struct ov_i2c_regvals norm_7620[] = {
1479 { 0x12, 0x80 }, /* reset */
1480 { 0x00, 0x00 }, /* gain */
1481 { 0x01, 0x80 }, /* blue gain */
1482 { 0x02, 0x80 }, /* red gain */
1483 { 0x03, 0xc0 }, /* OV7670_R03_VREF */
1506 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1545 /* 7640 and 7648. The defaults should be OK for most registers. */
1546 static const struct ov_i2c_regvals norm_7640[] = {
1551 static const struct ov_regvals init_519_ov7660[] = {
1552 { 0x5d, 0x03 }, /* Turn off suspend mode */
1553 { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1554 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1555 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1559 { 0x37, 0x00 }, /* SetUsbInit */
1560 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1561 /* Enable both fields, YUV Input, disable defect comp (why?) */
1562 { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1565 { 0x17, 0x50 }, /* undocumented */
1566 { 0x37, 0x00 }, /* undocumented */
1567 { 0x40, 0xff }, /* I2C timeout counter */
1568 { 0x46, 0x00 }, /* I2C clock prescaler */
1570 static const struct ov_i2c_regvals norm_7660[] = {
1571 {OV7670_R12_COM7, OV7670_COM7_RESET},
1572 {OV7670_R11_CLKRC, 0x81},
1573 {0x92, 0x00}, /* DM_LNL */
1574 {0x93, 0x00}, /* DM_LNH */
1575 {0x9d, 0x4c}, /* BD50ST */
1576 {0x9e, 0x3f}, /* BD60ST */
1577 {OV7670_R3B_COM11, 0x02},
1578 {OV7670_R13_COM8, 0xf5},
1579 {OV7670_R10_AECH, 0x00},
1580 {OV7670_R00_GAIN, 0x00},
1581 {OV7670_R01_BLUE, 0x7c},
1582 {OV7670_R02_RED, 0x9d},
1583 {OV7670_R12_COM7, 0x00},
1584 {OV7670_R04_COM1, 00},
1585 {OV7670_R18_HSTOP, 0x01},
1586 {OV7670_R17_HSTART, 0x13},
1587 {OV7670_R32_HREF, 0x92},
1588 {OV7670_R19_VSTART, 0x02},
1589 {OV7670_R1A_VSTOP, 0x7a},
1590 {OV7670_R03_VREF, 0x00},
1591 {OV7670_R0E_COM5, 0x04},
1592 {OV7670_R0F_COM6, 0x62},
1593 {OV7670_R15_COM10, 0x00},
1594 {0x16, 0x02}, /* RSVD */
1595 {0x1b, 0x00}, /* PSHFT */
1596 {OV7670_R1E_MVFP, 0x01},
1597 {0x29, 0x3c}, /* RSVD */
1598 {0x33, 0x00}, /* CHLF */
1599 {0x34, 0x07}, /* ARBLM */
1600 {0x35, 0x84}, /* RSVD */
1601 {0x36, 0x00}, /* RSVD */
1602 {0x37, 0x04}, /* ADC */
1603 {0x39, 0x43}, /* OFON */
1604 {OV7670_R3A_TSLB, 0x00},
1605 {OV7670_R3C_COM12, 0x6c},
1606 {OV7670_R3D_COM13, 0x98},
1607 {OV7670_R3F_EDGE, 0x23},
1608 {OV7670_R40_COM15, 0xc1},
1609 {OV7670_R41_COM16, 0x22},
1610 {0x6b, 0x0a}, /* DBLV */
1611 {0xa1, 0x08}, /* RSVD */
1612 {0x69, 0x80}, /* HV */
1613 {0x43, 0xf0}, /* RSVD.. */
1628 {0x9f, 0x9d}, /* RSVD */
1629 {0xa0, 0xa0}, /* DSPC2 */
1630 {0x4f, 0x60}, /* matrix */
1639 {0x58, 0x0d}, /* matrix sign */
1640 {0x8b, 0xcc}, /* RSVD */
1643 {0x6c, 0x40}, /* gamma curve */
1659 {0x7c, 0x04}, /* gamma curve */
1674 {OV7670_R14_COM9, 0x1e},
1675 {OV7670_R24_AEW, 0x80},
1676 {OV7670_R25_AEB, 0x72},
1677 {OV7670_R26_VPT, 0xb3},
1678 {0x62, 0x80}, /* LCC1 */
1679 {0x63, 0x80}, /* LCC2 */
1680 {0x64, 0x06}, /* LCC3 */
1681 {0x65, 0x00}, /* LCC4 */
1682 {0x66, 0x01}, /* LCC5 */
1683 {0x94, 0x0e}, /* RSVD.. */
1685 {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1686 | OV7670_COM8_AECSTEP
1694 static const struct ov_i2c_regvals norm_9600[] = {
1711 /* 7670. Defaults taken from OmniVision provided data,
1712 * as provided by Jonathan Corbet of OLPC */
1713 static const struct ov_i2c_regvals norm_7670[] = {
1714 { OV7670_R12_COM7, OV7670_COM7_RESET },
1715 { OV7670_R3A_TSLB, 0x04 }, /* OV */
1716 { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1717 { OV7670_R11_CLKRC, 0x01 },
1719 * Set the hardware window. These values from OV don't entirely
1720 * make sense - hstop is less than hstart. But they work...
1722 { OV7670_R17_HSTART, 0x13 },
1723 { OV7670_R18_HSTOP, 0x01 },
1724 { OV7670_R32_HREF, 0xb6 },
1725 { OV7670_R19_VSTART, 0x02 },
1726 { OV7670_R1A_VSTOP, 0x7a },
1727 { OV7670_R03_VREF, 0x0a },
1729 { OV7670_R0C_COM3, 0x00 },
1730 { OV7670_R3E_COM14, 0x00 },
1731 /* Mystery scaling numbers */
1737 /* { OV7670_R15_COM10, 0x0 }, */
1739 /* Gamma curve values */
1757 /* AGC and AEC parameters. Note we start by disabling those features,
1758 then turn them only after tweaking the values. */
1759 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1760 | OV7670_COM8_AECSTEP
1761 | OV7670_COM8_BFILT },
1762 { OV7670_R00_GAIN, 0x00 },
1763 { OV7670_R10_AECH, 0x00 },
1764 { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1765 { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1766 { OV7670_RA5_BD50MAX, 0x05 },
1767 { OV7670_RAB_BD60MAX, 0x07 },
1768 { OV7670_R24_AEW, 0x95 },
1769 { OV7670_R25_AEB, 0x33 },
1770 { OV7670_R26_VPT, 0xe3 },
1771 { OV7670_R9F_HAECC1, 0x78 },
1772 { OV7670_RA0_HAECC2, 0x68 },
1773 { 0xa1, 0x03 }, /* magic */
1774 { OV7670_RA6_HAECC3, 0xd8 },
1775 { OV7670_RA7_HAECC4, 0xd8 },
1776 { OV7670_RA8_HAECC5, 0xf0 },
1777 { OV7670_RA9_HAECC6, 0x90 },
1778 { OV7670_RAA_HAECC7, 0x94 },
1779 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1780 | OV7670_COM8_AECSTEP
1783 | OV7670_COM8_AEC },
1785 /* Almost all of these are magic "reserved" values. */
1786 { OV7670_R0E_COM5, 0x61 },
1787 { OV7670_R0F_COM6, 0x4b },
1789 { OV7670_R1E_MVFP, 0x07 },
1798 { OV7670_R3C_COM12, 0x78 },
1801 { OV7670_R69_GFIX, 0x00 },
1817 /* More reserved magic, some of which tweaks white balance */
1833 { 0x6f, 0x9f }, /* "9e for advance AWB" */
1835 { OV7670_R01_BLUE, 0x40 },
1836 { OV7670_R02_RED, 0x60 },
1837 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1838 | OV7670_COM8_AECSTEP
1842 | OV7670_COM8_AWB },
1844 /* Matrix coefficients */
1853 { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1854 { OV7670_R3F_EDGE, 0x00 },
1859 { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1860 | OV7670_COM13_UVSAT
1864 { OV7670_R41_COM16, 0x38 },
1868 { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1881 /* Extra-weird stuff. Some sort of multiplexor register */
1907 static const struct ov_i2c_regvals norm_8610[] = {
1914 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1915 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1924 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1926 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1927 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1928 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1931 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1932 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1933 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1934 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1940 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1942 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1944 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1946 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1947 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1948 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1949 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1951 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1952 * maybe thats wrong */
1956 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1960 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1961 * deleting bit7 colors the first images red */
1962 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1963 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1969 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1971 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1976 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1978 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1979 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1986 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1992 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1995 static unsigned char ov7670_abs_to_sm(unsigned char v)
1999 return (128 - v) | 0x80;
2002 /* Write a OV519 register */
2003 static void reg_w(struct sd *sd, u16 index, u16 value)
2005 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2008 if (sd->gspca_dev.usb_err < 0)
2011 /* Avoid things going to fast for the bridge with a xhci host */
2014 switch (sd->bridge) {
2016 case BRIDGE_OV511PLUS:
2022 case BRIDGE_W9968CF:
2023 PDEBUG(D_USBO, "SET %02x %04x %04x",
2025 ret = usb_control_msg(sd->gspca_dev.dev,
2026 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2028 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2029 value, index, NULL, 0, 500);
2035 PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2037 sd->gspca_dev.usb_buf[0] = value;
2038 ret = usb_control_msg(sd->gspca_dev.dev,
2039 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2041 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2043 sd->gspca_dev.usb_buf, 1, 500);
2046 PERR("reg_w %02x failed %d\n", index, ret);
2047 sd->gspca_dev.usb_err = ret;
2052 /* Read from a OV519 register, note not valid for the w9968cf!! */
2053 /* returns: negative is error, pos or zero is data */
2054 static int reg_r(struct sd *sd, u16 index)
2056 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2060 if (sd->gspca_dev.usb_err < 0)
2063 switch (sd->bridge) {
2065 case BRIDGE_OV511PLUS:
2075 /* Avoid things going to fast for the bridge with a xhci host */
2077 ret = usb_control_msg(sd->gspca_dev.dev,
2078 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2080 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2081 0, index, sd->gspca_dev.usb_buf, 1, 500);
2084 ret = sd->gspca_dev.usb_buf[0];
2085 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2088 PERR("reg_r %02x failed %d\n", index, ret);
2089 sd->gspca_dev.usb_err = ret;
2091 * Make sure the result is zeroed to avoid uninitialized
2094 gspca_dev->usb_buf[0] = 0;
2100 /* Read 8 values from a OV519 register */
2101 static int reg_r8(struct sd *sd,
2104 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2107 if (sd->gspca_dev.usb_err < 0)
2110 /* Avoid things going to fast for the bridge with a xhci host */
2112 ret = usb_control_msg(sd->gspca_dev.dev,
2113 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2115 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2116 0, index, sd->gspca_dev.usb_buf, 8, 500);
2119 ret = sd->gspca_dev.usb_buf[0];
2121 PERR("reg_r8 %02x failed %d\n", index, ret);
2122 sd->gspca_dev.usb_err = ret;
2124 * Make sure the buffer is zeroed to avoid uninitialized
2127 memset(gspca_dev->usb_buf, 0, 8);
2134 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2135 * the same position as 1's in "mask" are cleared and set to "value". Bits
2136 * that are in the same position as 0's in "mask" are preserved, regardless
2137 * of their respective state in "value".
2139 static void reg_w_mask(struct sd *sd,
2148 value &= mask; /* Enforce mask on value */
2149 ret = reg_r(sd, index);
2153 oldval = ret & ~mask; /* Clear the masked bits */
2154 value |= oldval; /* Set the desired bits */
2156 reg_w(sd, index, value);
2160 * Writes multiple (n) byte value to a single register. Only valid with certain
2161 * registers (0x30 and 0xc4 - 0xce).
2163 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2165 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2168 if (sd->gspca_dev.usb_err < 0)
2171 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2173 /* Avoid things going to fast for the bridge with a xhci host */
2175 ret = usb_control_msg(sd->gspca_dev.dev,
2176 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2178 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2180 sd->gspca_dev.usb_buf, n, 500);
2182 PERR("reg_w32 %02x failed %d\n", index, ret);
2183 sd->gspca_dev.usb_err = ret;
2187 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2189 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2192 PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2194 /* Three byte write cycle */
2195 for (retries = 6; ; ) {
2196 /* Select camera register */
2197 reg_w(sd, R51x_I2C_SADDR_3, reg);
2199 /* Write "value" to I2C data port of OV511 */
2200 reg_w(sd, R51x_I2C_DATA, value);
2202 /* Initiate 3-byte write cycle */
2203 reg_w(sd, R511_I2C_CTL, 0x01);
2206 rc = reg_r(sd, R511_I2C_CTL);
2207 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2212 if ((rc & 2) == 0) /* Ack? */
2214 if (--retries < 0) {
2215 PDEBUG(D_USBO, "i2c write retries exhausted");
2221 static int ov511_i2c_r(struct sd *sd, u8 reg)
2223 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2224 int rc, value, retries;
2226 /* Two byte write cycle */
2227 for (retries = 6; ; ) {
2228 /* Select camera register */
2229 reg_w(sd, R51x_I2C_SADDR_2, reg);
2231 /* Initiate 2-byte write cycle */
2232 reg_w(sd, R511_I2C_CTL, 0x03);
2235 rc = reg_r(sd, R511_I2C_CTL);
2236 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2241 if ((rc & 2) == 0) /* Ack? */
2245 reg_w(sd, R511_I2C_CTL, 0x10);
2247 if (--retries < 0) {
2248 PDEBUG(D_USBI, "i2c write retries exhausted");
2253 /* Two byte read cycle */
2254 for (retries = 6; ; ) {
2255 /* Initiate 2-byte read cycle */
2256 reg_w(sd, R511_I2C_CTL, 0x05);
2259 rc = reg_r(sd, R511_I2C_CTL);
2260 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2265 if ((rc & 2) == 0) /* Ack? */
2269 reg_w(sd, R511_I2C_CTL, 0x10);
2271 if (--retries < 0) {
2272 PDEBUG(D_USBI, "i2c read retries exhausted");
2277 value = reg_r(sd, R51x_I2C_DATA);
2279 PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2281 /* This is needed to make i2c_w() work */
2282 reg_w(sd, R511_I2C_CTL, 0x05);
2288 * The OV518 I2C I/O procedure is different, hence, this function.
2289 * This is normally only called from i2c_w(). Note that this function
2290 * always succeeds regardless of whether the sensor is present and working.
2292 static void ov518_i2c_w(struct sd *sd,
2296 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2298 PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2300 /* Select camera register */
2301 reg_w(sd, R51x_I2C_SADDR_3, reg);
2303 /* Write "value" to I2C data port of OV511 */
2304 reg_w(sd, R51x_I2C_DATA, value);
2306 /* Initiate 3-byte write cycle */
2307 reg_w(sd, R518_I2C_CTL, 0x01);
2309 /* wait for write complete */
2311 reg_r8(sd, R518_I2C_CTL);
2315 * returns: negative is error, pos or zero is data
2317 * The OV518 I2C I/O procedure is different, hence, this function.
2318 * This is normally only called from i2c_r(). Note that this function
2319 * always succeeds regardless of whether the sensor is present and working.
2321 static int ov518_i2c_r(struct sd *sd, u8 reg)
2323 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2326 /* Select camera register */
2327 reg_w(sd, R51x_I2C_SADDR_2, reg);
2329 /* Initiate 2-byte write cycle */
2330 reg_w(sd, R518_I2C_CTL, 0x03);
2331 reg_r8(sd, R518_I2C_CTL);
2333 /* Initiate 2-byte read cycle */
2334 reg_w(sd, R518_I2C_CTL, 0x05);
2335 reg_r8(sd, R518_I2C_CTL);
2337 value = reg_r(sd, R51x_I2C_DATA);
2338 PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2342 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2344 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2347 if (sd->gspca_dev.usb_err < 0)
2350 ret = usb_control_msg(sd->gspca_dev.dev,
2351 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2353 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2354 (u16) value, (u16) reg, NULL, 0, 500);
2357 PERR("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2358 sd->gspca_dev.usb_err = ret;
2361 PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2364 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2366 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2369 if (sd->gspca_dev.usb_err < 0)
2372 ret = usb_control_msg(sd->gspca_dev.dev,
2373 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2375 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2376 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2379 ret = sd->gspca_dev.usb_buf[0];
2380 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2382 PERR("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2383 sd->gspca_dev.usb_err = ret;
2389 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2391 if (sd->sensor_reg_cache[reg] == value)
2394 switch (sd->bridge) {
2396 case BRIDGE_OV511PLUS:
2397 ov511_i2c_w(sd, reg, value);
2400 case BRIDGE_OV518PLUS:
2402 ov518_i2c_w(sd, reg, value);
2405 ovfx2_i2c_w(sd, reg, value);
2407 case BRIDGE_W9968CF:
2408 w9968cf_i2c_w(sd, reg, value);
2412 if (sd->gspca_dev.usb_err >= 0) {
2413 /* Up on sensor reset empty the register cache */
2414 if (reg == 0x12 && (value & 0x80))
2415 memset(sd->sensor_reg_cache, -1,
2416 sizeof(sd->sensor_reg_cache));
2418 sd->sensor_reg_cache[reg] = value;
2422 static int i2c_r(struct sd *sd, u8 reg)
2426 if (sd->sensor_reg_cache[reg] != -1)
2427 return sd->sensor_reg_cache[reg];
2429 switch (sd->bridge) {
2431 case BRIDGE_OV511PLUS:
2432 ret = ov511_i2c_r(sd, reg);
2435 case BRIDGE_OV518PLUS:
2437 ret = ov518_i2c_r(sd, reg);
2440 ret = ovfx2_i2c_r(sd, reg);
2442 case BRIDGE_W9968CF:
2443 ret = w9968cf_i2c_r(sd, reg);
2448 sd->sensor_reg_cache[reg] = ret;
2453 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2454 * the same position as 1's in "mask" are cleared and set to "value". Bits
2455 * that are in the same position as 0's in "mask" are preserved, regardless
2456 * of their respective state in "value".
2458 static void i2c_w_mask(struct sd *sd,
2466 value &= mask; /* Enforce mask on value */
2467 rc = i2c_r(sd, reg);
2470 oldval = rc & ~mask; /* Clear the masked bits */
2471 value |= oldval; /* Set the desired bits */
2472 i2c_w(sd, reg, value);
2475 /* Temporarily stops OV511 from functioning. Must do this before changing
2476 * registers while the camera is streaming */
2477 static inline void ov51x_stop(struct sd *sd)
2479 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2481 PDEBUG(D_STREAM, "stopping");
2483 switch (sd->bridge) {
2485 case BRIDGE_OV511PLUS:
2486 reg_w(sd, R51x_SYS_RESET, 0x3d);
2489 case BRIDGE_OV518PLUS:
2490 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2493 reg_w(sd, OV519_R51_RESET1, 0x0f);
2494 reg_w(sd, OV519_R51_RESET1, 0x00);
2495 reg_w(sd, 0x22, 0x00); /* FRAR */
2498 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2500 case BRIDGE_W9968CF:
2501 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2506 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2507 * actually stopped (for performance). */
2508 static inline void ov51x_restart(struct sd *sd)
2510 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2512 PDEBUG(D_STREAM, "restarting");
2517 /* Reinitialize the stream */
2518 switch (sd->bridge) {
2520 case BRIDGE_OV511PLUS:
2521 reg_w(sd, R51x_SYS_RESET, 0x00);
2524 case BRIDGE_OV518PLUS:
2525 reg_w(sd, 0x2f, 0x80);
2526 reg_w(sd, R51x_SYS_RESET, 0x00);
2529 reg_w(sd, OV519_R51_RESET1, 0x0f);
2530 reg_w(sd, OV519_R51_RESET1, 0x00);
2531 reg_w(sd, 0x22, 0x1d); /* FRAR */
2534 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2536 case BRIDGE_W9968CF:
2537 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2542 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2544 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2545 * is synchronized. Returns <0 on failure.
2547 static int init_ov_sensor(struct sd *sd, u8 slave)
2550 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2552 ov51x_set_slave_ids(sd, slave);
2554 /* Reset the sensor */
2555 i2c_w(sd, 0x12, 0x80);
2557 /* Wait for it to initialize */
2560 for (i = 0; i < i2c_detect_tries; i++) {
2561 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2562 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2563 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2567 /* Reset the sensor */
2568 i2c_w(sd, 0x12, 0x80);
2570 /* Wait for it to initialize */
2573 /* Dummy read to sync I2C */
2574 if (i2c_r(sd, 0x00) < 0)
2580 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2581 * and the read slave will be set to (slave + 1).
2582 * This should not be called from outside the i2c I/O functions.
2583 * Sets I2C read and write slave IDs. Returns <0 for error
2585 static void ov51x_set_slave_ids(struct sd *sd,
2588 switch (sd->bridge) {
2590 reg_w(sd, OVFX2_I2C_ADDR, slave);
2592 case BRIDGE_W9968CF:
2593 sd->sensor_addr = slave;
2597 reg_w(sd, R51x_I2C_W_SID, slave);
2598 reg_w(sd, R51x_I2C_R_SID, slave + 1);
2601 static void write_regvals(struct sd *sd,
2602 const struct ov_regvals *regvals,
2606 reg_w(sd, regvals->reg, regvals->val);
2611 static void write_i2c_regvals(struct sd *sd,
2612 const struct ov_i2c_regvals *regvals,
2616 i2c_w(sd, regvals->reg, regvals->val);
2621 /****************************************************************************
2623 * OV511 and sensor configuration
2625 ***************************************************************************/
2627 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2628 static void ov_hires_configure(struct sd *sd)
2630 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2633 if (sd->bridge != BRIDGE_OVFX2) {
2634 PERR("error hires sensors only supported with ovfx2\n");
2638 PDEBUG(D_PROBE, "starting ov hires configuration");
2640 /* Detect sensor (sub)type */
2641 high = i2c_r(sd, 0x0a);
2642 low = i2c_r(sd, 0x0b);
2643 /* info("%x, %x", high, low); */
2648 PDEBUG(D_PROBE, "Sensor is a OV2610");
2649 sd->sensor = SEN_OV2610;
2652 PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2653 sd->sensor = SEN_OV2610AE;
2656 PDEBUG(D_PROBE, "Sensor is a OV9600");
2657 sd->sensor = SEN_OV9600;
2662 if ((low & 0x0f) == 0x00) {
2663 PDEBUG(D_PROBE, "Sensor is a OV3610");
2664 sd->sensor = SEN_OV3610;
2669 PERR("Error unknown sensor type: %02x%02x\n", high, low);
2672 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2673 * the same register settings as the OV8610, since they are very similar.
2675 static void ov8xx0_configure(struct sd *sd)
2677 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2680 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2682 /* Detect sensor (sub)type */
2683 rc = i2c_r(sd, OV7610_REG_COM_I);
2685 PERR("Error detecting sensor type");
2689 sd->sensor = SEN_OV8610;
2691 PERR("Unknown image sensor version: %d\n", rc & 3);
2694 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2695 * the same register settings as the OV7610, since they are very similar.
2697 static void ov7xx0_configure(struct sd *sd)
2699 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2702 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2704 /* Detect sensor (sub)type */
2705 rc = i2c_r(sd, OV7610_REG_COM_I);
2708 * it appears to be wrongly detected as a 7610 by default */
2710 PERR("Error detecting sensor type\n");
2713 if ((rc & 3) == 3) {
2714 /* quick hack to make OV7670s work */
2715 high = i2c_r(sd, 0x0a);
2716 low = i2c_r(sd, 0x0b);
2717 /* info("%x, %x", high, low); */
2718 if (high == 0x76 && (low & 0xf0) == 0x70) {
2719 PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2720 sd->sensor = SEN_OV7670;
2722 PDEBUG(D_PROBE, "Sensor is an OV7610");
2723 sd->sensor = SEN_OV7610;
2725 } else if ((rc & 3) == 1) {
2726 /* I don't know what's different about the 76BE yet. */
2727 if (i2c_r(sd, 0x15) & 1) {
2728 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2729 sd->sensor = SEN_OV7620AE;
2731 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2732 sd->sensor = SEN_OV76BE;
2734 } else if ((rc & 3) == 0) {
2735 /* try to read product id registers */
2736 high = i2c_r(sd, 0x0a);
2738 PERR("Error detecting camera chip PID\n");
2741 low = i2c_r(sd, 0x0b);
2743 PERR("Error detecting camera chip VER\n");
2749 PERR("Sensor is an OV7630/OV7635\n");
2750 PERR("7630 is not supported by this driver\n");
2753 PDEBUG(D_PROBE, "Sensor is an OV7645");
2754 sd->sensor = SEN_OV7640; /* FIXME */
2757 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2758 sd->sensor = SEN_OV7640; /* FIXME */
2761 PDEBUG(D_PROBE, "Sensor is an OV7648");
2762 sd->sensor = SEN_OV7648;
2765 PDEBUG(D_PROBE, "Sensor is a OV7660");
2766 sd->sensor = SEN_OV7660;
2769 PERR("Unknown sensor: 0x76%02x\n", low);
2773 PDEBUG(D_PROBE, "Sensor is an OV7620");
2774 sd->sensor = SEN_OV7620;
2777 PERR("Unknown image sensor version: %d\n", rc & 3);
2781 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2782 static void ov6xx0_configure(struct sd *sd)
2784 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2787 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2789 /* Detect sensor (sub)type */
2790 rc = i2c_r(sd, OV7610_REG_COM_I);
2792 PERR("Error detecting sensor type\n");
2796 /* Ugh. The first two bits are the version bits, but
2797 * the entire register value must be used. I guess OVT
2798 * underestimated how many variants they would make. */
2801 sd->sensor = SEN_OV6630;
2802 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2805 sd->sensor = SEN_OV6620;
2806 PDEBUG(D_PROBE, "Sensor is an OV6620");
2809 sd->sensor = SEN_OV6630;
2810 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2813 sd->sensor = SEN_OV66308AF;
2814 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2817 sd->sensor = SEN_OV6630;
2818 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2821 PERR("FATAL: Unknown sensor version: 0x%02x\n", rc);
2825 /* Set sensor-specific vars */
2829 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2830 static void ov51x_led_control(struct sd *sd, int on)
2835 switch (sd->bridge) {
2836 /* OV511 has no LED control */
2837 case BRIDGE_OV511PLUS:
2838 reg_w(sd, R511_SYS_LED_CTL, on);
2841 case BRIDGE_OV518PLUS:
2842 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2845 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2850 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2852 struct sd *sd = (struct sd *) gspca_dev;
2854 if (!sd->snapshot_needs_reset)
2857 /* Note it is important that we clear sd->snapshot_needs_reset,
2858 before actually clearing the snapshot state in the bridge
2859 otherwise we might race with the pkt_scan interrupt handler */
2860 sd->snapshot_needs_reset = 0;
2862 switch (sd->bridge) {
2864 case BRIDGE_OV511PLUS:
2865 reg_w(sd, R51x_SYS_SNAP, 0x02);
2866 reg_w(sd, R51x_SYS_SNAP, 0x00);
2869 case BRIDGE_OV518PLUS:
2870 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2871 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2874 reg_w(sd, R51x_SYS_RESET, 0x40);
2875 reg_w(sd, R51x_SYS_RESET, 0x00);
2880 static void ov51x_upload_quan_tables(struct sd *sd)
2882 const unsigned char yQuanTable511[] = {
2883 0, 1, 1, 2, 2, 3, 3, 4,
2884 1, 1, 1, 2, 2, 3, 4, 4,
2885 1, 1, 2, 2, 3, 4, 4, 4,
2886 2, 2, 2, 3, 4, 4, 4, 4,
2887 2, 2, 3, 4, 4, 5, 5, 5,
2888 3, 3, 4, 4, 5, 5, 5, 5,
2889 3, 4, 4, 4, 5, 5, 5, 5,
2890 4, 4, 4, 4, 5, 5, 5, 5
2893 const unsigned char uvQuanTable511[] = {
2894 0, 2, 2, 3, 4, 4, 4, 4,
2895 2, 2, 2, 4, 4, 4, 4, 4,
2896 2, 2, 3, 4, 4, 4, 4, 4,
2897 3, 4, 4, 4, 4, 4, 4, 4,
2898 4, 4, 4, 4, 4, 4, 4, 4,
2899 4, 4, 4, 4, 4, 4, 4, 4,
2900 4, 4, 4, 4, 4, 4, 4, 4,
2901 4, 4, 4, 4, 4, 4, 4, 4
2904 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2905 const unsigned char yQuanTable518[] = {
2906 5, 4, 5, 6, 6, 7, 7, 7,
2907 5, 5, 5, 5, 6, 7, 7, 7,
2908 6, 6, 6, 6, 7, 7, 7, 8,
2909 7, 7, 6, 7, 7, 7, 8, 8
2911 const unsigned char uvQuanTable518[] = {
2912 6, 6, 6, 7, 7, 7, 7, 7,
2913 6, 6, 6, 7, 7, 7, 7, 7,
2914 6, 6, 6, 7, 7, 7, 7, 8,
2915 7, 7, 7, 7, 7, 7, 8, 8
2918 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2919 const unsigned char *pYTable, *pUVTable;
2920 unsigned char val0, val1;
2921 int i, size, reg = R51x_COMP_LUT_BEGIN;
2923 PDEBUG(D_PROBE, "Uploading quantization tables");
2925 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2926 pYTable = yQuanTable511;
2927 pUVTable = uvQuanTable511;
2930 pYTable = yQuanTable518;
2931 pUVTable = uvQuanTable518;
2935 for (i = 0; i < size; i++) {
2941 reg_w(sd, reg, val0);
2948 reg_w(sd, reg + size, val0);
2954 /* This initializes the OV511/OV511+ and the sensor */
2955 static void ov511_configure(struct gspca_dev *gspca_dev)
2957 struct sd *sd = (struct sd *) gspca_dev;
2959 /* For 511 and 511+ */
2960 const struct ov_regvals init_511[] = {
2961 { R51x_SYS_RESET, 0x7f },
2962 { R51x_SYS_INIT, 0x01 },
2963 { R51x_SYS_RESET, 0x7f },
2964 { R51x_SYS_INIT, 0x01 },
2965 { R51x_SYS_RESET, 0x3f },
2966 { R51x_SYS_INIT, 0x01 },
2967 { R51x_SYS_RESET, 0x3d },
2970 const struct ov_regvals norm_511[] = {
2971 { R511_DRAM_FLOW_CTL, 0x01 },
2972 { R51x_SYS_SNAP, 0x00 },
2973 { R51x_SYS_SNAP, 0x02 },
2974 { R51x_SYS_SNAP, 0x00 },
2975 { R511_FIFO_OPTS, 0x1f },
2976 { R511_COMP_EN, 0x00 },
2977 { R511_COMP_LUT_EN, 0x03 },
2980 const struct ov_regvals norm_511_p[] = {
2981 { R511_DRAM_FLOW_CTL, 0xff },
2982 { R51x_SYS_SNAP, 0x00 },
2983 { R51x_SYS_SNAP, 0x02 },
2984 { R51x_SYS_SNAP, 0x00 },
2985 { R511_FIFO_OPTS, 0xff },
2986 { R511_COMP_EN, 0x00 },
2987 { R511_COMP_LUT_EN, 0x03 },
2990 const struct ov_regvals compress_511[] = {
3001 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
3003 write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3005 switch (sd->bridge) {
3007 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3009 case BRIDGE_OV511PLUS:
3010 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3014 /* Init compression */
3015 write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3017 ov51x_upload_quan_tables(sd);
3020 /* This initializes the OV518/OV518+ and the sensor */
3021 static void ov518_configure(struct gspca_dev *gspca_dev)
3023 struct sd *sd = (struct sd *) gspca_dev;
3025 /* For 518 and 518+ */
3026 const struct ov_regvals init_518[] = {
3027 { R51x_SYS_RESET, 0x40 },
3028 { R51x_SYS_INIT, 0xe1 },
3029 { R51x_SYS_RESET, 0x3e },
3030 { R51x_SYS_INIT, 0xe1 },
3031 { R51x_SYS_RESET, 0x00 },
3032 { R51x_SYS_INIT, 0xe1 },
3037 const struct ov_regvals norm_518[] = {
3038 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3039 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3050 const struct ov_regvals norm_518_p[] = {
3051 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3052 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3069 /* First 5 bits of custom ID reg are a revision ID on OV518 */
3070 sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
3071 PDEBUG(D_PROBE, "Device revision %d", sd->revision);
3073 write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3075 /* Set LED GPIO pin to output mode */
3076 reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3078 switch (sd->bridge) {
3080 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3082 case BRIDGE_OV518PLUS:
3083 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3087 ov51x_upload_quan_tables(sd);
3089 reg_w(sd, 0x2f, 0x80);
3092 static void ov519_configure(struct sd *sd)
3094 static const struct ov_regvals init_519[] = {
3095 { 0x5a, 0x6d }, /* EnableSystem */
3096 { 0x53, 0x9b }, /* don't enable the microcontroller */
3097 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3101 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3102 * detection will fail. This deserves further investigation. */
3103 { OV519_GPIO_IO_CTRL0, 0xee },
3104 { OV519_R51_RESET1, 0x0f },
3105 { OV519_R51_RESET1, 0x00 },
3107 /* windows reads 0x55 at this point*/
3110 write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3113 static void ovfx2_configure(struct sd *sd)
3115 static const struct ov_regvals init_fx2[] = {
3127 write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3131 /* This function works for ov7660 only */
3132 static void ov519_set_mode(struct sd *sd)
3134 static const struct ov_regvals bridge_ov7660[2][10] = {
3135 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3136 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3137 {0x25, 0x01}, {0x26, 0x00}},
3138 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3139 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3140 {0x25, 0x03}, {0x26, 0x00}}
3142 static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3143 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3144 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3146 static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3147 {OV7670_R17_HSTART, 0x13},
3148 {OV7670_R18_HSTOP, 0x01},
3149 {OV7670_R32_HREF, 0x92},
3150 {OV7670_R19_VSTART, 0x02},
3151 {OV7670_R1A_VSTOP, 0x7a},
3152 {OV7670_R03_VREF, 0x00},
3159 write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3160 ARRAY_SIZE(bridge_ov7660[0]));
3161 write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3162 ARRAY_SIZE(sensor_ov7660[0]));
3163 write_i2c_regvals(sd, sensor_ov7660_2,
3164 ARRAY_SIZE(sensor_ov7660_2));
3167 /* set the frame rate */
3168 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3169 static void ov519_set_fr(struct sd *sd)
3173 /* frame rate table with indices:
3174 * - mode = 0: 320x240, 1: 640x480
3175 * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3176 * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3178 static const u8 fr_tb[2][6][3] = {
3179 {{0x04, 0xff, 0x00},
3184 {0x04, 0x01, 0x00}},
3185 {{0x0c, 0xff, 0x00},
3190 {0x04, 0x1b, 0x01}},
3194 sd->frame_rate = frame_rate;
3195 if (sd->frame_rate >= 30)
3197 else if (sd->frame_rate >= 25)
3199 else if (sd->frame_rate >= 20)
3201 else if (sd->frame_rate >= 15)
3203 else if (sd->frame_rate >= 10)
3207 reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3208 reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3209 clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3210 if (sd->sensor == SEN_OV7660)
3211 clock |= 0x80; /* enable double clock */
3212 ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3215 static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3217 struct sd *sd = (struct sd *) gspca_dev;
3219 i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3222 /* this function is called at probe time */
3223 static int sd_config(struct gspca_dev *gspca_dev,
3224 const struct usb_device_id *id)
3226 struct sd *sd = (struct sd *) gspca_dev;
3227 struct cam *cam = &gspca_dev->cam;
3229 sd->bridge = id->driver_info & BRIDGE_MASK;
3230 sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3232 switch (sd->bridge) {
3234 case BRIDGE_OV511PLUS:
3235 cam->cam_mode = ov511_vga_mode;
3236 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3239 case BRIDGE_OV518PLUS:
3240 cam->cam_mode = ov518_vga_mode;
3241 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3244 cam->cam_mode = ov519_vga_mode;
3245 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3248 cam->cam_mode = ov519_vga_mode;
3249 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3250 cam->bulk_size = OVFX2_BULK_SIZE;
3251 cam->bulk_nurbs = MAX_NURBS;
3254 case BRIDGE_W9968CF:
3255 cam->cam_mode = w9968cf_vga_mode;
3256 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3260 sd->frame_rate = 15;
3265 /* this function is called at probe and resume time */
3266 static int sd_init(struct gspca_dev *gspca_dev)
3268 struct sd *sd = (struct sd *) gspca_dev;
3269 struct cam *cam = &gspca_dev->cam;
3271 switch (sd->bridge) {
3273 case BRIDGE_OV511PLUS:
3274 ov511_configure(gspca_dev);
3277 case BRIDGE_OV518PLUS:
3278 ov518_configure(gspca_dev);
3281 ov519_configure(sd);
3284 ovfx2_configure(sd);
3286 case BRIDGE_W9968CF:
3287 w9968cf_configure(sd);
3291 /* The OV519 must be more aggressive about sensor detection since
3292 * I2C write will never fail if the sensor is not present. We have
3293 * to try to initialize the sensor to detect its presence */
3297 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3298 ov7xx0_configure(sd);
3301 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3302 ov6xx0_configure(sd);
3305 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3306 ov8xx0_configure(sd);
3308 /* Test for 3xxx / 2xxx */
3309 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3310 ov_hires_configure(sd);
3312 PERR("Can't determine sensor slave IDs\n");
3319 ov51x_led_control(sd, 0); /* turn LED off */
3321 switch (sd->bridge) {
3323 case BRIDGE_OV511PLUS:
3325 cam->cam_mode = ov511_sif_mode;
3326 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3330 case BRIDGE_OV518PLUS:
3332 cam->cam_mode = ov518_sif_mode;
3333 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3338 cam->cam_mode = ov519_sif_mode;
3339 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3343 switch (sd->sensor) {
3346 cam->cam_mode = ovfx2_ov2610_mode;
3347 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3350 cam->cam_mode = ovfx2_ov3610_mode;
3351 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3354 cam->cam_mode = ovfx2_ov9600_mode;
3355 cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3359 cam->cam_mode = ov519_sif_mode;
3360 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3365 case BRIDGE_W9968CF:
3367 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3369 /* w9968cf needs initialisation once the sensor is known */
3374 /* initialize the sensor */
3375 switch (sd->sensor) {
3377 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3379 /* Enable autogain, autoexpo, awb, bandfilter */
3380 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3383 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3385 /* enable autoexpo */
3386 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3389 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3391 /* Enable autogain, autoexpo, awb, bandfilter */
3392 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3395 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3399 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3402 /* case SEN_OV7610: */
3403 /* case SEN_OV76BE: */
3404 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3405 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3409 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3413 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3416 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3418 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3419 write_regvals(sd, init_519_ov7660,
3420 ARRAY_SIZE(init_519_ov7660));
3421 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3422 sd->gspca_dev.curr_mode = 1; /* 640x480 */
3425 sd_reset_snapshot(gspca_dev);
3427 ov51x_stop(sd); /* not in win traces */
3428 ov51x_led_control(sd, 0);
3431 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3434 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3437 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3439 /* enable autoexpo */
3440 /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3443 return gspca_dev->usb_err;
3445 PERR("OV519 Config failed");
3449 /* function called at start time before URB creation */
3450 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3452 struct sd *sd = (struct sd *) gspca_dev;
3454 switch (sd->bridge) {
3456 if (gspca_dev->pixfmt.width != 800)
3457 gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3459 gspca_dev->cam.bulk_size = 7 * 4096;
3465 /* Set up the OV511/OV511+ with the given image parameters.
3467 * Do not put any sensor-specific code in here (including I2C I/O functions)
3469 static void ov511_mode_init_regs(struct sd *sd)
3471 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3472 int hsegs, vsegs, packet_size, fps, needed;
3474 struct usb_host_interface *alt;
3475 struct usb_interface *intf;
3477 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3478 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3480 PERR("Couldn't get altsetting\n");
3481 sd->gspca_dev.usb_err = -EIO;
3485 if (alt->desc.bNumEndpoints < 1) {
3486 sd->gspca_dev.usb_err = -ENODEV;
3490 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3491 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3493 reg_w(sd, R511_CAM_UV_EN, 0x01);
3494 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3495 reg_w(sd, R511_SNAP_OPTS, 0x03);
3497 /* Here I'm assuming that snapshot size == image size.
3498 * I hope that's always true. --claudio
3500 hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
3501 vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
3503 reg_w(sd, R511_CAM_PXCNT, hsegs);
3504 reg_w(sd, R511_CAM_LNCNT, vsegs);
3505 reg_w(sd, R511_CAM_PXDIV, 0x00);
3506 reg_w(sd, R511_CAM_LNDIV, 0x00);
3508 /* YUV420, low pass filter on */
3509 reg_w(sd, R511_CAM_OPTS, 0x03);
3511 /* Snapshot additions */
3512 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3513 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3514 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3515 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3517 /******** Set the framerate ********/
3519 sd->frame_rate = frame_rate;
3521 switch (sd->sensor) {
3523 /* No framerate control, doesn't like higher rates yet */
3527 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3528 for more sensors we need to do this for them too */
3534 if (sd->gspca_dev.pixfmt.width == 320)
3540 switch (sd->frame_rate) {
3543 /* Not enough bandwidth to do 640x480 @ 30 fps */
3544 if (sd->gspca_dev.pixfmt.width != 640) {
3548 /* Fall through for 640x480 case */
3562 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3563 /* Higher then 10 does not work */
3564 if (sd->clockdiv > 10)
3570 /* No framerate control ?? */
3575 /* Check if we have enough bandwidth to disable compression */
3576 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3577 needed = fps * sd->gspca_dev.pixfmt.width *
3578 sd->gspca_dev.pixfmt.height * 3 / 2;
3579 /* 1000 isoc packets/sec */
3580 if (needed > 1000 * packet_size) {
3581 /* Enable Y and UV quantization and compression */
3582 reg_w(sd, R511_COMP_EN, 0x07);
3583 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3585 reg_w(sd, R511_COMP_EN, 0x06);
3586 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3589 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3590 reg_w(sd, R51x_SYS_RESET, 0);
3593 /* Sets up the OV518/OV518+ with the given image parameters
3595 * OV518 needs a completely different approach, until we can figure out what
3596 * the individual registers do. Also, only 15 FPS is supported now.
3598 * Do not put any sensor-specific code in here (including I2C I/O functions)
3600 static void ov518_mode_init_regs(struct sd *sd)
3602 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3603 int hsegs, vsegs, packet_size;
3604 struct usb_host_interface *alt;
3605 struct usb_interface *intf;
3607 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3608 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3610 PERR("Couldn't get altsetting\n");
3611 sd->gspca_dev.usb_err = -EIO;
3615 if (alt->desc.bNumEndpoints < 1) {
3616 sd->gspca_dev.usb_err = -ENODEV;
3620 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3621 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3623 /******** Set the mode ********/
3633 if (sd->bridge == BRIDGE_OV518) {
3634 /* Set 8-bit (YVYU) input format */
3635 reg_w_mask(sd, 0x20, 0x08, 0x08);
3637 /* Set 12-bit (4:2:0) output format */
3638 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3639 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3641 reg_w(sd, 0x28, 0x80);
3642 reg_w(sd, 0x38, 0x80);
3645 hsegs = sd->gspca_dev.pixfmt.width / 16;
3646 vsegs = sd->gspca_dev.pixfmt.height / 4;
3648 reg_w(sd, 0x29, hsegs);
3649 reg_w(sd, 0x2a, vsegs);
3651 reg_w(sd, 0x39, hsegs);
3652 reg_w(sd, 0x3a, vsegs);
3654 /* Windows driver does this here; who knows why */
3655 reg_w(sd, 0x2f, 0x80);
3657 /******** Set the framerate ********/
3658 if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
3659 sd->sensor == SEN_OV7620AE)
3664 /* Mode independent, but framerate dependent, regs */
3665 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3666 reg_w(sd, 0x51, 0x04);
3667 reg_w(sd, 0x22, 0x18);
3668 reg_w(sd, 0x23, 0xff);
3670 if (sd->bridge == BRIDGE_OV518PLUS) {
3671 switch (sd->sensor) {
3674 * HdG: 640x480 needs special handling on device
3675 * revision 2, we check for device revison > 0 to
3676 * avoid regressions, as we don't know the correct
3677 * thing todo for revision 1.
3679 * Also this likely means we don't need to
3680 * differentiate between the OV7620 and OV7620AE,
3681 * earlier testing hitting this same problem likely
3682 * happened to be with revision < 2 cams using an
3683 * OV7620 and revision 2 cams using an OV7620AE.
3685 if (sd->revision > 0 &&
3686 sd->gspca_dev.pixfmt.width == 640) {
3687 reg_w(sd, 0x20, 0x60);
3688 reg_w(sd, 0x21, 0x1f);
3690 reg_w(sd, 0x20, 0x00);
3691 reg_w(sd, 0x21, 0x19);
3695 reg_w(sd, 0x20, 0x00);
3696 reg_w(sd, 0x21, 0x19);
3699 reg_w(sd, 0x21, 0x19);
3702 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3704 /* FIXME: Sensor-specific */
3705 /* Bit 5 is what matters here. Of course, it is "reserved" */
3706 i2c_w(sd, 0x54, 0x23);
3708 reg_w(sd, 0x2f, 0x80);
3710 if (sd->bridge == BRIDGE_OV518PLUS) {
3711 reg_w(sd, 0x24, 0x94);
3712 reg_w(sd, 0x25, 0x90);
3713 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3714 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3715 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3716 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3717 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3718 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3719 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3720 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3721 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3723 reg_w(sd, 0x24, 0x9f);
3724 reg_w(sd, 0x25, 0x90);
3725 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3726 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3727 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3728 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3729 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3730 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3731 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3732 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3733 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3736 reg_w(sd, 0x2f, 0x80);
3739 /* Sets up the OV519 with the given image parameters
3741 * OV519 needs a completely different approach, until we can figure out what
3742 * the individual registers do.
3744 * Do not put any sensor-specific code in here (including I2C I/O functions)
3746 static void ov519_mode_init_regs(struct sd *sd)
3748 static const struct ov_regvals mode_init_519_ov7670[] = {
3749 { 0x5d, 0x03 }, /* Turn off suspend mode */
3750 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3751 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3752 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3756 { 0x37, 0x00 }, /* SetUsbInit */
3757 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3758 /* Enable both fields, YUV Input, disable defect comp (why?) */
3762 { 0x17, 0x50 }, /* undocumented */
3763 { 0x37, 0x00 }, /* undocumented */
3764 { 0x40, 0xff }, /* I2C timeout counter */
3765 { 0x46, 0x00 }, /* I2C clock prescaler */
3766 { 0x59, 0x04 }, /* new from windrv 090403 */
3767 { 0xff, 0x00 }, /* undocumented */
3768 /* windows reads 0x55 at this point, why? */
3771 static const struct ov_regvals mode_init_519[] = {
3772 { 0x5d, 0x03 }, /* Turn off suspend mode */
3773 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3774 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3775 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3779 { 0x37, 0x00 }, /* SetUsbInit */
3780 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3781 /* Enable both fields, YUV Input, disable defect comp (why?) */
3783 { 0x17, 0x50 }, /* undocumented */
3784 { 0x37, 0x00 }, /* undocumented */
3785 { 0x40, 0xff }, /* I2C timeout counter */
3786 { 0x46, 0x00 }, /* I2C clock prescaler */
3787 { 0x59, 0x04 }, /* new from windrv 090403 */
3788 { 0xff, 0x00 }, /* undocumented */
3789 /* windows reads 0x55 at this point, why? */
3792 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3794 /******** Set the mode ********/
3795 switch (sd->sensor) {
3797 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3798 if (sd->sensor == SEN_OV7640 ||
3799 sd->sensor == SEN_OV7648) {
3800 /* Select 8-bit input mode */
3801 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3805 return; /* done by ov519_set_mode/fr() */
3807 write_regvals(sd, mode_init_519_ov7670,
3808 ARRAY_SIZE(mode_init_519_ov7670));
3812 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.pixfmt.width >> 4);
3813 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.pixfmt.height >> 3);
3814 if (sd->sensor == SEN_OV7670 &&
3815 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3816 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3817 else if (sd->sensor == SEN_OV7648 &&
3818 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3819 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3821 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3822 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3823 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3824 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3825 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3826 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3827 reg_w(sd, 0x26, 0x00); /* Undocumented */
3829 /******** Set the framerate ********/
3831 sd->frame_rate = frame_rate;
3833 /* FIXME: These are only valid at the max resolution. */
3835 switch (sd->sensor) {
3838 switch (sd->frame_rate) {
3841 reg_w(sd, 0xa4, 0x0c);
3842 reg_w(sd, 0x23, 0xff);
3845 reg_w(sd, 0xa4, 0x0c);
3846 reg_w(sd, 0x23, 0x1f);
3849 reg_w(sd, 0xa4, 0x0c);
3850 reg_w(sd, 0x23, 0x1b);
3853 reg_w(sd, 0xa4, 0x04);
3854 reg_w(sd, 0x23, 0xff);
3858 reg_w(sd, 0xa4, 0x04);
3859 reg_w(sd, 0x23, 0x1f);
3863 reg_w(sd, 0xa4, 0x04);
3864 reg_w(sd, 0x23, 0x1b);
3870 switch (sd->frame_rate) {
3871 default: /* 15 fps */
3873 reg_w(sd, 0xa4, 0x06);
3874 reg_w(sd, 0x23, 0xff);
3877 reg_w(sd, 0xa4, 0x06);
3878 reg_w(sd, 0x23, 0x1f);
3881 reg_w(sd, 0xa4, 0x06);
3882 reg_w(sd, 0x23, 0x1b);
3886 case SEN_OV7670: /* guesses, based on 7640 */
3887 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3888 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3889 reg_w(sd, 0xa4, 0x10);
3890 switch (sd->frame_rate) {
3892 reg_w(sd, 0x23, 0xff);
3895 reg_w(sd, 0x23, 0x1b);
3899 reg_w(sd, 0x23, 0xff);
3907 static void mode_init_ov_sensor_regs(struct sd *sd)
3909 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3910 int qvga, xstart, xend, ystart, yend;
3913 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3915 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3916 switch (sd->sensor) {
3918 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3919 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3920 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3921 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3922 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3923 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3924 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3926 case SEN_OV2610AE: {
3930 * 10fps / 5 fps for 1600x1200
3931 * 40fps / 20fps for 800x600
3935 if (sd->frame_rate < 25)
3938 if (sd->frame_rate < 10)
3942 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3947 xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
3949 ystart = (776 - gspca_dev->pixfmt.height) / 2;
3951 xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
3953 ystart = (1544 - gspca_dev->pixfmt.height) / 2;
3955 xend = xstart + gspca_dev->pixfmt.width;
3956 yend = ystart + gspca_dev->pixfmt.height;
3957 /* Writing to the COMH register resets the other windowing regs
3958 to their default values, so we must do this first. */
3959 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3960 i2c_w_mask(sd, 0x32,
3961 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3963 i2c_w_mask(sd, 0x03,
3964 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3966 i2c_w(sd, 0x17, xstart >> 4);
3967 i2c_w(sd, 0x18, xend >> 4);
3968 i2c_w(sd, 0x19, ystart >> 3);
3969 i2c_w(sd, 0x1a, yend >> 3);
3972 /* For OV8610 qvga means qsvga */
3973 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3974 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3975 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3976 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3977 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3980 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3981 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3982 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3983 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3988 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3989 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3990 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3991 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3992 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3993 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3994 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3995 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3996 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3997 if (sd->sensor == SEN_OV76BE)
3998 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4002 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4003 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4004 /* Setting this undocumented bit in qvga mode removes a very
4005 annoying vertical shaking of the image */
4006 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4008 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4009 /* Allow higher automatic gain (to allow higher framerates) */
4010 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4011 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4014 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4015 * do we need to set anything else?
4016 * HSTART etc are set in set_ov_sensor_window itself */
4017 i2c_w_mask(sd, OV7670_R12_COM7,
4018 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4019 OV7670_COM7_FMT_MASK);
4020 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4021 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4023 if (qvga) { /* QVGA from ov7670.c by
4024 * Jonathan Corbet */
4035 /* OV7670 hardware window registers are split across
4036 * multiple locations */
4037 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4038 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4039 v = i2c_r(sd, OV7670_R32_HREF);
4040 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4041 msleep(10); /* need to sleep between read and write to
4043 i2c_w(sd, OV7670_R32_HREF, v);
4045 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4046 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4047 v = i2c_r(sd, OV7670_R03_VREF);
4048 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4049 msleep(10); /* need to sleep between read and write to
4051 i2c_w(sd, OV7670_R03_VREF, v);
4054 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4055 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4056 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4060 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4061 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4064 const struct ov_i2c_regvals *vals;
4065 static const struct ov_i2c_regvals sxga_15[] = {
4066 {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4068 static const struct ov_i2c_regvals sxga_7_5[] = {
4069 {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4071 static const struct ov_i2c_regvals vga_30[] = {
4072 {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4074 static const struct ov_i2c_regvals vga_15[] = {
4075 {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4079 * 15fps / 7.5 fps for 1280x1024
4080 * 30fps / 15fps for 640x480
4082 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4084 vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4086 vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4087 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4094 /******** Clock programming ********/
4095 i2c_w(sd, 0x11, sd->clockdiv);
4098 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4099 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4101 struct sd *sd = (struct sd *) gspca_dev;
4103 if (sd->gspca_dev.streaming)
4104 reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
4105 i2c_w_mask(sd, OV7670_R1E_MVFP,
4106 OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4107 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4108 if (sd->gspca_dev.streaming)
4109 reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
4112 static void set_ov_sensor_window(struct sd *sd)
4114 struct gspca_dev *gspca_dev;
4116 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4118 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4119 switch (sd->sensor) {
4125 mode_init_ov_sensor_regs(sd);
4133 gspca_dev = &sd->gspca_dev;
4134 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4135 crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4137 /* The different sensor ICs handle setting up of window differently.
4138 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4139 switch (sd->sensor) {
4150 vwsbase = vwebase = 0x05;
4159 if (sd->sensor == SEN_OV66308AF && qvga)
4160 /* HDG: this fixes U and V getting swapped */
4171 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
4173 vwsbase = vwebase = 0x05;
4179 vwsbase = vwebase = 0x03;
4185 switch (sd->sensor) {
4189 if (qvga) { /* QCIF */
4194 vwscale = 1; /* The datasheet says 0;
4199 if (qvga) { /* QSVGA */
4207 default: /* SEN_OV7xx0 */
4208 if (qvga) { /* QVGA */
4217 mode_init_ov_sensor_regs(sd);
4219 i2c_w(sd, 0x17, hwsbase);
4220 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4221 i2c_w(sd, 0x19, vwsbase);
4222 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4225 /* -- start the camera -- */
4226 static int sd_start(struct gspca_dev *gspca_dev)
4228 struct sd *sd = (struct sd *) gspca_dev;
4230 /* Default for most bridges, allow bridge_mode_init_regs to override */
4231 sd->sensor_width = sd->gspca_dev.pixfmt.width;
4232 sd->sensor_height = sd->gspca_dev.pixfmt.height;
4234 switch (sd->bridge) {
4236 case BRIDGE_OV511PLUS:
4237 ov511_mode_init_regs(sd);
4240 case BRIDGE_OV518PLUS:
4241 ov518_mode_init_regs(sd);
4244 ov519_mode_init_regs(sd);
4246 /* case BRIDGE_OVFX2: nothing to do */
4247 case BRIDGE_W9968CF:
4248 w9968cf_mode_init_regs(sd);
4252 set_ov_sensor_window(sd);
4254 /* Force clear snapshot state in case the snapshot button was
4255 pressed while we weren't streaming */
4256 sd->snapshot_needs_reset = 1;
4257 sd_reset_snapshot(gspca_dev);
4259 sd->first_frame = 3;
4262 ov51x_led_control(sd, 1);
4263 return gspca_dev->usb_err;
4266 static void sd_stopN(struct gspca_dev *gspca_dev)
4268 struct sd *sd = (struct sd *) gspca_dev;
4271 ov51x_led_control(sd, 0);
4274 static void sd_stop0(struct gspca_dev *gspca_dev)
4276 struct sd *sd = (struct sd *) gspca_dev;
4278 if (!sd->gspca_dev.present)
4280 if (sd->bridge == BRIDGE_W9968CF)
4283 #if IS_ENABLED(CONFIG_INPUT)
4284 /* If the last button state is pressed, release it now! */
4285 if (sd->snapshot_pressed) {
4286 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4287 input_sync(gspca_dev->input_dev);
4288 sd->snapshot_pressed = 0;
4291 if (sd->bridge == BRIDGE_OV519)
4292 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4295 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4297 struct sd *sd = (struct sd *) gspca_dev;
4299 if (sd->snapshot_pressed != state) {
4300 #if IS_ENABLED(CONFIG_INPUT)
4301 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4302 input_sync(gspca_dev->input_dev);
4305 sd->snapshot_needs_reset = 1;
4307 sd->snapshot_pressed = state;
4309 /* On the ov511 / ov519 we need to reset the button state
4310 multiple times, as resetting does not work as long as the
4311 button stays pressed */
4312 switch (sd->bridge) {
4314 case BRIDGE_OV511PLUS:
4317 sd->snapshot_needs_reset = 1;
4323 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4324 u8 *in, /* isoc packet */
4325 int len) /* iso packet length */
4327 struct sd *sd = (struct sd *) gspca_dev;
4329 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4330 * byte non-zero. The EOF packet has image width/height in the
4331 * 10th and 11th bytes. The 9th byte is given as follows:
4334 * 6: compression enabled
4335 * 5: 422/420/400 modes
4336 * 4: 422/420/400 modes
4338 * 2: snapshot button on
4342 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4344 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4347 if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
4348 (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
4349 PERR("Invalid frame size, got: %dx%d,"
4350 " requested: %dx%d\n",
4351 (in[9] + 1) * 8, (in[10] + 1) * 8,
4352 gspca_dev->pixfmt.width,
4353 gspca_dev->pixfmt.height);
4354 gspca_dev->last_packet_type = DISCARD_PACKET;
4357 /* Add 11 byte footer to frame, might be useful */
4358 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4362 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4367 /* Ignore the packet number */
4370 /* intermediate packet */
4371 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4374 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4375 u8 *data, /* isoc packet */
4376 int len) /* iso packet length */
4378 struct sd *sd = (struct sd *) gspca_dev;
4380 /* A false positive here is likely, until OVT gives me
4381 * the definitive SOF/EOF format */
4382 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4383 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4384 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4385 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4389 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4392 /* Does this device use packet numbers ? */
4395 if (sd->packet_nr == data[len])
4397 /* The last few packets of the frame (which are all 0's
4398 except that they may contain part of the footer), are
4400 else if (sd->packet_nr == 0 || data[len]) {
4401 PERR("Invalid packet nr: %d (expect: %d)",
4402 (int)data[len], (int)sd->packet_nr);
4403 gspca_dev->last_packet_type = DISCARD_PACKET;
4408 /* intermediate packet */
4409 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4412 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4413 u8 *data, /* isoc packet */
4414 int len) /* iso packet length */
4416 /* Header of ov519 is 16 bytes:
4417 * Byte Value Description
4421 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4422 * 9 0xXX 0x01 initial frame without data,
4423 * 0x00 standard frame with image
4424 * 14 Lo in EOF: length of image data / 8
4428 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4430 case 0x50: /* start of frame */
4431 /* Don't check the button state here, as the state
4432 usually (always ?) changes at EOF and checking it
4433 here leads to unnecessary snapshot state resets. */
4438 if (data[0] == 0xff || data[1] == 0xd8)
4439 gspca_frame_add(gspca_dev, FIRST_PACKET,
4442 gspca_dev->last_packet_type = DISCARD_PACKET;
4444 case 0x51: /* end of frame */
4445 ov51x_handle_button(gspca_dev, data[11] & 1);
4447 gspca_dev->last_packet_type = DISCARD_PACKET;
4448 gspca_frame_add(gspca_dev, LAST_PACKET,
4454 /* intermediate packet */
4455 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4458 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4459 u8 *data, /* isoc packet */
4460 int len) /* iso packet length */
4462 struct sd *sd = (struct sd *) gspca_dev;
4464 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4466 /* A short read signals EOF */
4467 if (len < gspca_dev->cam.bulk_size) {
4468 /* If the frame is short, and it is one of the first ones
4469 the sensor and bridge are still syncing, so drop it. */
4470 if (sd->first_frame) {
4472 if (gspca_dev->image_len <
4473 sd->gspca_dev.pixfmt.width *
4474 sd->gspca_dev.pixfmt.height)
4475 gspca_dev->last_packet_type = DISCARD_PACKET;
4477 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4478 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4482 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4483 u8 *data, /* isoc packet */
4484 int len) /* iso packet length */
4486 struct sd *sd = (struct sd *) gspca_dev;
4488 switch (sd->bridge) {
4490 case BRIDGE_OV511PLUS:
4491 ov511_pkt_scan(gspca_dev, data, len);
4494 case BRIDGE_OV518PLUS:
4495 ov518_pkt_scan(gspca_dev, data, len);
4498 ov519_pkt_scan(gspca_dev, data, len);
4501 ovfx2_pkt_scan(gspca_dev, data, len);
4503 case BRIDGE_W9968CF:
4504 w9968cf_pkt_scan(gspca_dev, data, len);
4509 /* -- management routines -- */
4511 static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4513 struct sd *sd = (struct sd *) gspca_dev;
4514 static const struct ov_i2c_regvals brit_7660[][7] = {
4515 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4516 {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4517 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4518 {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4519 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4520 {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4521 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4522 {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4523 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4524 {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4525 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4526 {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4527 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4528 {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4531 switch (sd->sensor) {
4540 i2c_w(sd, OV7610_REG_BRT, val);
4544 i2c_w(sd, OV7610_REG_BRT, val);
4547 write_i2c_regvals(sd, brit_7660[val],
4548 ARRAY_SIZE(brit_7660[0]));
4552 * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4553 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4558 static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4560 struct sd *sd = (struct sd *) gspca_dev;
4561 static const struct ov_i2c_regvals contrast_7660[][31] = {
4562 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4563 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4564 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4565 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4566 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4567 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4568 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4569 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4570 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4571 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4572 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4573 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4574 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4575 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4576 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4577 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4578 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4579 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4580 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4581 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4582 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4583 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4584 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4585 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4586 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4587 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4588 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4589 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4590 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4591 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4592 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4593 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4594 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4595 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4596 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4597 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4598 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4599 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4600 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4601 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4602 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4603 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4604 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4605 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4606 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4607 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4608 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4609 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4610 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4611 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4612 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4613 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4614 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4615 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4616 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4617 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4620 switch (sd->sensor) {
4623 i2c_w(sd, OV7610_REG_CNT, val);
4627 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4630 static const u8 ctab[] = {
4631 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4634 /* Use Y gamma control instead. Bit 0 enables it. */
4635 i2c_w(sd, 0x64, ctab[val >> 5]);
4639 case SEN_OV7620AE: {
4640 static const u8 ctab[] = {
4641 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4642 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4645 /* Use Y gamma control instead. Bit 0 enables it. */
4646 i2c_w(sd, 0x64, ctab[val >> 4]);
4650 write_i2c_regvals(sd, contrast_7660[val],
4651 ARRAY_SIZE(contrast_7660[0]));
4654 /* check that this isn't just the same as ov7610 */
4655 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4660 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4662 struct sd *sd = (struct sd *) gspca_dev;
4664 i2c_w(sd, 0x10, val);
4667 static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4669 struct sd *sd = (struct sd *) gspca_dev;
4670 static const struct ov_i2c_regvals colors_7660[][6] = {
4671 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4672 {0x53, 0x19}, {0x54, 0x23}},
4673 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4674 {0x53, 0x2c}, {0x54, 0x3e}},
4675 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4676 {0x53, 0x40}, {0x54, 0x59}},
4677 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4678 {0x53, 0x53}, {0x54, 0x73}},
4679 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4680 {0x53, 0x66}, {0x54, 0x8e}},
4683 switch (sd->sensor) {
4690 i2c_w(sd, OV7610_REG_SAT, val);
4694 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4695 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4698 i2c_w(sd, OV7610_REG_SAT, val);
4702 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4705 write_i2c_regvals(sd, colors_7660[val],
4706 ARRAY_SIZE(colors_7660[0]));
4709 /* supported later once I work out how to do it
4710 * transparently fail now! */
4711 /* set REG_COM13 values for UV sat auto mode */
4716 static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4718 struct sd *sd = (struct sd *) gspca_dev;
4720 i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4723 static void setfreq_i(struct sd *sd, s32 val)
4725 if (sd->sensor == SEN_OV7660
4726 || sd->sensor == SEN_OV7670) {
4728 case 0: /* Banding filter disabled */
4729 i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4732 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4734 i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4737 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4739 i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4741 case 3: /* Auto hz - ov7670 only */
4742 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4744 i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4750 case 0: /* Banding filter disabled */
4751 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4752 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4754 case 1: /* 50 hz (filter on and framerate adj) */
4755 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4756 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4757 /* 20 fps -> 16.667 fps */
4758 if (sd->sensor == SEN_OV6620 ||
4759 sd->sensor == SEN_OV6630 ||
4760 sd->sensor == SEN_OV66308AF)
4761 i2c_w(sd, 0x2b, 0x5e);
4763 i2c_w(sd, 0x2b, 0xac);
4765 case 2: /* 60 hz (filter on, ...) */
4766 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4767 if (sd->sensor == SEN_OV6620 ||
4768 sd->sensor == SEN_OV6630 ||
4769 sd->sensor == SEN_OV66308AF) {
4770 /* 20 fps -> 15 fps */
4771 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4772 i2c_w(sd, 0x2b, 0xa8);
4774 /* no framerate adj. */
4775 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4782 static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4784 struct sd *sd = (struct sd *) gspca_dev;
4788 /* Ugly but necessary */
4789 if (sd->bridge == BRIDGE_W9968CF)
4790 w9968cf_set_crop_window(sd);
4793 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4794 struct v4l2_jpegcompression *jcomp)
4796 struct sd *sd = (struct sd *) gspca_dev;
4798 if (sd->bridge != BRIDGE_W9968CF)
4801 memset(jcomp, 0, sizeof *jcomp);
4802 jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4803 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4804 V4L2_JPEG_MARKER_DRI;
4808 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4809 const struct v4l2_jpegcompression *jcomp)
4811 struct sd *sd = (struct sd *) gspca_dev;
4813 if (sd->bridge != BRIDGE_W9968CF)
4816 v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4820 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4822 struct gspca_dev *gspca_dev =
4823 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4824 struct sd *sd = (struct sd *)gspca_dev;
4826 gspca_dev->usb_err = 0;
4829 case V4L2_CID_AUTOGAIN:
4830 gspca_dev->exposure->val = i2c_r(sd, 0x10);
4836 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4838 struct gspca_dev *gspca_dev =
4839 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4840 struct sd *sd = (struct sd *)gspca_dev;
4842 gspca_dev->usb_err = 0;
4844 if (!gspca_dev->streaming)
4848 case V4L2_CID_BRIGHTNESS:
4849 setbrightness(gspca_dev, ctrl->val);
4851 case V4L2_CID_CONTRAST:
4852 setcontrast(gspca_dev, ctrl->val);
4854 case V4L2_CID_POWER_LINE_FREQUENCY:
4855 setfreq(gspca_dev, ctrl->val);
4857 case V4L2_CID_AUTOBRIGHTNESS:
4859 setautobright(gspca_dev, ctrl->val);
4860 if (!ctrl->val && sd->brightness->is_new)
4861 setbrightness(gspca_dev, sd->brightness->val);
4863 case V4L2_CID_SATURATION:
4864 setcolors(gspca_dev, ctrl->val);
4866 case V4L2_CID_HFLIP:
4867 sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4869 case V4L2_CID_AUTOGAIN:
4871 setautogain(gspca_dev, ctrl->val);
4872 if (!ctrl->val && gspca_dev->exposure->is_new)
4873 setexposure(gspca_dev, gspca_dev->exposure->val);
4875 case V4L2_CID_JPEG_COMPRESSION_QUALITY:
4876 return -EBUSY; /* Should never happen, as we grab the ctrl */
4878 return gspca_dev->usb_err;
4881 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4882 .g_volatile_ctrl = sd_g_volatile_ctrl,
4883 .s_ctrl = sd_s_ctrl,
4886 static int sd_init_controls(struct gspca_dev *gspca_dev)
4888 struct sd *sd = (struct sd *)gspca_dev;
4889 struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4891 gspca_dev->vdev.ctrl_handler = hdl;
4892 v4l2_ctrl_handler_init(hdl, 10);
4893 if (valid_controls[sd->sensor].has_brightness)
4894 sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4895 V4L2_CID_BRIGHTNESS, 0,
4896 sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4897 sd->sensor == SEN_OV7660 ? 3 : 127);
4898 if (valid_controls[sd->sensor].has_contrast) {
4899 if (sd->sensor == SEN_OV7660)
4900 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4901 V4L2_CID_CONTRAST, 0, 6, 1, 3);
4903 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4904 V4L2_CID_CONTRAST, 0, 255, 1,
4905 (sd->sensor == SEN_OV6630 ||
4906 sd->sensor == SEN_OV66308AF) ? 200 : 127);
4908 if (valid_controls[sd->sensor].has_sat)
4909 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4910 V4L2_CID_SATURATION, 0,
4911 sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4912 sd->sensor == SEN_OV7660 ? 2 : 127);
4913 if (valid_controls[sd->sensor].has_exposure)
4914 gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4915 V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4916 if (valid_controls[sd->sensor].has_hvflip) {
4917 sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4918 V4L2_CID_HFLIP, 0, 1, 1, 0);
4919 sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4920 V4L2_CID_VFLIP, 0, 1, 1, 0);
4922 if (valid_controls[sd->sensor].has_autobright)
4923 sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4924 V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4925 if (valid_controls[sd->sensor].has_autogain)
4926 gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4927 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4928 if (valid_controls[sd->sensor].has_freq) {
4929 if (sd->sensor == SEN_OV7670)
4930 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4931 V4L2_CID_POWER_LINE_FREQUENCY,
4932 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
4933 V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
4935 sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4936 V4L2_CID_POWER_LINE_FREQUENCY,
4937 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
4939 if (sd->bridge == BRIDGE_W9968CF)
4940 sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4941 V4L2_CID_JPEG_COMPRESSION_QUALITY,
4942 QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
4945 PERR("Could not initialize controls\n");
4948 if (gspca_dev->autogain)
4949 v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4951 v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4953 v4l2_ctrl_cluster(2, &sd->hflip);
4957 /* sub-driver description */
4958 static const struct sd_desc sd_desc = {
4959 .name = MODULE_NAME,
4960 .config = sd_config,
4962 .init_controls = sd_init_controls,
4963 .isoc_init = sd_isoc_init,
4967 .pkt_scan = sd_pkt_scan,
4968 .dq_callback = sd_reset_snapshot,
4969 .get_jcomp = sd_get_jcomp,
4970 .set_jcomp = sd_set_jcomp,
4971 #if IS_ENABLED(CONFIG_INPUT)
4976 /* -- module initialisation -- */
4977 static const struct usb_device_id device_table[] = {
4978 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4979 {USB_DEVICE(0x041e, 0x4052),
4980 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4981 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4982 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4983 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4984 {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
4985 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4986 {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
4987 {USB_DEVICE(0x045e, 0x028c),
4988 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4989 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4990 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4991 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4992 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4993 {USB_DEVICE(0x05a9, 0x0519),
4994 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4995 {USB_DEVICE(0x05a9, 0x0530),
4996 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4997 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4998 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4999 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
5000 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
5001 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
5002 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
5003 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5004 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5005 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5006 {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5010 MODULE_DEVICE_TABLE(usb, device_table);
5012 /* -- device connect -- */
5013 static int sd_probe(struct usb_interface *intf,
5014 const struct usb_device_id *id)
5016 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5020 static struct usb_driver sd_driver = {
5021 .name = MODULE_NAME,
5022 .id_table = device_table,
5024 .disconnect = gspca_disconnect,
5026 .suspend = gspca_suspend,
5027 .resume = gspca_resume,
5028 .reset_resume = gspca_resume,
5032 module_usb_driver(sd_driver);
5034 module_param(frame_rate, int, 0644);
5035 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");