1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Includes for cdc-acm.c
6 * Mainly take from usbnet's cdc-ether part
11 * CMSPAR, some architectures can't have space and mark parity.
19 * Major and minor numbers.
22 #define ACM_TTY_MAJOR 166
23 #define ACM_TTY_MINORS 256
25 #define ACM_MINOR_INVALID ACM_TTY_MINORS
31 #define USB_RT_ACM (USB_TYPE_CLASS | USB_RECIP_INTERFACE)
34 * Output control lines.
37 #define ACM_CTRL_DTR 0x01
38 #define ACM_CTRL_RTS 0x02
41 * Input control lines and line errors.
44 #define ACM_CTRL_DCD 0x01
45 #define ACM_CTRL_DSR 0x02
46 #define ACM_CTRL_BRK 0x04
47 #define ACM_CTRL_RI 0x08
49 #define ACM_CTRL_FRAMING 0x10
50 #define ACM_CTRL_PARITY 0x20
51 #define ACM_CTRL_OVERRUN 0x40
54 * Internal driver structures.
58 * The only reason to have several buffers is to accommodate assumptions
59 * in line disciplines. They ask for empty space amount, receive our URB size,
60 * and proceed to issue several 1-character writes, assuming they will fit.
61 * The very first write takes a complete URB. Fortunately, this only happens
62 * when processing onlcr, so we only need 2 buffers. These values must be
86 struct usb_device *dev; /* the corresponding usb device */
87 struct usb_interface *control; /* control interface */
88 struct usb_interface *data; /* data interface */
89 unsigned in, out; /* i/o pipes */
90 struct tty_port port; /* our tty port data */
91 struct urb *ctrlurb; /* urbs */
92 u8 *ctrl_buffer; /* buffers of urbs */
93 dma_addr_t ctrl_dma; /* dma handles of buffers */
94 u8 *country_codes; /* country codes from device */
95 unsigned int country_code_size; /* size of this buffer */
96 unsigned int country_rel_date; /* release date of version */
97 struct acm_wb wb[ACM_NW];
98 unsigned long read_urbs_free;
99 struct urb *read_urbs[ACM_NR];
100 struct acm_rb read_buffers[ACM_NR];
102 spinlock_t read_lock;
103 u8 *notification_buffer; /* to reassemble fragmented notifications */
104 unsigned int nb_index;
105 unsigned int nb_size;
107 spinlock_t write_lock;
111 # define EVENT_TTY_WAKEUP 0
112 # define EVENT_RX_STALL 1
113 # define ACM_ERROR_DELAY 3
114 unsigned long urbs_in_error_delay; /* these need to be restarted after a delay */
115 struct usb_cdc_line_coding line; /* bits, stop, parity */
116 struct delayed_work dwork; /* work queue entry for various purposes */
117 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */
118 unsigned int ctrlout; /* output control lines (DTR, RTS) */
119 struct async_icount iocount; /* counters for control line changes */
120 struct async_icount oldcount; /* for comparison of counter */
121 wait_queue_head_t wioctl; /* for ioctl */
122 unsigned int writesize; /* max packet size for the output bulk endpoint */
123 unsigned int readsize,ctrlsize; /* buffer sizes for freeing */
124 unsigned int minor; /* acm minor number */
125 unsigned char clocal; /* termios CLOCAL */
126 unsigned int ctrl_caps; /* control capabilities from the class specific header */
127 unsigned int susp_count; /* number of suspended interfaces */
128 unsigned int combined_interfaces:1; /* control and data collapsed */
129 unsigned int throttled:1; /* actually throttled */
130 unsigned int throttle_req:1; /* throttle requested */
132 struct usb_anchor delayed; /* writes queued for a device about to be woken */
133 unsigned long quirks;
136 #define CDC_DATA_INTERFACE_TYPE 0x0a
138 /* constants describing various quirks and errors */
139 #define NO_UNION_NORMAL BIT(0)
140 #define SINGLE_RX_URB BIT(1)
141 #define NO_CAP_LINE BIT(2)
142 #define NO_DATA_INTERFACE BIT(4)
143 #define IGNORE_DEVICE BIT(5)
144 #define QUIRK_CONTROL_LINE_STATE BIT(6)
145 #define CLEAR_HALT_CONDITIONS BIT(7)
146 #define SEND_ZERO_PACKET BIT(8)
147 #define DISABLE_ECHO BIT(9)