2 * Copyright 2015, Michael Neuling, IBM Corp.
3 * Licensed under GPLv2.
5 * Test the kernel's signal return code to ensure that it doesn't
6 * crash when both the transactional and suspend MSR bits are set in
9 * For this test, we send ourselves a SIGUSR1. In the SIGUSR1 handler
10 * we modify the signal context to set both MSR TM S and T bits (which
11 * is "reserved" by the PowerISA). When we return from the signal
12 * handler (implicit sigreturn), the kernel should detect reserved MSR
13 * value and send us with a SIGSEGV.
24 int segv_expected = 0;
26 void signal_segv(int signum)
28 if (segv_expected && (signum == SIGSEGV))
33 void signal_usr1(int signum, siginfo_t *info, void *uc)
37 /* Link tm checkpointed context to normal context */
39 /* Set all TM bits so that the context is now invalid */
41 ucp->uc_mcontext.gp_regs[PT_MSR] |= (7ULL << 32);
43 ucp->uc_mcontext.uc_regs->gregs[PT_MSR] |= (7ULL);
45 /* Should segv on return becuase of invalid context */
49 int tm_signal_msr_resv()
55 act.sa_sigaction = signal_usr1;
56 sigemptyset(&act.sa_mask);
57 act.sa_flags = SA_SIGINFO;
58 if (sigaction(SIGUSR1, &act, NULL) < 0) {
59 perror("sigaction sigusr1");
62 if (signal(SIGSEGV, signal_segv) == SIG_ERR)
67 /* We shouldn't get here as we exit in the segv handler */
73 return test_harness(tm_signal_msr_resv, "tm_signal_msr_resv");