1 // SPDX-License-Identifier: GPL-2.0
7 int __weak arch_sdt_arg_parse_op(char *old_op __maybe_unused,
8 char **new_op __maybe_unused)
13 uint64_t __weak arch__intr_reg_mask(void)
15 return PERF_REGS_MASK;
18 uint64_t __weak arch__user_reg_mask(void)
20 return PERF_REGS_MASK;
23 #ifdef HAVE_PERF_REGS_SUPPORT
25 #define perf_event_arm_regs perf_event_arm64_regs
26 #include "../../arch/arm64/include/uapi/asm/perf_regs.h"
27 #undef perf_event_arm_regs
29 #include "../../arch/arm/include/uapi/asm/perf_regs.h"
30 #include "../../arch/csky/include/uapi/asm/perf_regs.h"
31 #include "../../arch/mips/include/uapi/asm/perf_regs.h"
32 #include "../../arch/powerpc/include/uapi/asm/perf_regs.h"
33 #include "../../arch/riscv/include/uapi/asm/perf_regs.h"
34 #include "../../arch/s390/include/uapi/asm/perf_regs.h"
35 #include "../../arch/x86/include/uapi/asm/perf_regs.h"
37 static const char *__perf_reg_name_arm64(int id)
40 case PERF_REG_ARM64_X0:
42 case PERF_REG_ARM64_X1:
44 case PERF_REG_ARM64_X2:
46 case PERF_REG_ARM64_X3:
48 case PERF_REG_ARM64_X4:
50 case PERF_REG_ARM64_X5:
52 case PERF_REG_ARM64_X6:
54 case PERF_REG_ARM64_X7:
56 case PERF_REG_ARM64_X8:
58 case PERF_REG_ARM64_X9:
60 case PERF_REG_ARM64_X10:
62 case PERF_REG_ARM64_X11:
64 case PERF_REG_ARM64_X12:
66 case PERF_REG_ARM64_X13:
68 case PERF_REG_ARM64_X14:
70 case PERF_REG_ARM64_X15:
72 case PERF_REG_ARM64_X16:
74 case PERF_REG_ARM64_X17:
76 case PERF_REG_ARM64_X18:
78 case PERF_REG_ARM64_X19:
80 case PERF_REG_ARM64_X20:
82 case PERF_REG_ARM64_X21:
84 case PERF_REG_ARM64_X22:
86 case PERF_REG_ARM64_X23:
88 case PERF_REG_ARM64_X24:
90 case PERF_REG_ARM64_X25:
92 case PERF_REG_ARM64_X26:
94 case PERF_REG_ARM64_X27:
96 case PERF_REG_ARM64_X28:
98 case PERF_REG_ARM64_X29:
100 case PERF_REG_ARM64_SP:
102 case PERF_REG_ARM64_LR:
104 case PERF_REG_ARM64_PC:
106 case PERF_REG_ARM64_VG:
115 static const char *__perf_reg_name_arm(int id)
118 case PERF_REG_ARM_R0:
120 case PERF_REG_ARM_R1:
122 case PERF_REG_ARM_R2:
124 case PERF_REG_ARM_R3:
126 case PERF_REG_ARM_R4:
128 case PERF_REG_ARM_R5:
130 case PERF_REG_ARM_R6:
132 case PERF_REG_ARM_R7:
134 case PERF_REG_ARM_R8:
136 case PERF_REG_ARM_R9:
138 case PERF_REG_ARM_R10:
140 case PERF_REG_ARM_FP:
142 case PERF_REG_ARM_IP:
144 case PERF_REG_ARM_SP:
146 case PERF_REG_ARM_LR:
148 case PERF_REG_ARM_PC:
157 static const char *__perf_reg_name_csky(int id)
160 case PERF_REG_CSKY_A0:
162 case PERF_REG_CSKY_A1:
164 case PERF_REG_CSKY_A2:
166 case PERF_REG_CSKY_A3:
168 case PERF_REG_CSKY_REGS0:
170 case PERF_REG_CSKY_REGS1:
172 case PERF_REG_CSKY_REGS2:
174 case PERF_REG_CSKY_REGS3:
176 case PERF_REG_CSKY_REGS4:
178 case PERF_REG_CSKY_REGS5:
180 case PERF_REG_CSKY_REGS6:
182 case PERF_REG_CSKY_REGS7:
184 case PERF_REG_CSKY_REGS8:
186 case PERF_REG_CSKY_REGS9:
188 case PERF_REG_CSKY_SP:
190 case PERF_REG_CSKY_LR:
192 case PERF_REG_CSKY_PC:
194 #if defined(__CSKYABIV2__)
195 case PERF_REG_CSKY_EXREGS0:
197 case PERF_REG_CSKY_EXREGS1:
199 case PERF_REG_CSKY_EXREGS2:
201 case PERF_REG_CSKY_EXREGS3:
203 case PERF_REG_CSKY_EXREGS4:
205 case PERF_REG_CSKY_EXREGS5:
207 case PERF_REG_CSKY_EXREGS6:
209 case PERF_REG_CSKY_EXREGS7:
211 case PERF_REG_CSKY_EXREGS8:
213 case PERF_REG_CSKY_EXREGS9:
215 case PERF_REG_CSKY_EXREGS10:
217 case PERF_REG_CSKY_EXREGS11:
219 case PERF_REG_CSKY_EXREGS12:
221 case PERF_REG_CSKY_EXREGS13:
223 case PERF_REG_CSKY_EXREGS14:
225 case PERF_REG_CSKY_TLS:
227 case PERF_REG_CSKY_HI:
229 case PERF_REG_CSKY_LO:
239 static const char *__perf_reg_name_mips(int id)
242 case PERF_REG_MIPS_PC:
244 case PERF_REG_MIPS_R1:
246 case PERF_REG_MIPS_R2:
248 case PERF_REG_MIPS_R3:
250 case PERF_REG_MIPS_R4:
252 case PERF_REG_MIPS_R5:
254 case PERF_REG_MIPS_R6:
256 case PERF_REG_MIPS_R7:
258 case PERF_REG_MIPS_R8:
260 case PERF_REG_MIPS_R9:
262 case PERF_REG_MIPS_R10:
264 case PERF_REG_MIPS_R11:
266 case PERF_REG_MIPS_R12:
268 case PERF_REG_MIPS_R13:
270 case PERF_REG_MIPS_R14:
272 case PERF_REG_MIPS_R15:
274 case PERF_REG_MIPS_R16:
276 case PERF_REG_MIPS_R17:
278 case PERF_REG_MIPS_R18:
280 case PERF_REG_MIPS_R19:
282 case PERF_REG_MIPS_R20:
284 case PERF_REG_MIPS_R21:
286 case PERF_REG_MIPS_R22:
288 case PERF_REG_MIPS_R23:
290 case PERF_REG_MIPS_R24:
292 case PERF_REG_MIPS_R25:
294 case PERF_REG_MIPS_R28:
296 case PERF_REG_MIPS_R29:
298 case PERF_REG_MIPS_R30:
300 case PERF_REG_MIPS_R31:
308 static const char *__perf_reg_name_powerpc(int id)
311 case PERF_REG_POWERPC_R0:
313 case PERF_REG_POWERPC_R1:
315 case PERF_REG_POWERPC_R2:
317 case PERF_REG_POWERPC_R3:
319 case PERF_REG_POWERPC_R4:
321 case PERF_REG_POWERPC_R5:
323 case PERF_REG_POWERPC_R6:
325 case PERF_REG_POWERPC_R7:
327 case PERF_REG_POWERPC_R8:
329 case PERF_REG_POWERPC_R9:
331 case PERF_REG_POWERPC_R10:
333 case PERF_REG_POWERPC_R11:
335 case PERF_REG_POWERPC_R12:
337 case PERF_REG_POWERPC_R13:
339 case PERF_REG_POWERPC_R14:
341 case PERF_REG_POWERPC_R15:
343 case PERF_REG_POWERPC_R16:
345 case PERF_REG_POWERPC_R17:
347 case PERF_REG_POWERPC_R18:
349 case PERF_REG_POWERPC_R19:
351 case PERF_REG_POWERPC_R20:
353 case PERF_REG_POWERPC_R21:
355 case PERF_REG_POWERPC_R22:
357 case PERF_REG_POWERPC_R23:
359 case PERF_REG_POWERPC_R24:
361 case PERF_REG_POWERPC_R25:
363 case PERF_REG_POWERPC_R26:
365 case PERF_REG_POWERPC_R27:
367 case PERF_REG_POWERPC_R28:
369 case PERF_REG_POWERPC_R29:
371 case PERF_REG_POWERPC_R30:
373 case PERF_REG_POWERPC_R31:
375 case PERF_REG_POWERPC_NIP:
377 case PERF_REG_POWERPC_MSR:
379 case PERF_REG_POWERPC_ORIG_R3:
381 case PERF_REG_POWERPC_CTR:
383 case PERF_REG_POWERPC_LINK:
385 case PERF_REG_POWERPC_XER:
387 case PERF_REG_POWERPC_CCR:
389 case PERF_REG_POWERPC_SOFTE:
391 case PERF_REG_POWERPC_TRAP:
393 case PERF_REG_POWERPC_DAR:
395 case PERF_REG_POWERPC_DSISR:
397 case PERF_REG_POWERPC_SIER:
399 case PERF_REG_POWERPC_MMCRA:
401 case PERF_REG_POWERPC_MMCR0:
403 case PERF_REG_POWERPC_MMCR1:
405 case PERF_REG_POWERPC_MMCR2:
407 case PERF_REG_POWERPC_MMCR3:
409 case PERF_REG_POWERPC_SIER2:
411 case PERF_REG_POWERPC_SIER3:
413 case PERF_REG_POWERPC_PMC1:
415 case PERF_REG_POWERPC_PMC2:
417 case PERF_REG_POWERPC_PMC3:
419 case PERF_REG_POWERPC_PMC4:
421 case PERF_REG_POWERPC_PMC5:
423 case PERF_REG_POWERPC_PMC6:
425 case PERF_REG_POWERPC_SDAR:
427 case PERF_REG_POWERPC_SIAR:
435 static const char *__perf_reg_name_riscv(int id)
438 case PERF_REG_RISCV_PC:
440 case PERF_REG_RISCV_RA:
442 case PERF_REG_RISCV_SP:
444 case PERF_REG_RISCV_GP:
446 case PERF_REG_RISCV_TP:
448 case PERF_REG_RISCV_T0:
450 case PERF_REG_RISCV_T1:
452 case PERF_REG_RISCV_T2:
454 case PERF_REG_RISCV_S0:
456 case PERF_REG_RISCV_S1:
458 case PERF_REG_RISCV_A0:
460 case PERF_REG_RISCV_A1:
462 case PERF_REG_RISCV_A2:
464 case PERF_REG_RISCV_A3:
466 case PERF_REG_RISCV_A4:
468 case PERF_REG_RISCV_A5:
470 case PERF_REG_RISCV_A6:
472 case PERF_REG_RISCV_A7:
474 case PERF_REG_RISCV_S2:
476 case PERF_REG_RISCV_S3:
478 case PERF_REG_RISCV_S4:
480 case PERF_REG_RISCV_S5:
482 case PERF_REG_RISCV_S6:
484 case PERF_REG_RISCV_S7:
486 case PERF_REG_RISCV_S8:
488 case PERF_REG_RISCV_S9:
490 case PERF_REG_RISCV_S10:
492 case PERF_REG_RISCV_S11:
494 case PERF_REG_RISCV_T3:
496 case PERF_REG_RISCV_T4:
498 case PERF_REG_RISCV_T5:
500 case PERF_REG_RISCV_T6:
509 static const char *__perf_reg_name_s390(int id)
512 case PERF_REG_S390_R0:
514 case PERF_REG_S390_R1:
516 case PERF_REG_S390_R2:
518 case PERF_REG_S390_R3:
520 case PERF_REG_S390_R4:
522 case PERF_REG_S390_R5:
524 case PERF_REG_S390_R6:
526 case PERF_REG_S390_R7:
528 case PERF_REG_S390_R8:
530 case PERF_REG_S390_R9:
532 case PERF_REG_S390_R10:
534 case PERF_REG_S390_R11:
536 case PERF_REG_S390_R12:
538 case PERF_REG_S390_R13:
540 case PERF_REG_S390_R14:
542 case PERF_REG_S390_R15:
544 case PERF_REG_S390_FP0:
546 case PERF_REG_S390_FP1:
548 case PERF_REG_S390_FP2:
550 case PERF_REG_S390_FP3:
552 case PERF_REG_S390_FP4:
554 case PERF_REG_S390_FP5:
556 case PERF_REG_S390_FP6:
558 case PERF_REG_S390_FP7:
560 case PERF_REG_S390_FP8:
562 case PERF_REG_S390_FP9:
564 case PERF_REG_S390_FP10:
566 case PERF_REG_S390_FP11:
568 case PERF_REG_S390_FP12:
570 case PERF_REG_S390_FP13:
572 case PERF_REG_S390_FP14:
574 case PERF_REG_S390_FP15:
576 case PERF_REG_S390_MASK:
578 case PERF_REG_S390_PC:
587 static const char *__perf_reg_name_x86(int id)
590 case PERF_REG_X86_AX:
592 case PERF_REG_X86_BX:
594 case PERF_REG_X86_CX:
596 case PERF_REG_X86_DX:
598 case PERF_REG_X86_SI:
600 case PERF_REG_X86_DI:
602 case PERF_REG_X86_BP:
604 case PERF_REG_X86_SP:
606 case PERF_REG_X86_IP:
608 case PERF_REG_X86_FLAGS:
610 case PERF_REG_X86_CS:
612 case PERF_REG_X86_SS:
614 case PERF_REG_X86_DS:
616 case PERF_REG_X86_ES:
618 case PERF_REG_X86_FS:
620 case PERF_REG_X86_GS:
622 case PERF_REG_X86_R8:
624 case PERF_REG_X86_R9:
626 case PERF_REG_X86_R10:
628 case PERF_REG_X86_R11:
630 case PERF_REG_X86_R12:
632 case PERF_REG_X86_R13:
634 case PERF_REG_X86_R14:
636 case PERF_REG_X86_R15:
640 case PERF_REG_X86_XMM ## x: \
641 case PERF_REG_X86_XMM ## x + 1: \
667 const char *perf_reg_name(int id, const char *arch)
669 const char *reg_name = NULL;
671 if (!strcmp(arch, "csky"))
672 reg_name = __perf_reg_name_csky(id);
673 else if (!strcmp(arch, "mips"))
674 reg_name = __perf_reg_name_mips(id);
675 else if (!strcmp(arch, "powerpc"))
676 reg_name = __perf_reg_name_powerpc(id);
677 else if (!strcmp(arch, "riscv"))
678 reg_name = __perf_reg_name_riscv(id);
679 else if (!strcmp(arch, "s390"))
680 reg_name = __perf_reg_name_s390(id);
681 else if (!strcmp(arch, "x86"))
682 reg_name = __perf_reg_name_x86(id);
683 else if (!strcmp(arch, "arm"))
684 reg_name = __perf_reg_name_arm(id);
685 else if (!strcmp(arch, "arm64"))
686 reg_name = __perf_reg_name_arm64(id);
688 return reg_name ?: "unknown";
691 int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
694 u64 mask = regs->mask;
696 if ((u64)id >= PERF_SAMPLE_REGS_CACHE_SIZE)
699 if (regs->cache_mask & (1ULL << id))
702 if (!(mask & (1ULL << id)))
705 for (i = 0; i < id; i++) {
706 if (mask & (1ULL << i))
710 regs->cache_mask |= (1ULL << id);
711 regs->cache_regs[id] = regs->regs[idx];
714 *valp = regs->cache_regs[id];