2 * intel_pt.c: Intel Processor Trace support
3 * Copyright (c) 2013-2015, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <linux/kernel.h>
20 #include <linux/types.h>
34 #include "thread-stack.h"
36 #include "callchain.h"
44 #include "intel-pt-decoder/intel-pt-log.h"
45 #include "intel-pt-decoder/intel-pt-decoder.h"
46 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
47 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
49 #define MAX_TIMESTAMP (~0ULL)
52 struct auxtrace auxtrace;
53 struct auxtrace_queues queues;
54 struct auxtrace_heap heap;
56 struct perf_session *session;
57 struct machine *machine;
58 struct perf_evsel *switch_evsel;
59 struct thread *unknown_thread;
60 bool timeless_decoding;
69 int have_sched_switch;
75 struct perf_tsc_conversion tc;
76 bool cap_user_time_zero;
78 struct itrace_synth_opts synth_opts;
80 bool sample_instructions;
81 u64 instructions_sample_type;
82 u64 instructions_sample_period;
87 u64 branches_sample_type;
90 bool sample_transactions;
91 u64 transactions_sample_type;
94 bool synth_needs_swap;
103 unsigned max_non_turbo_ratio;
105 unsigned long num_events;
108 struct addr_filters filts;
112 INTEL_PT_SS_NOT_TRACING,
115 INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
116 INTEL_PT_SS_EXPECTING_SWITCH_IP,
119 struct intel_pt_queue {
121 unsigned int queue_nr;
122 struct auxtrace_buffer *buffer;
124 const struct intel_pt_state *state;
125 struct ip_callchain *chain;
126 struct branch_stack *last_branch;
127 struct branch_stack *last_branch_rb;
128 size_t last_branch_pos;
129 union perf_event *event_buf;
132 bool step_through_buffers;
133 bool use_buffer_pid_tid;
139 struct thread *thread;
149 static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
150 unsigned char *buf, size_t len)
152 struct intel_pt_pkt packet;
155 char desc[INTEL_PT_PKT_DESC_MAX];
156 const char *color = PERF_COLOR_BLUE;
158 color_fprintf(stdout, color,
159 ". ... Intel Processor Trace data: size %zu bytes\n",
163 ret = intel_pt_get_packet(buf, len, &packet);
169 color_fprintf(stdout, color, " %08x: ", pos);
170 for (i = 0; i < pkt_len; i++)
171 color_fprintf(stdout, color, " %02x", buf[i]);
173 color_fprintf(stdout, color, " ");
175 ret = intel_pt_pkt_desc(&packet, desc,
176 INTEL_PT_PKT_DESC_MAX);
178 color_fprintf(stdout, color, " %s\n", desc);
180 color_fprintf(stdout, color, " Bad packet!\n");
188 static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
192 intel_pt_dump(pt, buf, len);
195 static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
196 struct auxtrace_buffer *b)
198 bool consecutive = false;
201 start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
202 pt->have_tsc, &consecutive);
205 b->use_size = b->data + b->size - start;
207 if (b->use_size && consecutive)
208 b->consecutive = true;
212 static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
213 struct auxtrace_queue *queue,
214 struct auxtrace_buffer *buffer)
216 if (queue->cpu == -1 && buffer->cpu != -1)
217 ptq->cpu = buffer->cpu;
219 ptq->pid = buffer->pid;
220 ptq->tid = buffer->tid;
222 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
223 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
225 thread__zput(ptq->thread);
227 if (ptq->tid != -1) {
229 ptq->thread = machine__findnew_thread(ptq->pt->machine,
233 ptq->thread = machine__find_thread(ptq->pt->machine, -1,
238 /* This function assumes data is processed sequentially only */
239 static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
241 struct intel_pt_queue *ptq = data;
242 struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
243 struct auxtrace_queue *queue;
250 queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
252 buffer = auxtrace_buffer__next(queue, buffer);
255 auxtrace_buffer__drop_data(old_buffer);
260 ptq->buffer = buffer;
263 int fd = perf_data_file__fd(ptq->pt->session->file);
265 buffer->data = auxtrace_buffer__get_data(buffer, fd);
270 if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
271 intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
274 if (buffer->use_data) {
275 b->len = buffer->use_size;
276 b->buf = buffer->use_data;
278 b->len = buffer->size;
279 b->buf = buffer->data;
281 b->ref_timestamp = buffer->reference;
284 * If in snapshot mode and the buffer has no usable data, get next
285 * buffer and again check overlap against old_buffer.
287 if (ptq->pt->snapshot_mode && !b->len)
291 auxtrace_buffer__drop_data(old_buffer);
293 if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
294 !buffer->consecutive)) {
295 b->consecutive = false;
296 b->trace_nr = buffer->buffer_nr + 1;
298 b->consecutive = true;
301 if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
302 ptq->tid != buffer->tid))
303 intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
305 if (ptq->step_through_buffers)
309 return intel_pt_get_trace(b, data);
314 struct intel_pt_cache_entry {
315 struct auxtrace_cache_entry entry;
318 enum intel_pt_insn_op op;
319 enum intel_pt_insn_branch branch;
324 static int intel_pt_config_div(const char *var, const char *value, void *data)
329 if (!strcmp(var, "intel-pt.cache-divisor")) {
330 val = strtol(value, NULL, 0);
331 if (val > 0 && val <= INT_MAX)
338 static int intel_pt_cache_divisor(void)
345 perf_config(intel_pt_config_div, &d);
353 static unsigned int intel_pt_cache_size(struct dso *dso,
354 struct machine *machine)
358 size = dso__data_size(dso, machine);
359 size /= intel_pt_cache_divisor();
362 if (size > (1 << 21))
364 return 32 - __builtin_clz(size);
367 static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
368 struct machine *machine)
370 struct auxtrace_cache *c;
373 if (dso->auxtrace_cache)
374 return dso->auxtrace_cache;
376 bits = intel_pt_cache_size(dso, machine);
378 /* Ignoring cache creation failure */
379 c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
381 dso->auxtrace_cache = c;
386 static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
387 u64 offset, u64 insn_cnt, u64 byte_cnt,
388 struct intel_pt_insn *intel_pt_insn)
390 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
391 struct intel_pt_cache_entry *e;
397 e = auxtrace_cache__alloc_entry(c);
401 e->insn_cnt = insn_cnt;
402 e->byte_cnt = byte_cnt;
403 e->op = intel_pt_insn->op;
404 e->branch = intel_pt_insn->branch;
405 e->length = intel_pt_insn->length;
406 e->rel = intel_pt_insn->rel;
408 err = auxtrace_cache__add(c, offset, &e->entry);
410 auxtrace_cache__free_entry(c, e);
415 static struct intel_pt_cache_entry *
416 intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
418 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
423 return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
426 static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
427 uint64_t *insn_cnt_ptr, uint64_t *ip,
428 uint64_t to_ip, uint64_t max_insn_cnt,
431 struct intel_pt_queue *ptq = data;
432 struct machine *machine = ptq->pt->machine;
433 struct thread *thread;
434 struct addr_location al;
435 unsigned char buf[1024];
440 u64 offset, start_offset, start_ip;
444 if (to_ip && *ip == to_ip)
447 bufsz = intel_pt_insn_max_size();
449 if (*ip >= ptq->pt->kernel_start)
450 cpumode = PERF_RECORD_MISC_KERNEL;
452 cpumode = PERF_RECORD_MISC_USER;
454 thread = ptq->thread;
456 if (cpumode != PERF_RECORD_MISC_KERNEL)
458 thread = ptq->pt->unknown_thread;
462 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
463 if (!al.map || !al.map->dso)
466 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
467 dso__data_status_seen(al.map->dso,
468 DSO_DATA_STATUS_SEEN_ITRACE))
471 offset = al.map->map_ip(al.map, *ip);
473 if (!to_ip && one_map) {
474 struct intel_pt_cache_entry *e;
476 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
478 (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
479 *insn_cnt_ptr = e->insn_cnt;
481 intel_pt_insn->op = e->op;
482 intel_pt_insn->branch = e->branch;
483 intel_pt_insn->length = e->length;
484 intel_pt_insn->rel = e->rel;
485 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
490 start_offset = offset;
493 /* Load maps to ensure dso->is_64_bit has been updated */
496 x86_64 = al.map->dso->is_64_bit;
499 len = dso__data_read_offset(al.map->dso, machine,
504 if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
507 intel_pt_log_insn(intel_pt_insn, *ip);
511 if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
514 if (max_insn_cnt && insn_cnt >= max_insn_cnt)
517 *ip += intel_pt_insn->length;
519 if (to_ip && *ip == to_ip)
522 if (*ip >= al.map->end)
525 offset += intel_pt_insn->length;
530 *insn_cnt_ptr = insn_cnt;
536 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
540 struct intel_pt_cache_entry *e;
542 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
547 /* Ignore cache errors */
548 intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
549 *ip - start_ip, intel_pt_insn);
554 *insn_cnt_ptr = insn_cnt;
558 static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
559 uint64_t offset, const char *filename)
561 struct addr_filter *filt;
562 bool have_filter = false;
563 bool hit_tracestop = false;
564 bool hit_filter = false;
566 list_for_each_entry(filt, &pt->filts.head, list) {
570 if ((filename && !filt->filename) ||
571 (!filename && filt->filename) ||
572 (filename && strcmp(filename, filt->filename)))
575 if (!(offset >= filt->addr && offset < filt->addr + filt->size))
578 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
579 ip, offset, filename ? filename : "[kernel]",
580 filt->start ? "filter" : "stop",
581 filt->addr, filt->size);
586 hit_tracestop = true;
589 if (!hit_tracestop && !hit_filter)
590 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
591 ip, offset, filename ? filename : "[kernel]");
593 return hit_tracestop || (have_filter && !hit_filter);
596 static int __intel_pt_pgd_ip(uint64_t ip, void *data)
598 struct intel_pt_queue *ptq = data;
599 struct thread *thread;
600 struct addr_location al;
604 if (ip >= ptq->pt->kernel_start)
605 return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
607 cpumode = PERF_RECORD_MISC_USER;
609 thread = ptq->thread;
613 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);
614 if (!al.map || !al.map->dso)
617 offset = al.map->map_ip(al.map, ip);
619 return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
620 al.map->dso->long_name);
623 static bool intel_pt_pgd_ip(uint64_t ip, void *data)
625 return __intel_pt_pgd_ip(ip, data) > 0;
628 static bool intel_pt_get_config(struct intel_pt *pt,
629 struct perf_event_attr *attr, u64 *config)
631 if (attr->type == pt->pmu_type) {
633 *config = attr->config;
640 static bool intel_pt_exclude_kernel(struct intel_pt *pt)
642 struct perf_evsel *evsel;
644 evlist__for_each_entry(pt->session->evlist, evsel) {
645 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
646 !evsel->attr.exclude_kernel)
652 static bool intel_pt_return_compression(struct intel_pt *pt)
654 struct perf_evsel *evsel;
657 if (!pt->noretcomp_bit)
660 evlist__for_each_entry(pt->session->evlist, evsel) {
661 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
662 (config & pt->noretcomp_bit))
668 static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
670 struct perf_evsel *evsel;
674 if (!pt->mtc_freq_bits)
677 for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
680 evlist__for_each_entry(pt->session->evlist, evsel) {
681 if (intel_pt_get_config(pt, &evsel->attr, &config))
682 return (config & pt->mtc_freq_bits) >> shift;
687 static bool intel_pt_timeless_decoding(struct intel_pt *pt)
689 struct perf_evsel *evsel;
690 bool timeless_decoding = true;
693 if (!pt->tsc_bit || !pt->cap_user_time_zero)
696 evlist__for_each_entry(pt->session->evlist, evsel) {
697 if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
699 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
700 if (config & pt->tsc_bit)
701 timeless_decoding = false;
706 return timeless_decoding;
709 static bool intel_pt_tracing_kernel(struct intel_pt *pt)
711 struct perf_evsel *evsel;
713 evlist__for_each_entry(pt->session->evlist, evsel) {
714 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
715 !evsel->attr.exclude_kernel)
721 static bool intel_pt_have_tsc(struct intel_pt *pt)
723 struct perf_evsel *evsel;
724 bool have_tsc = false;
730 evlist__for_each_entry(pt->session->evlist, evsel) {
731 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
732 if (config & pt->tsc_bit)
741 static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
745 quot = ns / pt->tc.time_mult;
746 rem = ns % pt->tc.time_mult;
747 return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
751 static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
752 unsigned int queue_nr)
754 struct intel_pt_params params = { .get_trace = 0, };
755 struct perf_env *env = pt->machine->env;
756 struct intel_pt_queue *ptq;
758 ptq = zalloc(sizeof(struct intel_pt_queue));
762 if (pt->synth_opts.callchain) {
763 size_t sz = sizeof(struct ip_callchain);
765 sz += pt->synth_opts.callchain_sz * sizeof(u64);
766 ptq->chain = zalloc(sz);
771 if (pt->synth_opts.last_branch) {
772 size_t sz = sizeof(struct branch_stack);
774 sz += pt->synth_opts.last_branch_sz *
775 sizeof(struct branch_entry);
776 ptq->last_branch = zalloc(sz);
777 if (!ptq->last_branch)
779 ptq->last_branch_rb = zalloc(sz);
780 if (!ptq->last_branch_rb)
784 ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
789 ptq->queue_nr = queue_nr;
790 ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
796 params.get_trace = intel_pt_get_trace;
797 params.walk_insn = intel_pt_walk_next_insn;
799 params.return_compression = intel_pt_return_compression(pt);
800 params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
801 params.mtc_period = intel_pt_mtc_period(pt);
802 params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
803 params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
805 if (pt->filts.cnt > 0)
806 params.pgd_ip = intel_pt_pgd_ip;
808 if (pt->synth_opts.instructions) {
809 if (pt->synth_opts.period) {
810 switch (pt->synth_opts.period_type) {
811 case PERF_ITRACE_PERIOD_INSTRUCTIONS:
813 INTEL_PT_PERIOD_INSTRUCTIONS;
814 params.period = pt->synth_opts.period;
816 case PERF_ITRACE_PERIOD_TICKS:
817 params.period_type = INTEL_PT_PERIOD_TICKS;
818 params.period = pt->synth_opts.period;
820 case PERF_ITRACE_PERIOD_NANOSECS:
821 params.period_type = INTEL_PT_PERIOD_TICKS;
822 params.period = intel_pt_ns_to_ticks(pt,
823 pt->synth_opts.period);
830 if (!params.period) {
831 params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
836 if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
837 params.flags |= INTEL_PT_FUP_WITH_NLIP;
839 ptq->decoder = intel_pt_decoder_new(¶ms);
846 zfree(&ptq->event_buf);
847 zfree(&ptq->last_branch);
848 zfree(&ptq->last_branch_rb);
854 static void intel_pt_free_queue(void *priv)
856 struct intel_pt_queue *ptq = priv;
860 thread__zput(ptq->thread);
861 intel_pt_decoder_free(ptq->decoder);
862 zfree(&ptq->event_buf);
863 zfree(&ptq->last_branch);
864 zfree(&ptq->last_branch_rb);
869 static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
870 struct auxtrace_queue *queue)
872 struct intel_pt_queue *ptq = queue->priv;
874 if (queue->tid == -1 || pt->have_sched_switch) {
875 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
878 thread__zput(ptq->thread);
881 if (!ptq->thread && ptq->tid != -1)
882 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
885 ptq->pid = ptq->thread->pid_;
886 if (queue->cpu == -1)
887 ptq->cpu = ptq->thread->cpu;
891 static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
893 if (ptq->state->flags & INTEL_PT_ABORT_TX) {
894 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
895 } else if (ptq->state->flags & INTEL_PT_ASYNC) {
896 if (ptq->state->to_ip)
897 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
899 PERF_IP_FLAG_INTERRUPT;
901 ptq->flags = PERF_IP_FLAG_BRANCH |
902 PERF_IP_FLAG_TRACE_END;
905 if (ptq->state->from_ip)
906 ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
908 ptq->flags = PERF_IP_FLAG_BRANCH |
909 PERF_IP_FLAG_TRACE_BEGIN;
910 if (ptq->state->flags & INTEL_PT_IN_TX)
911 ptq->flags |= PERF_IP_FLAG_IN_TX;
912 ptq->insn_len = ptq->state->insn_len;
916 static int intel_pt_setup_queue(struct intel_pt *pt,
917 struct auxtrace_queue *queue,
918 unsigned int queue_nr)
920 struct intel_pt_queue *ptq = queue->priv;
922 if (list_empty(&queue->head))
926 ptq = intel_pt_alloc_queue(pt, queue_nr);
931 if (queue->cpu != -1)
932 ptq->cpu = queue->cpu;
933 ptq->tid = queue->tid;
935 if (pt->sampling_mode) {
936 if (pt->timeless_decoding)
937 ptq->step_through_buffers = true;
938 if (pt->timeless_decoding || !pt->have_sched_switch)
939 ptq->use_buffer_pid_tid = true;
942 ptq->sync_switch = pt->sync_switch;
946 (!ptq->sync_switch ||
947 ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
948 const struct intel_pt_state *state;
951 if (pt->timeless_decoding)
954 intel_pt_log("queue %u getting timestamp\n", queue_nr);
955 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
956 queue_nr, ptq->cpu, ptq->pid, ptq->tid);
958 state = intel_pt_decode(ptq->decoder);
960 if (state->err == INTEL_PT_ERR_NODATA) {
961 intel_pt_log("queue %u has no timestamp\n",
967 if (state->timestamp)
971 ptq->timestamp = state->timestamp;
972 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
973 queue_nr, ptq->timestamp);
975 ptq->have_sample = true;
976 intel_pt_sample_flags(ptq);
977 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
986 static int intel_pt_setup_queues(struct intel_pt *pt)
991 for (i = 0; i < pt->queues.nr_queues; i++) {
992 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
999 static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
1001 struct branch_stack *bs_src = ptq->last_branch_rb;
1002 struct branch_stack *bs_dst = ptq->last_branch;
1005 bs_dst->nr = bs_src->nr;
1010 nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
1011 memcpy(&bs_dst->entries[0],
1012 &bs_src->entries[ptq->last_branch_pos],
1013 sizeof(struct branch_entry) * nr);
1015 if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
1016 memcpy(&bs_dst->entries[nr],
1017 &bs_src->entries[0],
1018 sizeof(struct branch_entry) * ptq->last_branch_pos);
1022 static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
1024 ptq->last_branch_pos = 0;
1025 ptq->last_branch_rb->nr = 0;
1028 static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
1030 const struct intel_pt_state *state = ptq->state;
1031 struct branch_stack *bs = ptq->last_branch_rb;
1032 struct branch_entry *be;
1034 if (!ptq->last_branch_pos)
1035 ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
1037 ptq->last_branch_pos -= 1;
1039 be = &bs->entries[ptq->last_branch_pos];
1040 be->from = state->from_ip;
1041 be->to = state->to_ip;
1042 be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
1043 be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
1044 /* No support for mispredict */
1045 be->flags.mispred = ptq->pt->mispred_all;
1047 if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
1051 static int intel_pt_inject_event(union perf_event *event,
1052 struct perf_sample *sample, u64 type,
1055 event->header.size = perf_event__sample_event_size(sample, type, 0);
1056 return perf_event__synthesize_sample(event, type, 0, sample, swapped);
1059 static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
1062 struct intel_pt *pt = ptq->pt;
1063 union perf_event *event = ptq->event_buf;
1064 struct perf_sample sample = { .ip = 0, };
1065 struct dummy_branch_stack {
1067 struct branch_entry entries;
1070 if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
1073 if (pt->synth_opts.initial_skip &&
1074 pt->num_events++ < pt->synth_opts.initial_skip)
1077 event->sample.header.type = PERF_RECORD_SAMPLE;
1078 event->sample.header.misc = PERF_RECORD_MISC_USER;
1079 event->sample.header.size = sizeof(struct perf_event_header);
1081 if (!pt->timeless_decoding)
1082 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1084 sample.cpumode = PERF_RECORD_MISC_USER;
1085 sample.ip = ptq->state->from_ip;
1086 sample.pid = ptq->pid;
1087 sample.tid = ptq->tid;
1088 sample.addr = ptq->state->to_ip;
1089 sample.id = ptq->pt->branches_id;
1090 sample.stream_id = ptq->pt->branches_id;
1092 sample.cpu = ptq->cpu;
1093 sample.flags = ptq->flags;
1094 sample.insn_len = ptq->insn_len;
1097 * perf report cannot handle events without a branch stack when using
1098 * SORT_MODE__BRANCH so make a dummy one.
1100 if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
1101 dummy_bs = (struct dummy_branch_stack){
1108 sample.branch_stack = (struct branch_stack *)&dummy_bs;
1111 if (pt->synth_opts.inject) {
1112 ret = intel_pt_inject_event(event, &sample,
1113 pt->branches_sample_type,
1114 pt->synth_needs_swap);
1119 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
1121 pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
1127 static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
1130 struct intel_pt *pt = ptq->pt;
1131 union perf_event *event = ptq->event_buf;
1132 struct perf_sample sample = { .ip = 0, };
1134 if (pt->synth_opts.initial_skip &&
1135 pt->num_events++ < pt->synth_opts.initial_skip)
1138 event->sample.header.type = PERF_RECORD_SAMPLE;
1139 event->sample.header.misc = PERF_RECORD_MISC_USER;
1140 event->sample.header.size = sizeof(struct perf_event_header);
1142 if (!pt->timeless_decoding)
1143 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1145 sample.cpumode = PERF_RECORD_MISC_USER;
1146 sample.ip = ptq->state->from_ip;
1147 sample.pid = ptq->pid;
1148 sample.tid = ptq->tid;
1149 sample.addr = ptq->state->to_ip;
1150 sample.id = ptq->pt->instructions_id;
1151 sample.stream_id = ptq->pt->instructions_id;
1152 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
1153 sample.cpu = ptq->cpu;
1154 sample.flags = ptq->flags;
1155 sample.insn_len = ptq->insn_len;
1157 ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
1159 if (pt->synth_opts.callchain) {
1160 thread_stack__sample(ptq->thread, ptq->chain,
1161 pt->synth_opts.callchain_sz, sample.ip);
1162 sample.callchain = ptq->chain;
1165 if (pt->synth_opts.last_branch) {
1166 intel_pt_copy_last_branch_rb(ptq);
1167 sample.branch_stack = ptq->last_branch;
1170 if (pt->synth_opts.inject) {
1171 ret = intel_pt_inject_event(event, &sample,
1172 pt->instructions_sample_type,
1173 pt->synth_needs_swap);
1178 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
1180 pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
1183 if (pt->synth_opts.last_branch)
1184 intel_pt_reset_last_branch_rb(ptq);
1189 static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
1192 struct intel_pt *pt = ptq->pt;
1193 union perf_event *event = ptq->event_buf;
1194 struct perf_sample sample = { .ip = 0, };
1196 if (pt->synth_opts.initial_skip &&
1197 pt->num_events++ < pt->synth_opts.initial_skip)
1200 event->sample.header.type = PERF_RECORD_SAMPLE;
1201 event->sample.header.misc = PERF_RECORD_MISC_USER;
1202 event->sample.header.size = sizeof(struct perf_event_header);
1204 if (!pt->timeless_decoding)
1205 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1207 sample.cpumode = PERF_RECORD_MISC_USER;
1208 sample.ip = ptq->state->from_ip;
1209 sample.pid = ptq->pid;
1210 sample.tid = ptq->tid;
1211 sample.addr = ptq->state->to_ip;
1212 sample.id = ptq->pt->transactions_id;
1213 sample.stream_id = ptq->pt->transactions_id;
1215 sample.cpu = ptq->cpu;
1216 sample.flags = ptq->flags;
1217 sample.insn_len = ptq->insn_len;
1219 if (pt->synth_opts.callchain) {
1220 thread_stack__sample(ptq->thread, ptq->chain,
1221 pt->synth_opts.callchain_sz, sample.ip);
1222 sample.callchain = ptq->chain;
1225 if (pt->synth_opts.last_branch) {
1226 intel_pt_copy_last_branch_rb(ptq);
1227 sample.branch_stack = ptq->last_branch;
1230 if (pt->synth_opts.inject) {
1231 ret = intel_pt_inject_event(event, &sample,
1232 pt->transactions_sample_type,
1233 pt->synth_needs_swap);
1238 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
1240 pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
1243 if (pt->synth_opts.last_branch)
1244 intel_pt_reset_last_branch_rb(ptq);
1249 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1250 pid_t pid, pid_t tid, u64 ip)
1252 union perf_event event;
1253 char msg[MAX_AUXTRACE_ERROR_MSG];
1256 intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1258 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1259 code, cpu, pid, tid, ip, msg);
1261 err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1263 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1269 static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1271 struct auxtrace_queue *queue;
1272 pid_t tid = ptq->next_tid;
1278 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1280 err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1282 queue = &pt->queues.queue_array[ptq->queue_nr];
1283 intel_pt_set_pid_tid_cpu(pt, queue);
1290 static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1292 struct intel_pt *pt = ptq->pt;
1294 return ip == pt->switch_ip &&
1295 (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1296 !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1297 PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1300 static int intel_pt_sample(struct intel_pt_queue *ptq)
1302 const struct intel_pt_state *state = ptq->state;
1303 struct intel_pt *pt = ptq->pt;
1306 if (!ptq->have_sample)
1309 ptq->have_sample = false;
1311 if (pt->sample_instructions &&
1312 (state->type & INTEL_PT_INSTRUCTION) &&
1313 (!pt->synth_opts.initial_skip ||
1314 pt->num_events++ >= pt->synth_opts.initial_skip)) {
1315 err = intel_pt_synth_instruction_sample(ptq);
1320 if (pt->sample_transactions &&
1321 (state->type & INTEL_PT_TRANSACTION) &&
1322 (!pt->synth_opts.initial_skip ||
1323 pt->num_events++ >= pt->synth_opts.initial_skip)) {
1324 err = intel_pt_synth_transaction_sample(ptq);
1329 if (!(state->type & INTEL_PT_BRANCH))
1332 if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
1333 thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1334 state->to_ip, ptq->insn_len,
1337 thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1339 if (pt->sample_branches) {
1340 err = intel_pt_synth_branch_sample(ptq);
1345 if (pt->synth_opts.last_branch)
1346 intel_pt_update_last_branch_rb(ptq);
1348 if (!ptq->sync_switch)
1351 if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1352 switch (ptq->switch_state) {
1353 case INTEL_PT_SS_NOT_TRACING:
1354 case INTEL_PT_SS_UNKNOWN:
1355 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1356 err = intel_pt_next_tid(pt, ptq);
1359 ptq->switch_state = INTEL_PT_SS_TRACING;
1362 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1365 } else if (!state->to_ip) {
1366 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1367 } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1368 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1369 } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1370 state->to_ip == pt->ptss_ip &&
1371 (ptq->flags & PERF_IP_FLAG_CALL)) {
1372 ptq->switch_state = INTEL_PT_SS_TRACING;
1378 static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
1380 struct machine *machine = pt->machine;
1382 struct symbol *sym, *start;
1383 u64 ip, switch_ip = 0;
1389 map = machine__kernel_map(machine);
1396 start = dso__first_symbol(map->dso, MAP__FUNCTION);
1398 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1399 if (sym->binding == STB_GLOBAL &&
1400 !strcmp(sym->name, "__switch_to")) {
1401 ip = map->unmap_ip(map, sym->start);
1402 if (ip >= map->start && ip < map->end) {
1409 if (!switch_ip || !ptss_ip)
1412 if (pt->have_sched_switch == 1)
1413 ptss = "perf_trace_sched_switch";
1415 ptss = "__perf_event_task_sched_out";
1417 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1418 if (!strcmp(sym->name, ptss)) {
1419 ip = map->unmap_ip(map, sym->start);
1420 if (ip >= map->start && ip < map->end) {
1430 static void intel_pt_enable_sync_switch(struct intel_pt *pt)
1434 pt->sync_switch = true;
1436 for (i = 0; i < pt->queues.nr_queues; i++) {
1437 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1438 struct intel_pt_queue *ptq = queue->priv;
1441 ptq->sync_switch = true;
1445 static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1447 const struct intel_pt_state *state = ptq->state;
1448 struct intel_pt *pt = ptq->pt;
1451 if (!pt->kernel_start) {
1452 pt->kernel_start = machine__kernel_start(pt->machine);
1453 if (pt->per_cpu_mmaps &&
1454 (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
1455 !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1456 !pt->sampling_mode) {
1457 pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
1458 if (pt->switch_ip) {
1459 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1460 pt->switch_ip, pt->ptss_ip);
1461 intel_pt_enable_sync_switch(pt);
1466 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1467 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1469 err = intel_pt_sample(ptq);
1473 state = intel_pt_decode(ptq->decoder);
1475 if (state->err == INTEL_PT_ERR_NODATA)
1477 if (ptq->sync_switch &&
1478 state->from_ip >= pt->kernel_start) {
1479 ptq->sync_switch = false;
1480 intel_pt_next_tid(pt, ptq);
1482 if (pt->synth_opts.errors) {
1483 err = intel_pt_synth_error(pt, state->err,
1494 ptq->have_sample = true;
1495 intel_pt_sample_flags(ptq);
1497 /* Use estimated TSC upon return to user space */
1499 (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1500 state->to_ip && state->to_ip < pt->kernel_start) {
1501 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1502 state->timestamp, state->est_timestamp);
1503 ptq->timestamp = state->est_timestamp;
1504 /* Use estimated TSC in unknown switch state */
1505 } else if (ptq->sync_switch &&
1506 ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1507 intel_pt_is_switch_ip(ptq, state->to_ip) &&
1508 ptq->next_tid == -1) {
1509 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1510 state->timestamp, state->est_timestamp);
1511 ptq->timestamp = state->est_timestamp;
1512 } else if (state->timestamp > ptq->timestamp) {
1513 ptq->timestamp = state->timestamp;
1516 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1517 *timestamp = ptq->timestamp;
1524 static inline int intel_pt_update_queues(struct intel_pt *pt)
1526 if (pt->queues.new_data) {
1527 pt->queues.new_data = false;
1528 return intel_pt_setup_queues(pt);
1533 static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1535 unsigned int queue_nr;
1540 struct auxtrace_queue *queue;
1541 struct intel_pt_queue *ptq;
1543 if (!pt->heap.heap_cnt)
1546 if (pt->heap.heap_array[0].ordinal >= timestamp)
1549 queue_nr = pt->heap.heap_array[0].queue_nr;
1550 queue = &pt->queues.queue_array[queue_nr];
1553 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1554 queue_nr, pt->heap.heap_array[0].ordinal,
1557 auxtrace_heap__pop(&pt->heap);
1559 if (pt->heap.heap_cnt) {
1560 ts = pt->heap.heap_array[0].ordinal + 1;
1567 intel_pt_set_pid_tid_cpu(pt, queue);
1569 ret = intel_pt_run_decoder(ptq, &ts);
1572 auxtrace_heap__add(&pt->heap, queue_nr, ts);
1577 ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1581 ptq->on_heap = false;
1588 static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1591 struct auxtrace_queues *queues = &pt->queues;
1595 for (i = 0; i < queues->nr_queues; i++) {
1596 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1597 struct intel_pt_queue *ptq = queue->priv;
1599 if (ptq && (tid == -1 || ptq->tid == tid)) {
1601 intel_pt_set_pid_tid_cpu(pt, queue);
1602 intel_pt_run_decoder(ptq, &ts);
1608 static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1610 return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1611 sample->pid, sample->tid, 0);
1614 static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1618 if (cpu < 0 || !pt->queues.nr_queues)
1621 if ((unsigned)cpu >= pt->queues.nr_queues)
1622 i = pt->queues.nr_queues - 1;
1626 if (pt->queues.queue_array[i].cpu == cpu)
1627 return pt->queues.queue_array[i].priv;
1629 for (j = 0; i > 0; j++) {
1630 if (pt->queues.queue_array[--i].cpu == cpu)
1631 return pt->queues.queue_array[i].priv;
1634 for (; j < pt->queues.nr_queues; j++) {
1635 if (pt->queues.queue_array[j].cpu == cpu)
1636 return pt->queues.queue_array[j].priv;
1642 static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
1645 struct intel_pt_queue *ptq;
1648 if (!pt->sync_switch)
1651 ptq = intel_pt_cpu_to_ptq(pt, cpu);
1652 if (!ptq || !ptq->sync_switch)
1655 switch (ptq->switch_state) {
1656 case INTEL_PT_SS_NOT_TRACING:
1659 case INTEL_PT_SS_UNKNOWN:
1660 case INTEL_PT_SS_TRACING:
1661 ptq->next_tid = tid;
1662 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1664 case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1665 if (!ptq->on_heap) {
1666 ptq->timestamp = perf_time_to_tsc(timestamp,
1668 err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1672 ptq->on_heap = true;
1674 ptq->switch_state = INTEL_PT_SS_TRACING;
1676 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1677 ptq->next_tid = tid;
1678 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1687 static int intel_pt_process_switch(struct intel_pt *pt,
1688 struct perf_sample *sample)
1690 struct perf_evsel *evsel;
1694 evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1695 if (evsel != pt->switch_evsel)
1698 tid = perf_evsel__intval(evsel, sample, "next_pid");
1701 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1702 cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1705 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1709 return machine__set_current_tid(pt->machine, cpu, -1, tid);
1712 static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
1713 struct perf_sample *sample)
1715 bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
1721 if (pt->have_sched_switch == 3) {
1724 if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
1725 pr_err("Expecting CPU-wide context switch event\n");
1728 pid = event->context_switch.next_prev_pid;
1729 tid = event->context_switch.next_prev_tid;
1738 intel_pt_log("context_switch event has no tid\n");
1740 intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1741 cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
1744 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1748 return machine__set_current_tid(pt->machine, cpu, pid, tid);
1751 static int intel_pt_process_itrace_start(struct intel_pt *pt,
1752 union perf_event *event,
1753 struct perf_sample *sample)
1755 if (!pt->per_cpu_mmaps)
1758 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1759 sample->cpu, event->itrace_start.pid,
1760 event->itrace_start.tid, sample->time,
1761 perf_time_to_tsc(sample->time, &pt->tc));
1763 return machine__set_current_tid(pt->machine, sample->cpu,
1764 event->itrace_start.pid,
1765 event->itrace_start.tid);
1768 static int intel_pt_process_event(struct perf_session *session,
1769 union perf_event *event,
1770 struct perf_sample *sample,
1771 struct perf_tool *tool)
1773 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1781 if (!tool->ordered_events) {
1782 pr_err("Intel Processor Trace requires ordered events\n");
1786 if (sample->time && sample->time != (u64)-1)
1787 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
1791 if (timestamp || pt->timeless_decoding) {
1792 err = intel_pt_update_queues(pt);
1797 if (pt->timeless_decoding) {
1798 if (event->header.type == PERF_RECORD_EXIT) {
1799 err = intel_pt_process_timeless_queues(pt,
1803 } else if (timestamp) {
1804 err = intel_pt_process_queues(pt, timestamp);
1809 if (event->header.type == PERF_RECORD_AUX &&
1810 (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
1811 pt->synth_opts.errors) {
1812 err = intel_pt_lost(pt, sample);
1817 if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
1818 err = intel_pt_process_switch(pt, sample);
1819 else if (event->header.type == PERF_RECORD_ITRACE_START)
1820 err = intel_pt_process_itrace_start(pt, event, sample);
1821 else if (event->header.type == PERF_RECORD_SWITCH ||
1822 event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
1823 err = intel_pt_context_switch(pt, event, sample);
1825 intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
1826 perf_event__name(event->header.type), event->header.type,
1827 sample->cpu, sample->time, timestamp);
1832 static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
1834 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1841 if (!tool->ordered_events)
1844 ret = intel_pt_update_queues(pt);
1848 if (pt->timeless_decoding)
1849 return intel_pt_process_timeless_queues(pt, -1,
1852 return intel_pt_process_queues(pt, MAX_TIMESTAMP);
1855 static void intel_pt_free_events(struct perf_session *session)
1857 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1859 struct auxtrace_queues *queues = &pt->queues;
1862 for (i = 0; i < queues->nr_queues; i++) {
1863 intel_pt_free_queue(queues->queue_array[i].priv);
1864 queues->queue_array[i].priv = NULL;
1866 intel_pt_log_disable();
1867 auxtrace_queues__free(queues);
1870 static void intel_pt_free(struct perf_session *session)
1872 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1875 auxtrace_heap__free(&pt->heap);
1876 intel_pt_free_events(session);
1877 session->auxtrace = NULL;
1878 thread__put(pt->unknown_thread);
1879 addr_filters__exit(&pt->filts);
1884 static int intel_pt_process_auxtrace_event(struct perf_session *session,
1885 union perf_event *event,
1886 struct perf_tool *tool __maybe_unused)
1888 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1891 if (pt->sampling_mode)
1894 if (!pt->data_queued) {
1895 struct auxtrace_buffer *buffer;
1897 int fd = perf_data_file__fd(session->file);
1900 if (perf_data_file__is_pipe(session->file)) {
1903 data_offset = lseek(fd, 0, SEEK_CUR);
1904 if (data_offset == -1)
1908 err = auxtrace_queues__add_event(&pt->queues, session, event,
1909 data_offset, &buffer);
1913 /* Dump here now we have copied a piped trace out of the pipe */
1915 if (auxtrace_buffer__get_data(buffer, fd)) {
1916 intel_pt_dump_event(pt, buffer->data,
1918 auxtrace_buffer__put_data(buffer);
1926 struct intel_pt_synth {
1927 struct perf_tool dummy_tool;
1928 struct perf_session *session;
1931 static int intel_pt_event_synth(struct perf_tool *tool,
1932 union perf_event *event,
1933 struct perf_sample *sample __maybe_unused,
1934 struct machine *machine __maybe_unused)
1936 struct intel_pt_synth *intel_pt_synth =
1937 container_of(tool, struct intel_pt_synth, dummy_tool);
1939 return perf_session__deliver_synth_event(intel_pt_synth->session, event,
1943 static int intel_pt_synth_event(struct perf_session *session,
1944 struct perf_event_attr *attr, u64 id)
1946 struct intel_pt_synth intel_pt_synth;
1948 memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
1949 intel_pt_synth.session = session;
1951 return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
1952 &id, intel_pt_event_synth);
1955 static int intel_pt_synth_events(struct intel_pt *pt,
1956 struct perf_session *session)
1958 struct perf_evlist *evlist = session->evlist;
1959 struct perf_evsel *evsel;
1960 struct perf_event_attr attr;
1965 evlist__for_each_entry(evlist, evsel) {
1966 if (evsel->attr.type == pt->pmu_type && evsel->ids) {
1973 pr_debug("There are no selected events with Intel Processor Trace data\n");
1977 memset(&attr, 0, sizeof(struct perf_event_attr));
1978 attr.size = sizeof(struct perf_event_attr);
1979 attr.type = PERF_TYPE_HARDWARE;
1980 attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
1981 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
1983 if (pt->timeless_decoding)
1984 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
1986 attr.sample_type |= PERF_SAMPLE_TIME;
1987 if (!pt->per_cpu_mmaps)
1988 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
1989 attr.exclude_user = evsel->attr.exclude_user;
1990 attr.exclude_kernel = evsel->attr.exclude_kernel;
1991 attr.exclude_hv = evsel->attr.exclude_hv;
1992 attr.exclude_host = evsel->attr.exclude_host;
1993 attr.exclude_guest = evsel->attr.exclude_guest;
1994 attr.sample_id_all = evsel->attr.sample_id_all;
1995 attr.read_format = evsel->attr.read_format;
1997 id = evsel->id[0] + 1000000000;
2001 if (pt->synth_opts.instructions) {
2002 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2003 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
2004 attr.sample_period =
2005 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
2007 attr.sample_period = pt->synth_opts.period;
2008 pt->instructions_sample_period = attr.sample_period;
2009 if (pt->synth_opts.callchain)
2010 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
2011 if (pt->synth_opts.last_branch)
2012 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
2013 pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
2014 id, (u64)attr.sample_type);
2015 err = intel_pt_synth_event(session, &attr, id);
2017 pr_err("%s: failed to synthesize 'instructions' event type\n",
2021 pt->sample_instructions = true;
2022 pt->instructions_sample_type = attr.sample_type;
2023 pt->instructions_id = id;
2027 if (pt->synth_opts.transactions) {
2028 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2029 attr.sample_period = 1;
2030 if (pt->synth_opts.callchain)
2031 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
2032 if (pt->synth_opts.last_branch)
2033 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
2034 pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
2035 id, (u64)attr.sample_type);
2036 err = intel_pt_synth_event(session, &attr, id);
2038 pr_err("%s: failed to synthesize 'transactions' event type\n",
2042 pt->sample_transactions = true;
2043 pt->transactions_id = id;
2045 evlist__for_each_entry(evlist, evsel) {
2046 if (evsel->id && evsel->id[0] == pt->transactions_id) {
2048 zfree(&evsel->name);
2049 evsel->name = strdup("transactions");
2055 if (pt->synth_opts.branches) {
2056 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
2057 attr.sample_period = 1;
2058 attr.sample_type |= PERF_SAMPLE_ADDR;
2059 attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
2060 attr.sample_type &= ~(u64)PERF_SAMPLE_BRANCH_STACK;
2061 pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
2062 id, (u64)attr.sample_type);
2063 err = intel_pt_synth_event(session, &attr, id);
2065 pr_err("%s: failed to synthesize 'branches' event type\n",
2069 pt->sample_branches = true;
2070 pt->branches_sample_type = attr.sample_type;
2071 pt->branches_id = id;
2074 pt->synth_needs_swap = evsel->needs_swap;
2079 static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
2081 struct perf_evsel *evsel;
2083 evlist__for_each_entry_reverse(evlist, evsel) {
2084 const char *name = perf_evsel__name(evsel);
2086 if (!strcmp(name, "sched:sched_switch"))
2093 static bool intel_pt_find_switch(struct perf_evlist *evlist)
2095 struct perf_evsel *evsel;
2097 evlist__for_each_entry(evlist, evsel) {
2098 if (evsel->attr.context_switch)
2105 static int intel_pt_perf_config(const char *var, const char *value, void *data)
2107 struct intel_pt *pt = data;
2109 if (!strcmp(var, "intel-pt.mispred-all"))
2110 pt->mispred_all = perf_config_bool(var, value);
2115 static const char * const intel_pt_info_fmts[] = {
2116 [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
2117 [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
2118 [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
2119 [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
2120 [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
2121 [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
2122 [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
2123 [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
2124 [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
2125 [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
2126 [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
2127 [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
2128 [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
2129 [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
2130 [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
2131 [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
2134 static void intel_pt_print_info(u64 *arr, int start, int finish)
2141 for (i = start; i <= finish; i++)
2142 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
2145 static void intel_pt_print_info_str(const char *name, const char *str)
2150 fprintf(stdout, " %-20s%s\n", name, str ? str : "");
2153 static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
2155 return auxtrace_info->header.size >=
2156 sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
2159 int intel_pt_process_auxtrace_info(union perf_event *event,
2160 struct perf_session *session)
2162 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
2163 size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
2164 struct intel_pt *pt;
2169 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
2173 pt = zalloc(sizeof(struct intel_pt));
2177 addr_filters__init(&pt->filts);
2179 perf_config(intel_pt_perf_config, pt);
2181 err = auxtrace_queues__init(&pt->queues);
2185 intel_pt_log_set_name(INTEL_PT_PMU_NAME);
2187 pt->session = session;
2188 pt->machine = &session->machines.host; /* No kvm support */
2189 pt->auxtrace_type = auxtrace_info->type;
2190 pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
2191 pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
2192 pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
2193 pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
2194 pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
2195 pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
2196 pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
2197 pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
2198 pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
2199 pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
2200 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
2201 INTEL_PT_PER_CPU_MMAPS);
2203 if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
2204 pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
2205 pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
2206 pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
2207 pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
2208 pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
2209 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
2213 if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
2214 pt->max_non_turbo_ratio =
2215 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
2216 intel_pt_print_info(&auxtrace_info->priv[0],
2217 INTEL_PT_MAX_NONTURBO_RATIO,
2218 INTEL_PT_MAX_NONTURBO_RATIO);
2221 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
2222 info_end = (void *)info + auxtrace_info->header.size;
2224 if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
2227 len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
2228 intel_pt_print_info(&auxtrace_info->priv[0],
2229 INTEL_PT_FILTER_STR_LEN,
2230 INTEL_PT_FILTER_STR_LEN);
2232 const char *filter = (const char *)info;
2234 len = roundup(len + 1, 8);
2236 if ((void *)info > info_end) {
2237 pr_err("%s: bad filter string length\n", __func__);
2239 goto err_free_queues;
2241 pt->filter = memdup(filter, len);
2244 goto err_free_queues;
2246 if (session->header.needs_swap)
2247 mem_bswap_64(pt->filter, len);
2248 if (pt->filter[len - 1]) {
2249 pr_err("%s: filter string not null terminated\n", __func__);
2251 goto err_free_queues;
2253 err = addr_filters__parse_bare_filter(&pt->filts,
2256 goto err_free_queues;
2258 intel_pt_print_info_str("Filter string", pt->filter);
2261 pt->timeless_decoding = intel_pt_timeless_decoding(pt);
2262 if (pt->timeless_decoding && !pt->tc.time_mult)
2263 pt->tc.time_mult = 1;
2264 pt->have_tsc = intel_pt_have_tsc(pt);
2265 pt->sampling_mode = false;
2266 pt->est_tsc = !pt->timeless_decoding;
2268 pt->unknown_thread = thread__new(999999999, 999999999);
2269 if (!pt->unknown_thread) {
2271 goto err_free_queues;
2275 * Since this thread will not be kept in any rbtree not in a
2276 * list, initialize its list node so that at thread__put() the
2277 * current thread lifetime assuption is kept and we don't segfault
2278 * at list_del_init().
2280 INIT_LIST_HEAD(&pt->unknown_thread->node);
2282 err = thread__set_comm(pt->unknown_thread, "unknown", 0);
2284 goto err_delete_thread;
2285 if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
2287 goto err_delete_thread;
2290 pt->auxtrace.process_event = intel_pt_process_event;
2291 pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
2292 pt->auxtrace.flush_events = intel_pt_flush;
2293 pt->auxtrace.free_events = intel_pt_free_events;
2294 pt->auxtrace.free = intel_pt_free;
2295 session->auxtrace = &pt->auxtrace;
2300 if (pt->have_sched_switch == 1) {
2301 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
2302 if (!pt->switch_evsel) {
2303 pr_err("%s: missing sched_switch event\n", __func__);
2305 goto err_delete_thread;
2307 } else if (pt->have_sched_switch == 2 &&
2308 !intel_pt_find_switch(session->evlist)) {
2309 pr_err("%s: missing context_switch attribute flag\n", __func__);
2311 goto err_delete_thread;
2314 if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
2315 pt->synth_opts = *session->itrace_synth_opts;
2317 itrace_synth_opts__set_default(&pt->synth_opts);
2318 if (use_browser != -1) {
2319 pt->synth_opts.branches = false;
2320 pt->synth_opts.callchain = true;
2322 if (session->itrace_synth_opts)
2323 pt->synth_opts.thread_stack =
2324 session->itrace_synth_opts->thread_stack;
2327 if (pt->synth_opts.log)
2328 intel_pt_log_enable();
2330 /* Maximum non-turbo ratio is TSC freq / 100 MHz */
2331 if (pt->tc.time_mult) {
2332 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
2334 if (!pt->max_non_turbo_ratio)
2335 pt->max_non_turbo_ratio =
2336 (tsc_freq + 50000000) / 100000000;
2337 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
2338 intel_pt_log("Maximum non-turbo ratio %u\n",
2339 pt->max_non_turbo_ratio);
2342 if (pt->synth_opts.calls)
2343 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
2344 PERF_IP_FLAG_TRACE_END;
2345 if (pt->synth_opts.returns)
2346 pt->branches_filter |= PERF_IP_FLAG_RETURN |
2347 PERF_IP_FLAG_TRACE_BEGIN;
2349 if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
2350 symbol_conf.use_callchain = true;
2351 if (callchain_register_param(&callchain_param) < 0) {
2352 symbol_conf.use_callchain = false;
2353 pt->synth_opts.callchain = false;
2357 err = intel_pt_synth_events(pt, session);
2359 goto err_delete_thread;
2361 err = auxtrace_queues__process_index(&pt->queues, session);
2363 goto err_delete_thread;
2365 if (pt->queues.populated)
2366 pt->data_queued = true;
2368 if (pt->timeless_decoding)
2369 pr_debug2("Intel PT decoding without timestamps\n");
2374 thread__zput(pt->unknown_thread);
2376 intel_pt_log_disable();
2377 auxtrace_queues__free(&pt->queues);
2378 session->auxtrace = NULL;
2380 addr_filters__exit(&pt->filts);