1 // SPDX-License-Identifier: GPL-2.0
3 * Arm Statistical Profiling Extensions (SPE) support
4 * Copyright (c) 2017-2018, Arm Ltd.
11 #include <linux/bitops.h>
12 #include <linux/kernel.h>
13 #include <linux/log2.h>
14 #include <linux/types.h>
15 #include <linux/zalloc.h>
28 #include "thread-stack.h"
31 #include "util/synthetic-events.h"
34 #include "arm-spe-decoder/arm-spe-decoder.h"
35 #include "arm-spe-decoder/arm-spe-pkt-decoder.h"
37 #define MAX_TIMESTAMP (~0ULL)
40 struct auxtrace auxtrace;
41 struct auxtrace_queues queues;
42 struct auxtrace_heap heap;
43 struct itrace_synth_opts synth_opts;
45 struct perf_session *session;
46 struct machine *machine;
49 struct perf_tsc_conversion tc;
59 u8 sample_remote_access;
61 u8 sample_instructions;
62 u64 instructions_sample_period;
77 unsigned long num_events;
78 u8 use_ctx_pkt_for_pid;
81 struct arm_spe_queue {
83 unsigned int queue_nr;
84 struct auxtrace_buffer *buffer;
85 struct auxtrace_buffer *old_buffer;
86 union perf_event *event_buf;
92 struct arm_spe_decoder *decoder;
95 struct thread *thread;
96 u64 period_instructions;
99 static void arm_spe_dump(struct arm_spe *spe __maybe_unused,
100 unsigned char *buf, size_t len)
102 struct arm_spe_pkt packet;
105 char desc[ARM_SPE_PKT_DESC_MAX];
106 const char *color = PERF_COLOR_BLUE;
108 color_fprintf(stdout, color,
109 ". ... ARM SPE data: size %#zx bytes\n",
113 ret = arm_spe_get_packet(buf, len, &packet);
119 color_fprintf(stdout, color, " %08x: ", pos);
120 for (i = 0; i < pkt_len; i++)
121 color_fprintf(stdout, color, " %02x", buf[i]);
123 color_fprintf(stdout, color, " ");
125 ret = arm_spe_pkt_desc(&packet, desc,
126 ARM_SPE_PKT_DESC_MAX);
128 color_fprintf(stdout, color, " %s\n", desc);
130 color_fprintf(stdout, color, " Bad packet!\n");
138 static void arm_spe_dump_event(struct arm_spe *spe, unsigned char *buf,
142 arm_spe_dump(spe, buf, len);
145 static int arm_spe_get_trace(struct arm_spe_buffer *b, void *data)
147 struct arm_spe_queue *speq = data;
148 struct auxtrace_buffer *buffer = speq->buffer;
149 struct auxtrace_buffer *old_buffer = speq->old_buffer;
150 struct auxtrace_queue *queue;
152 queue = &speq->spe->queues.queue_array[speq->queue_nr];
154 buffer = auxtrace_buffer__next(queue, buffer);
155 /* If no more data, drop the previous auxtrace_buffer and return */
158 auxtrace_buffer__drop_data(old_buffer);
163 speq->buffer = buffer;
165 /* If the aux_buffer doesn't have data associated, try to load it */
167 /* get the file desc associated with the perf data file */
168 int fd = perf_data__fd(speq->spe->session->data);
170 buffer->data = auxtrace_buffer__get_data(buffer, fd);
175 b->len = buffer->size;
176 b->buf = buffer->data;
180 auxtrace_buffer__drop_data(old_buffer);
181 speq->old_buffer = buffer;
183 auxtrace_buffer__drop_data(buffer);
184 return arm_spe_get_trace(b, data);
190 static struct arm_spe_queue *arm_spe__alloc_queue(struct arm_spe *spe,
191 unsigned int queue_nr)
193 struct arm_spe_params params = { .get_trace = 0, };
194 struct arm_spe_queue *speq;
196 speq = zalloc(sizeof(*speq));
200 speq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
201 if (!speq->event_buf)
205 speq->queue_nr = queue_nr;
209 speq->period_instructions = 0;
212 params.get_trace = arm_spe_get_trace;
215 /* create new decoder */
216 speq->decoder = arm_spe_decoder_new(¶ms);
223 zfree(&speq->event_buf);
229 static inline u8 arm_spe_cpumode(struct arm_spe *spe, u64 ip)
231 return ip >= spe->kernel_start ?
232 PERF_RECORD_MISC_KERNEL :
233 PERF_RECORD_MISC_USER;
236 static void arm_spe_set_pid_tid_cpu(struct arm_spe *spe,
237 struct auxtrace_queue *queue)
239 struct arm_spe_queue *speq = queue->priv;
242 tid = machine__get_current_tid(spe->machine, speq->cpu);
245 thread__zput(speq->thread);
247 speq->tid = queue->tid;
249 if ((!speq->thread) && (speq->tid != -1)) {
250 speq->thread = machine__find_thread(spe->machine, -1,
255 speq->pid = speq->thread->pid_;
256 if (queue->cpu == -1)
257 speq->cpu = speq->thread->cpu;
261 static int arm_spe_set_tid(struct arm_spe_queue *speq, pid_t tid)
263 struct arm_spe *spe = speq->spe;
264 int err = machine__set_current_tid(spe->machine, speq->cpu, -1, tid);
269 arm_spe_set_pid_tid_cpu(spe, &spe->queues.queue_array[speq->queue_nr]);
274 static void arm_spe_prep_sample(struct arm_spe *spe,
275 struct arm_spe_queue *speq,
276 union perf_event *event,
277 struct perf_sample *sample)
279 struct arm_spe_record *record = &speq->decoder->record;
281 if (!spe->timeless_decoding)
282 sample->time = tsc_to_perf_time(record->timestamp, &spe->tc);
284 sample->ip = record->from_ip;
285 sample->cpumode = arm_spe_cpumode(spe, sample->ip);
286 sample->pid = speq->pid;
287 sample->tid = speq->tid;
289 sample->cpu = speq->cpu;
291 event->sample.header.type = PERF_RECORD_SAMPLE;
292 event->sample.header.misc = sample->cpumode;
293 event->sample.header.size = sizeof(struct perf_event_header);
296 static int arm_spe__inject_event(union perf_event *event, struct perf_sample *sample, u64 type)
298 event->header.size = perf_event__sample_event_size(sample, type, 0);
299 return perf_event__synthesize_sample(event, type, 0, sample);
303 arm_spe_deliver_synth_event(struct arm_spe *spe,
304 struct arm_spe_queue *speq __maybe_unused,
305 union perf_event *event,
306 struct perf_sample *sample)
310 if (spe->synth_opts.inject) {
311 ret = arm_spe__inject_event(event, sample, spe->sample_type);
316 ret = perf_session__deliver_synth_event(spe->session, event, sample);
318 pr_err("ARM SPE: failed to deliver event, error %d\n", ret);
323 static int arm_spe__synth_mem_sample(struct arm_spe_queue *speq,
324 u64 spe_events_id, u64 data_src)
326 struct arm_spe *spe = speq->spe;
327 struct arm_spe_record *record = &speq->decoder->record;
328 union perf_event *event = speq->event_buf;
329 struct perf_sample sample = { .ip = 0, };
331 arm_spe_prep_sample(spe, speq, event, &sample);
333 sample.id = spe_events_id;
334 sample.stream_id = spe_events_id;
335 sample.addr = record->virt_addr;
336 sample.phys_addr = record->phys_addr;
337 sample.data_src = data_src;
338 sample.weight = record->latency;
340 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
343 static int arm_spe__synth_branch_sample(struct arm_spe_queue *speq,
346 struct arm_spe *spe = speq->spe;
347 struct arm_spe_record *record = &speq->decoder->record;
348 union perf_event *event = speq->event_buf;
349 struct perf_sample sample = { .ip = 0, };
351 arm_spe_prep_sample(spe, speq, event, &sample);
353 sample.id = spe_events_id;
354 sample.stream_id = spe_events_id;
355 sample.addr = record->to_ip;
356 sample.weight = record->latency;
358 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
361 static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq,
362 u64 spe_events_id, u64 data_src)
364 struct arm_spe *spe = speq->spe;
365 struct arm_spe_record *record = &speq->decoder->record;
366 union perf_event *event = speq->event_buf;
367 struct perf_sample sample = { .ip = 0, };
370 * Handles perf instruction sampling period.
372 speq->period_instructions++;
373 if (speq->period_instructions < spe->instructions_sample_period)
375 speq->period_instructions = 0;
377 arm_spe_prep_sample(spe, speq, event, &sample);
379 sample.id = spe_events_id;
380 sample.stream_id = spe_events_id;
381 sample.addr = record->virt_addr;
382 sample.phys_addr = record->phys_addr;
383 sample.data_src = data_src;
384 sample.period = spe->instructions_sample_period;
385 sample.weight = record->latency;
387 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
390 static u64 arm_spe__synth_data_source(const struct arm_spe_record *record)
392 union perf_mem_data_src data_src = { 0 };
394 if (record->op == ARM_SPE_LD)
395 data_src.mem_op = PERF_MEM_OP_LOAD;
396 else if (record->op == ARM_SPE_ST)
397 data_src.mem_op = PERF_MEM_OP_STORE;
401 if (record->type & (ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS)) {
402 data_src.mem_lvl = PERF_MEM_LVL_L3;
404 if (record->type & ARM_SPE_LLC_MISS)
405 data_src.mem_lvl |= PERF_MEM_LVL_MISS;
407 data_src.mem_lvl |= PERF_MEM_LVL_HIT;
408 } else if (record->type & (ARM_SPE_L1D_ACCESS | ARM_SPE_L1D_MISS)) {
409 data_src.mem_lvl = PERF_MEM_LVL_L1;
411 if (record->type & ARM_SPE_L1D_MISS)
412 data_src.mem_lvl |= PERF_MEM_LVL_MISS;
414 data_src.mem_lvl |= PERF_MEM_LVL_HIT;
417 if (record->type & ARM_SPE_REMOTE_ACCESS)
418 data_src.mem_lvl |= PERF_MEM_LVL_REM_CCE1;
420 if (record->type & (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {
421 data_src.mem_dtlb = PERF_MEM_TLB_WK;
423 if (record->type & ARM_SPE_TLB_MISS)
424 data_src.mem_dtlb |= PERF_MEM_TLB_MISS;
426 data_src.mem_dtlb |= PERF_MEM_TLB_HIT;
432 static int arm_spe_sample(struct arm_spe_queue *speq)
434 const struct arm_spe_record *record = &speq->decoder->record;
435 struct arm_spe *spe = speq->spe;
439 data_src = arm_spe__synth_data_source(record);
441 if (spe->sample_flc) {
442 if (record->type & ARM_SPE_L1D_MISS) {
443 err = arm_spe__synth_mem_sample(speq, spe->l1d_miss_id,
449 if (record->type & ARM_SPE_L1D_ACCESS) {
450 err = arm_spe__synth_mem_sample(speq, spe->l1d_access_id,
457 if (spe->sample_llc) {
458 if (record->type & ARM_SPE_LLC_MISS) {
459 err = arm_spe__synth_mem_sample(speq, spe->llc_miss_id,
465 if (record->type & ARM_SPE_LLC_ACCESS) {
466 err = arm_spe__synth_mem_sample(speq, spe->llc_access_id,
473 if (spe->sample_tlb) {
474 if (record->type & ARM_SPE_TLB_MISS) {
475 err = arm_spe__synth_mem_sample(speq, spe->tlb_miss_id,
481 if (record->type & ARM_SPE_TLB_ACCESS) {
482 err = arm_spe__synth_mem_sample(speq, spe->tlb_access_id,
489 if (spe->sample_branch && (record->type & ARM_SPE_BRANCH_MISS)) {
490 err = arm_spe__synth_branch_sample(speq, spe->branch_miss_id);
495 if (spe->sample_remote_access &&
496 (record->type & ARM_SPE_REMOTE_ACCESS)) {
497 err = arm_spe__synth_mem_sample(speq, spe->remote_access_id,
504 * When data_src is zero it means the record is not a memory operation,
505 * skip to synthesize memory sample for this case.
507 if (spe->sample_memory && data_src) {
508 err = arm_spe__synth_mem_sample(speq, spe->memory_id, data_src);
513 if (spe->sample_instructions) {
514 err = arm_spe__synth_instruction_sample(speq, spe->instructions_id, data_src);
522 static int arm_spe_run_decoder(struct arm_spe_queue *speq, u64 *timestamp)
524 struct arm_spe *spe = speq->spe;
525 struct arm_spe_record *record;
528 if (!spe->kernel_start)
529 spe->kernel_start = machine__kernel_start(spe->machine);
533 * The usual logic is firstly to decode the packets, and then
534 * based the record to synthesize sample; but here the flow is
535 * reversed: it calls arm_spe_sample() for synthesizing samples
536 * prior to arm_spe_decode().
538 * Two reasons for this code logic:
539 * 1. Firstly, when setup queue in arm_spe__setup_queue(), it
540 * has decoded trace data and generated a record, but the record
541 * is left to generate sample until run to here, so it's correct
542 * to synthesize sample for the left record.
543 * 2. After decoding trace data, it needs to compare the record
544 * timestamp with the coming perf event, if the record timestamp
545 * is later than the perf event, it needs bail out and pushs the
546 * record into auxtrace heap, thus the record can be deferred to
547 * synthesize sample until run to here at the next time; so this
548 * can correlate samples between Arm SPE trace data and other
549 * perf events with correct time ordering.
553 * Update pid/tid info.
555 record = &speq->decoder->record;
556 if (!spe->timeless_decoding && record->context_id != (u64)-1) {
557 ret = arm_spe_set_tid(speq, record->context_id);
561 spe->use_ctx_pkt_for_pid = true;
564 ret = arm_spe_sample(speq);
568 ret = arm_spe_decode(speq->decoder);
570 pr_debug("No data or all data has been processed.\n");
575 * Error is detected when decode SPE trace data, continue to
576 * the next trace data and find out more records.
581 record = &speq->decoder->record;
583 /* Update timestamp for the last record */
584 if (record->timestamp > speq->timestamp)
585 speq->timestamp = record->timestamp;
588 * If the timestamp of the queue is later than timestamp of the
589 * coming perf event, bail out so can allow the perf event to
590 * be processed ahead.
592 if (!spe->timeless_decoding && speq->timestamp >= *timestamp) {
593 *timestamp = speq->timestamp;
601 static int arm_spe__setup_queue(struct arm_spe *spe,
602 struct auxtrace_queue *queue,
603 unsigned int queue_nr)
605 struct arm_spe_queue *speq = queue->priv;
606 struct arm_spe_record *record;
608 if (list_empty(&queue->head) || speq)
611 speq = arm_spe__alloc_queue(spe, queue_nr);
618 if (queue->cpu != -1)
619 speq->cpu = queue->cpu;
621 if (!speq->on_heap) {
624 if (spe->timeless_decoding)
628 ret = arm_spe_decode(speq->decoder);
636 record = &speq->decoder->record;
638 speq->timestamp = record->timestamp;
639 ret = auxtrace_heap__add(&spe->heap, queue_nr, speq->timestamp);
642 speq->on_heap = true;
648 static int arm_spe__setup_queues(struct arm_spe *spe)
653 for (i = 0; i < spe->queues.nr_queues; i++) {
654 ret = arm_spe__setup_queue(spe, &spe->queues.queue_array[i], i);
662 static int arm_spe__update_queues(struct arm_spe *spe)
664 if (spe->queues.new_data) {
665 spe->queues.new_data = false;
666 return arm_spe__setup_queues(spe);
672 static bool arm_spe__is_timeless_decoding(struct arm_spe *spe)
675 struct evlist *evlist = spe->session->evlist;
676 bool timeless_decoding = true;
679 * Circle through the list of event and complain if we find one
680 * with the time bit set.
682 evlist__for_each_entry(evlist, evsel) {
683 if ((evsel->core.attr.sample_type & PERF_SAMPLE_TIME))
684 timeless_decoding = false;
687 return timeless_decoding;
690 static int arm_spe_process_queues(struct arm_spe *spe, u64 timestamp)
692 unsigned int queue_nr;
697 struct auxtrace_queue *queue;
698 struct arm_spe_queue *speq;
700 if (!spe->heap.heap_cnt)
703 if (spe->heap.heap_array[0].ordinal >= timestamp)
706 queue_nr = spe->heap.heap_array[0].queue_nr;
707 queue = &spe->queues.queue_array[queue_nr];
710 auxtrace_heap__pop(&spe->heap);
712 if (spe->heap.heap_cnt) {
713 ts = spe->heap.heap_array[0].ordinal + 1;
721 * A previous context-switch event has set pid/tid in the machine's context, so
722 * here we need to update the pid/tid in the thread and SPE queue.
724 if (!spe->use_ctx_pkt_for_pid)
725 arm_spe_set_pid_tid_cpu(spe, queue);
727 ret = arm_spe_run_decoder(speq, &ts);
729 auxtrace_heap__add(&spe->heap, queue_nr, ts);
734 ret = auxtrace_heap__add(&spe->heap, queue_nr, ts);
738 speq->on_heap = false;
745 static int arm_spe_process_timeless_queues(struct arm_spe *spe, pid_t tid,
748 struct auxtrace_queues *queues = &spe->queues;
752 for (i = 0; i < queues->nr_queues; i++) {
753 struct auxtrace_queue *queue = &spe->queues.queue_array[i];
754 struct arm_spe_queue *speq = queue->priv;
756 if (speq && (tid == -1 || speq->tid == tid)) {
758 arm_spe_set_pid_tid_cpu(spe, queue);
759 arm_spe_run_decoder(speq, &ts);
765 static int arm_spe_context_switch(struct arm_spe *spe, union perf_event *event,
766 struct perf_sample *sample)
771 if (!(event->header.misc & PERF_RECORD_MISC_SWITCH_OUT))
774 pid = event->context_switch.next_prev_pid;
775 tid = event->context_switch.next_prev_tid;
779 pr_warning("context_switch event has no tid\n");
781 return machine__set_current_tid(spe->machine, cpu, pid, tid);
784 static int arm_spe_process_event(struct perf_session *session,
785 union perf_event *event,
786 struct perf_sample *sample,
787 struct perf_tool *tool)
791 struct arm_spe *spe = container_of(session->auxtrace,
792 struct arm_spe, auxtrace);
797 if (!tool->ordered_events) {
798 pr_err("SPE trace requires ordered events\n");
802 if (sample->time && (sample->time != (u64) -1))
803 timestamp = perf_time_to_tsc(sample->time, &spe->tc);
807 if (timestamp || spe->timeless_decoding) {
808 err = arm_spe__update_queues(spe);
813 if (spe->timeless_decoding) {
814 if (event->header.type == PERF_RECORD_EXIT) {
815 err = arm_spe_process_timeless_queues(spe,
819 } else if (timestamp) {
820 err = arm_spe_process_queues(spe, timestamp);
824 if (!spe->use_ctx_pkt_for_pid &&
825 (event->header.type == PERF_RECORD_SWITCH_CPU_WIDE ||
826 event->header.type == PERF_RECORD_SWITCH))
827 err = arm_spe_context_switch(spe, event, sample);
833 static int arm_spe_process_auxtrace_event(struct perf_session *session,
834 union perf_event *event,
835 struct perf_tool *tool __maybe_unused)
837 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
840 if (!spe->data_queued) {
841 struct auxtrace_buffer *buffer;
843 int fd = perf_data__fd(session->data);
846 if (perf_data__is_pipe(session->data)) {
849 data_offset = lseek(fd, 0, SEEK_CUR);
850 if (data_offset == -1)
854 err = auxtrace_queues__add_event(&spe->queues, session, event,
855 data_offset, &buffer);
859 /* Dump here now we have copied a piped trace out of the pipe */
861 if (auxtrace_buffer__get_data(buffer, fd)) {
862 arm_spe_dump_event(spe, buffer->data,
864 auxtrace_buffer__put_data(buffer);
872 static int arm_spe_flush(struct perf_session *session __maybe_unused,
873 struct perf_tool *tool __maybe_unused)
875 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
882 if (!tool->ordered_events)
885 ret = arm_spe__update_queues(spe);
889 if (spe->timeless_decoding)
890 return arm_spe_process_timeless_queues(spe, -1,
893 ret = arm_spe_process_queues(spe, MAX_TIMESTAMP);
897 if (!spe->use_ctx_pkt_for_pid)
898 ui__warning("Arm SPE CONTEXT packets not found in the traces.\n"
899 "Matching of TIDs to SPE events could be inaccurate.\n");
904 static void arm_spe_free_queue(void *priv)
906 struct arm_spe_queue *speq = priv;
910 thread__zput(speq->thread);
911 arm_spe_decoder_free(speq->decoder);
912 zfree(&speq->event_buf);
916 static void arm_spe_free_events(struct perf_session *session)
918 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
920 struct auxtrace_queues *queues = &spe->queues;
923 for (i = 0; i < queues->nr_queues; i++) {
924 arm_spe_free_queue(queues->queue_array[i].priv);
925 queues->queue_array[i].priv = NULL;
927 auxtrace_queues__free(queues);
930 static void arm_spe_free(struct perf_session *session)
932 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
935 auxtrace_heap__free(&spe->heap);
936 arm_spe_free_events(session);
937 session->auxtrace = NULL;
941 static bool arm_spe_evsel_is_auxtrace(struct perf_session *session,
944 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe, auxtrace);
946 return evsel->core.attr.type == spe->pmu_type;
949 static const char * const arm_spe_info_fmts[] = {
950 [ARM_SPE_PMU_TYPE] = " PMU Type %"PRId64"\n",
953 static void arm_spe_print_info(__u64 *arr)
958 fprintf(stdout, arm_spe_info_fmts[ARM_SPE_PMU_TYPE], arr[ARM_SPE_PMU_TYPE]);
961 struct arm_spe_synth {
962 struct perf_tool dummy_tool;
963 struct perf_session *session;
966 static int arm_spe_event_synth(struct perf_tool *tool,
967 union perf_event *event,
968 struct perf_sample *sample __maybe_unused,
969 struct machine *machine __maybe_unused)
971 struct arm_spe_synth *arm_spe_synth =
972 container_of(tool, struct arm_spe_synth, dummy_tool);
974 return perf_session__deliver_synth_event(arm_spe_synth->session,
978 static int arm_spe_synth_event(struct perf_session *session,
979 struct perf_event_attr *attr, u64 id)
981 struct arm_spe_synth arm_spe_synth;
983 memset(&arm_spe_synth, 0, sizeof(struct arm_spe_synth));
984 arm_spe_synth.session = session;
986 return perf_event__synthesize_attr(&arm_spe_synth.dummy_tool, attr, 1,
987 &id, arm_spe_event_synth);
990 static void arm_spe_set_event_name(struct evlist *evlist, u64 id,
995 evlist__for_each_entry(evlist, evsel) {
996 if (evsel->core.id && evsel->core.id[0] == id) {
999 evsel->name = strdup(name);
1006 arm_spe_synth_events(struct arm_spe *spe, struct perf_session *session)
1008 struct evlist *evlist = session->evlist;
1009 struct evsel *evsel;
1010 struct perf_event_attr attr;
1015 evlist__for_each_entry(evlist, evsel) {
1016 if (evsel->core.attr.type == spe->pmu_type) {
1023 pr_debug("No selected events with SPE trace data\n");
1027 memset(&attr, 0, sizeof(struct perf_event_attr));
1028 attr.size = sizeof(struct perf_event_attr);
1029 attr.type = PERF_TYPE_HARDWARE;
1030 attr.sample_type = evsel->core.attr.sample_type &
1031 (PERF_SAMPLE_MASK | PERF_SAMPLE_PHYS_ADDR);
1032 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
1033 PERF_SAMPLE_PERIOD | PERF_SAMPLE_DATA_SRC |
1034 PERF_SAMPLE_WEIGHT | PERF_SAMPLE_ADDR;
1035 if (spe->timeless_decoding)
1036 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
1038 attr.sample_type |= PERF_SAMPLE_TIME;
1040 spe->sample_type = attr.sample_type;
1042 attr.exclude_user = evsel->core.attr.exclude_user;
1043 attr.exclude_kernel = evsel->core.attr.exclude_kernel;
1044 attr.exclude_hv = evsel->core.attr.exclude_hv;
1045 attr.exclude_host = evsel->core.attr.exclude_host;
1046 attr.exclude_guest = evsel->core.attr.exclude_guest;
1047 attr.sample_id_all = evsel->core.attr.sample_id_all;
1048 attr.read_format = evsel->core.attr.read_format;
1050 /* create new id val to be a fixed offset from evsel id */
1051 id = evsel->core.id[0] + 1000000000;
1056 if (spe->synth_opts.flc) {
1057 spe->sample_flc = true;
1059 /* Level 1 data cache miss */
1060 err = arm_spe_synth_event(session, &attr, id);
1063 spe->l1d_miss_id = id;
1064 arm_spe_set_event_name(evlist, id, "l1d-miss");
1067 /* Level 1 data cache access */
1068 err = arm_spe_synth_event(session, &attr, id);
1071 spe->l1d_access_id = id;
1072 arm_spe_set_event_name(evlist, id, "l1d-access");
1076 if (spe->synth_opts.llc) {
1077 spe->sample_llc = true;
1079 /* Last level cache miss */
1080 err = arm_spe_synth_event(session, &attr, id);
1083 spe->llc_miss_id = id;
1084 arm_spe_set_event_name(evlist, id, "llc-miss");
1087 /* Last level cache access */
1088 err = arm_spe_synth_event(session, &attr, id);
1091 spe->llc_access_id = id;
1092 arm_spe_set_event_name(evlist, id, "llc-access");
1096 if (spe->synth_opts.tlb) {
1097 spe->sample_tlb = true;
1100 err = arm_spe_synth_event(session, &attr, id);
1103 spe->tlb_miss_id = id;
1104 arm_spe_set_event_name(evlist, id, "tlb-miss");
1108 err = arm_spe_synth_event(session, &attr, id);
1111 spe->tlb_access_id = id;
1112 arm_spe_set_event_name(evlist, id, "tlb-access");
1116 if (spe->synth_opts.branches) {
1117 spe->sample_branch = true;
1120 err = arm_spe_synth_event(session, &attr, id);
1123 spe->branch_miss_id = id;
1124 arm_spe_set_event_name(evlist, id, "branch-miss");
1128 if (spe->synth_opts.remote_access) {
1129 spe->sample_remote_access = true;
1132 err = arm_spe_synth_event(session, &attr, id);
1135 spe->remote_access_id = id;
1136 arm_spe_set_event_name(evlist, id, "remote-access");
1140 if (spe->synth_opts.mem) {
1141 spe->sample_memory = true;
1143 err = arm_spe_synth_event(session, &attr, id);
1146 spe->memory_id = id;
1147 arm_spe_set_event_name(evlist, id, "memory");
1151 if (spe->synth_opts.instructions) {
1152 if (spe->synth_opts.period_type != PERF_ITRACE_PERIOD_INSTRUCTIONS) {
1153 pr_warning("Only instruction-based sampling period is currently supported by Arm SPE.\n");
1154 goto synth_instructions_out;
1156 if (spe->synth_opts.period > 1)
1157 pr_warning("Arm SPE has a hardware-based sample period.\n"
1158 "Additional instruction events will be discarded by --itrace\n");
1160 spe->sample_instructions = true;
1161 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1162 attr.sample_period = spe->synth_opts.period;
1163 spe->instructions_sample_period = attr.sample_period;
1164 err = arm_spe_synth_event(session, &attr, id);
1167 spe->instructions_id = id;
1168 arm_spe_set_event_name(evlist, id, "instructions");
1170 synth_instructions_out:
1175 int arm_spe_process_auxtrace_info(union perf_event *event,
1176 struct perf_session *session)
1178 struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info;
1179 size_t min_sz = sizeof(u64) * ARM_SPE_AUXTRACE_PRIV_MAX;
1180 struct perf_record_time_conv *tc = &session->time_conv;
1181 struct arm_spe *spe;
1184 if (auxtrace_info->header.size < sizeof(struct perf_record_auxtrace_info) +
1188 spe = zalloc(sizeof(struct arm_spe));
1192 err = auxtrace_queues__init(&spe->queues);
1196 spe->session = session;
1197 spe->machine = &session->machines.host; /* No kvm support */
1198 spe->auxtrace_type = auxtrace_info->type;
1199 spe->pmu_type = auxtrace_info->priv[ARM_SPE_PMU_TYPE];
1201 spe->timeless_decoding = arm_spe__is_timeless_decoding(spe);
1204 * The synthesized event PERF_RECORD_TIME_CONV has been handled ahead
1205 * and the parameters for hardware clock are stored in the session
1206 * context. Passes these parameters to the struct perf_tsc_conversion
1207 * in "spe->tc", which is used for later conversion between clock
1208 * counter and timestamp.
1210 * For backward compatibility, copies the fields starting from
1211 * "time_cycles" only if they are contained in the event.
1213 spe->tc.time_shift = tc->time_shift;
1214 spe->tc.time_mult = tc->time_mult;
1215 spe->tc.time_zero = tc->time_zero;
1217 if (event_contains(*tc, time_cycles)) {
1218 spe->tc.time_cycles = tc->time_cycles;
1219 spe->tc.time_mask = tc->time_mask;
1220 spe->tc.cap_user_time_zero = tc->cap_user_time_zero;
1221 spe->tc.cap_user_time_short = tc->cap_user_time_short;
1224 spe->auxtrace.process_event = arm_spe_process_event;
1225 spe->auxtrace.process_auxtrace_event = arm_spe_process_auxtrace_event;
1226 spe->auxtrace.flush_events = arm_spe_flush;
1227 spe->auxtrace.free_events = arm_spe_free_events;
1228 spe->auxtrace.free = arm_spe_free;
1229 spe->auxtrace.evsel_is_auxtrace = arm_spe_evsel_is_auxtrace;
1230 session->auxtrace = &spe->auxtrace;
1232 arm_spe_print_info(&auxtrace_info->priv[0]);
1237 if (session->itrace_synth_opts && session->itrace_synth_opts->set)
1238 spe->synth_opts = *session->itrace_synth_opts;
1240 itrace_synth_opts__set_default(&spe->synth_opts, false);
1242 err = arm_spe_synth_events(spe, session);
1244 goto err_free_queues;
1246 err = auxtrace_queues__process_index(&spe->queues, session);
1248 goto err_free_queues;
1250 if (spe->queues.populated)
1251 spe->data_queued = true;
1256 auxtrace_queues__free(&spe->queues);
1257 session->auxtrace = NULL;