tools/perf/pmu-events/arch/arm64/arm/cortex-a76/memory.json

   1 [
   2     {
   3         "PublicDescription": "This event counts memory accesses due to load or store instructions. This event counts the sum of MEM_ACCESS_RD and MEM_ACCESS_WR.",
   4         "ArchStdEvent": "MEM_ACCESS"
   5     },
   6     {
   7         "ArchStdEvent": "REMOTE_ACCESS"
   8     },
   9     {
  10          "ArchStdEvent": "MEM_ACCESS_RD"
  11     },
  12     {
  13          "ArchStdEvent": "MEM_ACCESS_WR"
  14     },
  15     {
  16          "ArchStdEvent": "UNALIGNED_LD_SPEC"
  17     },
  18     {
  19          "ArchStdEvent": "UNALIGNED_ST_SPEC"
  20     },
  21     {
  22          "ArchStdEvent": "UNALIGNED_LDST_SPEC"
  23     }
  24 ]