2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include <linux/component.h>
21 #include <linux/pinctrl/consumer.h>
22 #include <linux/suspend.h>
23 #include <drm/drm_atomic.h>
24 #include <drm/drm_atomic_helper.h>
25 #include <drm/drm_fb_helper.h>
26 #include <drm/drm_gem_framebuffer_helper.h>
28 #include "tilcdc_drv.h"
29 #include "tilcdc_regs.h"
30 #include "tilcdc_tfp410.h"
31 #include "tilcdc_panel.h"
32 #include "tilcdc_external.h"
34 static LIST_HEAD(module_list);
36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
40 DRM_FORMAT_XBGR8888 };
42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
44 DRM_FORMAT_XRGB8888 };
46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
48 DRM_FORMAT_XRGB8888 };
50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
51 const struct tilcdc_module_ops *funcs)
55 INIT_LIST_HEAD(&mod->list);
56 list_add(&mod->list, &module_list);
59 void tilcdc_module_cleanup(struct tilcdc_module *mod)
64 static struct of_device_id tilcdc_of_match[];
66 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
67 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
69 return drm_gem_fb_create(dev, file_priv, mode_cmd);
72 static int tilcdc_atomic_check(struct drm_device *dev,
73 struct drm_atomic_state *state)
77 ret = drm_atomic_helper_check_modeset(dev, state);
81 ret = drm_atomic_helper_check_planes(dev, state);
86 * tilcdc ->atomic_check can update ->mode_changed if pixel format
87 * changes, hence will we check modeset changes again.
89 ret = drm_atomic_helper_check_modeset(dev, state);
96 static int tilcdc_commit(struct drm_device *dev,
97 struct drm_atomic_state *state,
102 ret = drm_atomic_helper_prepare_planes(dev, state);
106 ret = drm_atomic_helper_swap_state(state, true);
108 drm_atomic_helper_cleanup_planes(dev, state);
113 * Everything below can be run asynchronously without the need to grab
114 * any modeset locks at all under one condition: It must be guaranteed
115 * that the asynchronous work has either been cancelled (if the driver
116 * supports it, which at least requires that the framebuffers get
117 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
118 * before the new state gets committed on the software side with
119 * drm_atomic_helper_swap_state().
121 * This scheme allows new atomic state updates to be prepared and
122 * checked in parallel to the asynchronous completion of the previous
123 * update. Which is important since compositors need to figure out the
124 * composition of the next frame right after having submitted the
128 drm_atomic_helper_commit_modeset_disables(dev, state);
130 drm_atomic_helper_commit_planes(dev, state, 0);
132 drm_atomic_helper_commit_modeset_enables(dev, state);
134 drm_atomic_helper_wait_for_vblanks(dev, state);
136 drm_atomic_helper_cleanup_planes(dev, state);
141 static const struct drm_mode_config_funcs mode_config_funcs = {
142 .fb_create = tilcdc_fb_create,
143 .output_poll_changed = drm_fb_helper_output_poll_changed,
144 .atomic_check = tilcdc_atomic_check,
145 .atomic_commit = tilcdc_commit,
148 static void modeset_init(struct drm_device *dev)
150 struct tilcdc_drm_private *priv = dev->dev_private;
151 struct tilcdc_module *mod;
153 list_for_each_entry(mod, &module_list, list) {
154 DBG("loading module: %s", mod->name);
155 mod->funcs->modeset_init(mod, dev);
158 dev->mode_config.min_width = 0;
159 dev->mode_config.min_height = 0;
160 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
161 dev->mode_config.max_height = 2048;
162 dev->mode_config.funcs = &mode_config_funcs;
165 #ifdef CONFIG_CPU_FREQ
166 static int cpufreq_transition(struct notifier_block *nb,
167 unsigned long val, void *data)
169 struct tilcdc_drm_private *priv = container_of(nb,
170 struct tilcdc_drm_private, freq_transition);
172 if (val == CPUFREQ_POSTCHANGE)
173 tilcdc_crtc_update_clk(priv->crtc);
183 static void tilcdc_fini(struct drm_device *dev)
185 struct tilcdc_drm_private *priv = dev->dev_private;
187 #ifdef CONFIG_CPU_FREQ
188 if (priv->freq_transition.notifier_call)
189 cpufreq_unregister_notifier(&priv->freq_transition,
190 CPUFREQ_TRANSITION_NOTIFIER);
194 tilcdc_crtc_shutdown(priv->crtc);
196 if (priv->is_registered)
197 drm_dev_unregister(dev);
199 drm_kms_helper_poll_fini(dev);
201 drm_fb_cma_fbdev_fini(dev);
203 drm_irq_uninstall(dev);
204 drm_mode_config_cleanup(dev);
213 flush_workqueue(priv->wq);
214 destroy_workqueue(priv->wq);
217 dev->dev_private = NULL;
219 pm_runtime_disable(dev->dev);
224 static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
226 struct drm_device *ddev;
227 struct platform_device *pdev = to_platform_device(dev);
228 struct device_node *node = dev->of_node;
229 struct tilcdc_drm_private *priv;
230 struct resource *res;
234 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
238 ddev = drm_dev_alloc(ddrv, dev);
240 return PTR_ERR(ddev);
242 ddev->dev_private = priv;
243 platform_set_drvdata(pdev, ddev);
244 drm_mode_config_init(ddev);
246 priv->is_componentized =
247 tilcdc_get_external_components(dev, NULL) > 0;
249 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
255 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
257 dev_err(dev, "failed to get memory resource\n");
262 priv->mmio = ioremap_nocache(res->start, resource_size(res));
264 dev_err(dev, "failed to ioremap\n");
269 priv->clk = clk_get(dev, "fck");
270 if (IS_ERR(priv->clk)) {
271 dev_err(dev, "failed to get functional clock\n");
276 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
277 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
279 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
281 if (of_property_read_u32(node, "max-width", &priv->max_width))
282 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
284 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
286 if (of_property_read_u32(node, "max-pixelclock",
287 &priv->max_pixelclock))
288 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
290 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
292 pm_runtime_enable(dev);
294 /* Determine LCD IP Version */
295 pm_runtime_get_sync(dev);
296 switch (tilcdc_read(ddev, LCDC_PID_REG)) {
305 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
306 "defaulting to LCD revision 1\n",
307 tilcdc_read(ddev, LCDC_PID_REG));
312 pm_runtime_put_sync(dev);
314 if (priv->rev == 1) {
315 DBG("Revision 1 LCDC supports only RGB565 format");
316 priv->pixelformats = tilcdc_rev1_formats;
317 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
320 const char *str = "\0";
322 of_property_read_string(node, "blue-and-red-wiring", &str);
323 if (0 == strcmp(str, "crossed")) {
324 DBG("Configured for crossed blue and red wires");
325 priv->pixelformats = tilcdc_crossed_formats;
326 priv->num_pixelformats =
327 ARRAY_SIZE(tilcdc_crossed_formats);
328 bpp = 32; /* Choose bpp with RGB support for fbdef */
329 } else if (0 == strcmp(str, "straight")) {
330 DBG("Configured for straight blue and red wires");
331 priv->pixelformats = tilcdc_straight_formats;
332 priv->num_pixelformats =
333 ARRAY_SIZE(tilcdc_straight_formats);
334 bpp = 16; /* Choose bpp with RGB support for fbdef */
336 DBG("Blue and red wiring '%s' unknown, use legacy mode",
338 priv->pixelformats = tilcdc_legacy_formats;
339 priv->num_pixelformats =
340 ARRAY_SIZE(tilcdc_legacy_formats);
341 bpp = 16; /* This is just a guess */
345 ret = tilcdc_crtc_create(ddev);
347 dev_err(dev, "failed to create crtc\n");
352 #ifdef CONFIG_CPU_FREQ
353 priv->freq_transition.notifier_call = cpufreq_transition;
354 ret = cpufreq_register_notifier(&priv->freq_transition,
355 CPUFREQ_TRANSITION_NOTIFIER);
357 dev_err(dev, "failed to register cpufreq notifier\n");
358 priv->freq_transition.notifier_call = NULL;
363 if (priv->is_componentized) {
364 ret = component_bind_all(dev, ddev);
368 ret = tilcdc_add_component_encoder(ddev);
372 ret = tilcdc_attach_external_device(ddev);
377 if (!priv->external_connector &&
378 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
379 dev_err(dev, "no encoders/connectors found\n");
384 ret = drm_vblank_init(ddev, 1);
386 dev_err(dev, "failed to initialize vblank\n");
390 ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
392 dev_err(dev, "failed to install IRQ handler\n");
396 drm_mode_config_reset(ddev);
398 ret = drm_fb_cma_fbdev_init(ddev, bpp, 0);
402 drm_kms_helper_poll_init(ddev);
404 ret = drm_dev_register(ddev, 0);
408 priv->is_registered = true;
417 static irqreturn_t tilcdc_irq(int irq, void *arg)
419 struct drm_device *dev = arg;
420 struct tilcdc_drm_private *priv = dev->dev_private;
421 return tilcdc_crtc_irq(priv->crtc);
424 #if defined(CONFIG_DEBUG_FS)
425 static const struct {
431 #define REG(rev, save, reg) { #reg, rev, save, reg }
432 /* exists in revision 1: */
433 REG(1, false, LCDC_PID_REG),
434 REG(1, true, LCDC_CTRL_REG),
435 REG(1, false, LCDC_STAT_REG),
436 REG(1, true, LCDC_RASTER_CTRL_REG),
437 REG(1, true, LCDC_RASTER_TIMING_0_REG),
438 REG(1, true, LCDC_RASTER_TIMING_1_REG),
439 REG(1, true, LCDC_RASTER_TIMING_2_REG),
440 REG(1, true, LCDC_DMA_CTRL_REG),
441 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
442 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
443 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
444 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
445 /* new in revision 2: */
446 REG(2, false, LCDC_RAW_STAT_REG),
447 REG(2, false, LCDC_MASKED_STAT_REG),
448 REG(2, true, LCDC_INT_ENABLE_SET_REG),
449 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
450 REG(2, false, LCDC_END_OF_INT_IND_REG),
451 REG(2, true, LCDC_CLK_ENABLE_REG),
457 #ifdef CONFIG_DEBUG_FS
458 static int tilcdc_regs_show(struct seq_file *m, void *arg)
460 struct drm_info_node *node = (struct drm_info_node *) m->private;
461 struct drm_device *dev = node->minor->dev;
462 struct tilcdc_drm_private *priv = dev->dev_private;
465 pm_runtime_get_sync(dev->dev);
467 seq_printf(m, "revision: %d\n", priv->rev);
469 for (i = 0; i < ARRAY_SIZE(registers); i++)
470 if (priv->rev >= registers[i].rev)
471 seq_printf(m, "%s:\t %08x\n", registers[i].name,
472 tilcdc_read(dev, registers[i].reg));
474 pm_runtime_put_sync(dev->dev);
479 static int tilcdc_mm_show(struct seq_file *m, void *arg)
481 struct drm_info_node *node = (struct drm_info_node *) m->private;
482 struct drm_device *dev = node->minor->dev;
483 struct drm_printer p = drm_seq_file_printer(m);
484 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
488 static struct drm_info_list tilcdc_debugfs_list[] = {
489 { "regs", tilcdc_regs_show, 0 },
490 { "mm", tilcdc_mm_show, 0 },
493 static int tilcdc_debugfs_init(struct drm_minor *minor)
495 struct drm_device *dev = minor->dev;
496 struct tilcdc_module *mod;
499 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
500 ARRAY_SIZE(tilcdc_debugfs_list),
501 minor->debugfs_root, minor);
503 list_for_each_entry(mod, &module_list, list)
504 if (mod->funcs->debugfs_init)
505 mod->funcs->debugfs_init(mod, minor);
508 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
516 DEFINE_DRM_GEM_CMA_FOPS(fops);
518 static struct drm_driver tilcdc_driver = {
519 .driver_features = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
520 DRIVER_PRIME | DRIVER_ATOMIC),
521 .lastclose = drm_fb_helper_lastclose,
522 .irq_handler = tilcdc_irq,
523 .gem_free_object_unlocked = drm_gem_cma_free_object,
524 .gem_print_info = drm_gem_cma_print_info,
525 .gem_vm_ops = &drm_gem_cma_vm_ops,
526 .dumb_create = drm_gem_cma_dumb_create,
528 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
529 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
530 .gem_prime_import = drm_gem_prime_import,
531 .gem_prime_export = drm_gem_prime_export,
532 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
533 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
534 .gem_prime_vmap = drm_gem_cma_prime_vmap,
535 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
536 .gem_prime_mmap = drm_gem_cma_prime_mmap,
537 #ifdef CONFIG_DEBUG_FS
538 .debugfs_init = tilcdc_debugfs_init,
542 .desc = "TI LCD Controller DRM",
552 #ifdef CONFIG_PM_SLEEP
553 static int tilcdc_pm_suspend(struct device *dev)
555 struct drm_device *ddev = dev_get_drvdata(dev);
556 struct tilcdc_drm_private *priv = ddev->dev_private;
558 priv->saved_state = drm_atomic_helper_suspend(ddev);
560 /* Select sleep pin state */
561 pinctrl_pm_select_sleep_state(dev);
566 static int tilcdc_pm_resume(struct device *dev)
568 struct drm_device *ddev = dev_get_drvdata(dev);
569 struct tilcdc_drm_private *priv = ddev->dev_private;
572 /* Select default pin state */
573 pinctrl_pm_select_default_state(dev);
575 if (priv->saved_state)
576 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
582 static const struct dev_pm_ops tilcdc_pm_ops = {
583 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
589 static int tilcdc_bind(struct device *dev)
591 return tilcdc_init(&tilcdc_driver, dev);
594 static void tilcdc_unbind(struct device *dev)
596 struct drm_device *ddev = dev_get_drvdata(dev);
598 /* Check if a subcomponent has already triggered the unloading. */
599 if (!ddev->dev_private)
602 tilcdc_fini(dev_get_drvdata(dev));
605 static const struct component_master_ops tilcdc_comp_ops = {
607 .unbind = tilcdc_unbind,
610 static int tilcdc_pdev_probe(struct platform_device *pdev)
612 struct component_match *match = NULL;
615 /* bail out early if no DT data: */
616 if (!pdev->dev.of_node) {
617 dev_err(&pdev->dev, "device-tree data is missing\n");
621 ret = tilcdc_get_external_components(&pdev->dev, &match);
625 return tilcdc_init(&tilcdc_driver, &pdev->dev);
627 return component_master_add_with_match(&pdev->dev,
632 static int tilcdc_pdev_remove(struct platform_device *pdev)
636 ret = tilcdc_get_external_components(&pdev->dev, NULL);
640 tilcdc_fini(platform_get_drvdata(pdev));
642 component_master_del(&pdev->dev, &tilcdc_comp_ops);
647 static struct of_device_id tilcdc_of_match[] = {
648 { .compatible = "ti,am33xx-tilcdc", },
649 { .compatible = "ti,da850-tilcdc", },
652 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
654 static struct platform_driver tilcdc_platform_driver = {
655 .probe = tilcdc_pdev_probe,
656 .remove = tilcdc_pdev_remove,
659 .pm = &tilcdc_pm_ops,
660 .of_match_table = tilcdc_of_match,
664 static int __init tilcdc_drm_init(void)
667 tilcdc_tfp410_init();
669 return platform_driver_register(&tilcdc_platform_driver);
672 static void __exit tilcdc_drm_fini(void)
675 platform_driver_unregister(&tilcdc_platform_driver);
677 tilcdc_tfp410_fini();
680 module_init(tilcdc_drm_init);
681 module_exit(tilcdc_drm_fini);
683 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
684 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
685 MODULE_LICENSE("GPL");