2 * Copyright (c) 2013 Qualcomm Atheros, Inc.
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6 * modification, are permitted (subject to the limitations in the
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17 * * Neither the name of Qualcomm Atheros nor the names of its
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22 * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
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37 #include <Magpie_api.h>
41 #include "athos_api.h"
46 #include "adf_os_io.h"
49 #include "app_start.h"
51 // @TODO: Should define the memory region later~
52 #define ALLOCRAM_START ( ((unsigned int)&_fw_image_end) + 4)
53 #define ALLOCRAM_SIZE ( SYS_RAM_SZIE - ( ALLOCRAM_START - SYS_D_RAM_REGION_0_BASE) - SYS_D_RAM_STACK_SIZE)
55 // support for more than 64 bytes on command pipe
56 extern void usb_reg_out_patch(void);
57 extern int _HIFusb_get_max_msg_len_patch(hif_handle_t handle, int pipe);
58 extern void _HIFusb_isr_handler_patch(hif_handle_t h);
59 extern BOOLEAN bSet_configuration_patch(void);
60 extern void vUSBFIFO_EP6Cfg_FS_patch(void);
61 extern void usb_status_in_patch(void);
62 extern void _fw_usbfifo_init(USB_FIFO_CONFIG *pConfig);
63 extern void zfTurnOffPower_patch(void);
64 extern void zfResetUSBFIFO_patch(void);
65 extern void _HIFusb_start_patch(hif_handle_t handle);
66 extern void hif_pci_patch_install(struct hif_api *apis);
67 extern BOOLEAN bGet_descriptor_patch(void);
68 extern BOOLEAN bStandardCommand_patch(void);
71 extern void cmnos_clock_init_patch(a_uint32_t refclk);
72 extern a_uint32_t cmnos_refclk_speed_get_patch(void);
73 extern void cmnos_delay_us_patch(int us);
74 extern void cmnos_tick_patch(void);
75 extern a_uint32_t cmnos_milliseconds_patch(void);
77 extern BOOLEAN bJumptoFlash;
78 extern BOOLEAN bEepromExist;
80 void __section(boot) __noreturn __visible app_start(void)
84 #if defined(PROJECT_MAGPIE)
88 /* Zero BSS segment & dynamic memory section. */
91 #if defined(PROJECT_MAGPIE)
92 fatal_exception_func();
95 if( IS_FLASHBOOT() ) {
96 athos_indirection_table_install();
98 A_CLOCK_INIT(SYSTEM_CLK);
104 _indir_tbl.cmnos.timer._timer_init();
106 #if defined(PROJECT_K2)
108 * WAR: these variable is not initialized when boot from flash
109 * either re-enumeration or config them to default value = 0 would fix the issue
111 u8UsbInterfaceAlternateSetting = u8UsbConfigValue = u8UsbInterfaceValue = 0;
116 A_EEP_INIT(); /*Required for 1_1*/
119 #if defined(PROJECT_MAGPIE)
120 retEEP = A_EEP_IS_EXIST();
121 bJumptoFlash = FALSE;
122 if ( RET_SUCCESS == retEEP ) {
125 bEepromExist = FALSE;
129 hostif = A_IS_HOST_PRESENT();
131 #if defined(PROJECT_MAGPIE)
132 rst_status = ioread32(WATCH_DOG_MAGIC_PATTERN_ADDR);
133 #elif defined(PROJECT_K2)
134 rst_status = ioread32(MAGPIE_REG_RST_STATUS_ADDR);
135 #endif /* #if defined(PROJECT_MAGPIE) */
138 A_PRINTF(" A_WDT_INIT()\n\r");
140 #if defined(PROJECT_K2)
141 save_cmnos_printf = fw_cmnos_printf;
144 if( hostif == HIF_USB ) {
145 #if defined(PROJECT_K2)
146 #if MOVE_PRINT_TO_RAM
147 save_cmnos_printf = _indir_tbl.cmnos.printf._printf;
148 _indir_tbl.cmnos.printf._printf = fw_cmnos_printf;
150 _indir_tbl.cmnos.usb._usb_fw_task = _fw_usb_fw_task;
151 _indir_tbl.cmnos.usb._usb_reset_fifo = _fw_usb_reset_fifo;
155 if( rst_status == WDT_MAGIC_PATTERN ) {
156 A_PRINTF(" ==>WDT reset<==\n");
157 #if defined(PROJECT_MAGPIE)
160 *((volatile uint32_t*)WATCH_DOG_RESET_COUNTER_ADDR)+=1;
161 } else if (rst_status == SUS_MAGIC_PATTERN) {
162 A_PRINTF(" ==>warm start<==\n");
164 A_PRINTF(" ==>cold start<==\n");
166 #if defined(PROJECT_MAGPIE)
167 *((volatile uint32_t*)WATCH_DOG_MAGIC_PATTERN_ADDR)=WDT_MAGIC_PATTERN;
168 #elif defined(PROJECT_K2)
169 iowrite32(MAGPIE_REG_RST_STATUS_ADDR, WDT_MAGIC_PATTERN);
170 #endif /* #if defined(PROJECT_MAGPIE) */
172 /* intr enable would left for firmware */
173 /* athos_interrupt_init(); */
175 DBG_MODULE_INSTALL();
176 #if defined(PROJECT_K2)
180 #if defined(PROJECT_K2)
181 #if SYSTEM_MODULE_SFLASH
182 SFLASH_MODULE_INSTALL();
187 HIF_MODULE_INSTALL();
188 HTC_MODULE_INSTALL();
189 WMI_SERVICE_MODULE_INSTALL();
190 BUF_POOL_MODULE_INSTALL();
191 VBUF_MODULE_INSTALL();
192 VDESC_MODULE_INSTALL();
194 //init each module, should be put together..
195 A_PRINTF("ALLOCRAM start 0x%x size %d\n", ALLOCRAM_START, ALLOCRAM_SIZE);
196 A_ALLOCRAM_INIT(ALLOCRAM_START, ALLOCRAM_SIZE);
198 if( hostif == HIF_USB ) {
199 _indir_tbl.hif._get_max_msg_len = _HIFusb_get_max_msg_len_patch;
200 _indir_tbl.cmnos.usb._usb_reg_out = usb_reg_out_patch;
201 _indir_tbl.hif._isr_handler = _HIFusb_isr_handler_patch;
202 _indir_tbl.cmnos.usb._usb_set_configuration = bSet_configuration_patch;
203 _indir_tbl.cmnos.usb._usb_status_in = usb_status_in_patch;
204 _indir_tbl.cmnos.usb._usb_get_descriptor = bGet_descriptor_patch;
205 _indir_tbl.cmnos.usb._usb_standard_cmd = bStandardCommand_patch;
206 _indir_tbl.usbfifo_api._init = _fw_usbfifo_init;
208 #if defined(PROJECT_MAGPIE)
209 _indir_tbl.cmnos.usb._usb_power_off = zfTurnOffPower_patch;
210 _indir_tbl.cmnos.usb._usb_reset_fifo = zfResetUSBFIFO_patch;
211 _indir_tbl.hif._start = _HIFusb_start_patch;
212 _indir_tbl.htc._HTC_MsgRecvHandler = HTCMsgRecvHandler_patch;
213 _indir_tbl.htc._HTC_ControlSvcProcessMsg = HTCControlSvcProcessMsg_patch;
216 if (!(ioread8_usb(ZM_MAIN_CTRL_OFFSET) & BIT6))
217 vUSBFIFO_EP6Cfg_FS_patch();
219 #ifdef FUSION_USB_ENABLE_TX_STREAM
220 // For K2, enable tx stream mode
221 A_PRINTF("Enable Tx Stream mode: 0x%x\r\n",
222 ioread32_usb(ZM_SOC_USB_MODE_CTRL_OFFSET));
224 /* Patch for K2 USB STREAM mode */
225 /* disable down stream DMA mode */
226 io32_rmw_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT6, BIT0);
227 #if SYSTEM_MODULE_HP_EP5
228 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT8);
231 #if SYSTEM_MODULE_HP_EP6
232 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT9);
234 /* enable down stream DMA mode */
235 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT0);
238 #ifdef FUSION_USB_ENABLE_RX_STREAM
239 /* Patch for K2 USB STREAM mode */
240 /* disable upstream DMA mode and enable upstream stream mode */
241 io32_clr_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT1 | BIT3);
243 /* K2, Set maximum IN transfer to 8K */
244 io32_rmw_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, 0x20, 0x30);
246 /* enable upstream DMA mode */
247 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT1);
249 /* set stream mode timeout critirea */
250 iowrite32_usb(ZM_SOC_USB_TIME_CTRL_OFFSET, 0xa0);
251 #if defined(PROJECT_K2)
252 /*0x10004020 is vaild in k2 but could be invaild in other chip*/
253 if ((ioread32(0x10004020) & 0x2000) != 0) {
254 /* disable stream mode for AR9270 */
255 iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 0);
257 /* enable stream mode for AR9271 */
258 iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
261 iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
265 #if defined(PROJECT_MAGPIE) && !defined(ROM_VER_1_1)
266 else if (hostif == HIF_PCI )
267 hif_pci_patch_install(&_indir_tbl.hif);
269 A_PRINTF("USB mode: 0x%x\r\n", ioread32_usb(0x100));
271 // patch the clock function
273 _indir_tbl.cmnos.clock._clock_init = cmnos_clock_init_patch;
274 _indir_tbl.cmnos.clock._refclk_speed_get = cmnos_refclk_speed_get_patch;
275 _indir_tbl.cmnos.clock._delay_us = cmnos_delay_us_patch;
276 _indir_tbl.cmnos.clock._clock_tick = cmnos_tick_patch;
277 _indir_tbl.cmnos.clock._milliseconds = cmnos_milliseconds_patch;
279 //default clock, setup initial variable, SYSTEM_FREQ=40
280 A_CLOCK_INIT(SYSTEM_FREQ);
285 #if MAGPIE_ENABLE_WLAN == 1
286 io32_clr(MAGPIE_REG_RST_RESET_ADDR, BIT10 | BIT8 | BIT7 | BIT6);
287 #if defined(PROJECT_MAGPIE)
288 io32_set(MAGPIE_REG_AHB_ARB_ADDR, BIT1);
291 wlan_pci_module_init();
296 A_PRINTF("Tgt running\n\r");
298 #if defined(PROJECT_MAGPIE)
300 A_PRINTF("======= Apply MISC Assert patch\n\r");
301 _assfail_ori = _indir_tbl.cmnos.misc._assfail;
302 _indir_tbl.cmnos.misc._assfail = exception_reset;
307 wlan_task(); //never return