2 * Copyright (c) 2013 Qualcomm Atheros, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted (subject to the limitations in the
7 * disclaimer below) provided that the following conditions are met:
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the
17 * * Neither the name of Qualcomm Atheros nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
22 * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
23 * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
33 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 #include "athos_api.h"
41 #include "adf_os_io.h"
44 #include <linux/compiler.h>
46 // @TODO: Should define the memory region later~
47 #define ALLOCRAM_START ( ((unsigned int)&_fw_image_end) + 4)
48 #define ALLOCRAM_SIZE ( SYS_RAM_SZIE - ( ALLOCRAM_START - SYS_D_RAM_REGION_0_BASE) - SYS_D_RAM_STACK_SIZE)
50 // support for more than 64 bytes on command pipe
51 extern void usb_reg_out_patch(void);
52 extern int _HIFusb_get_max_msg_len_patch(hif_handle_t handle, int pipe);
53 extern void _HIFusb_isr_handler_patch(hif_handle_t h);
54 extern BOOLEAN bSet_configuration_patch(void);
55 extern void vUSBFIFO_EP6Cfg_FS_patch(void);
56 extern void usb_status_in_patch(void);
57 extern void _fw_usbfifo_init(USB_FIFO_CONFIG *pConfig);
58 extern void zfTurnOffPower_patch(void);
59 extern void zfResetUSBFIFO_patch(void);
60 extern void _HIFusb_start_patch(hif_handle_t handle);
61 extern void hif_pci_patch_install(struct hif_api *apis);
62 extern BOOLEAN bGet_descriptor_patch(void);
63 extern BOOLEAN bStandardCommand_patch(void);
66 extern void cmnos_clock_init_patch(a_uint32_t refclk);
67 extern a_uint32_t cmnos_refclk_speed_get_patch(void);
68 extern void cmnos_delay_us_patch(int us);
69 extern void cmnos_tick_patch(void);
70 extern a_uint32_t cmnos_milliseconds_patch(void);
72 extern BOOLEAN bJumptoFlash;
73 extern BOOLEAN bEepromExist;
75 void __section(boot) __noreturn __visible app_start(void)
79 #if defined(PROJECT_MAGPIE)
83 /* Zero BSS segment & dynamic memory section. */
86 #if defined(PROJECT_MAGPIE)
87 fatal_exception_func();
90 if( IS_FLASHBOOT() ) {
91 athos_indirection_table_install();
93 A_CLOCK_INIT(SYSTEM_CLK);
99 _indir_tbl.cmnos.timer._timer_init();
101 #if defined(PROJECT_K2)
103 * WAR: these variable is not initialized when boot from flash
104 * either re-enumeration or config them to default value = 0 would fix the issue
106 u8UsbInterfaceAlternateSetting = u8UsbConfigValue = u8UsbInterfaceValue = 0;
111 A_EEP_INIT(); /*Required for 1_1*/
114 #if defined(PROJECT_MAGPIE)
115 retEEP = A_EEP_IS_EXIST();
116 bJumptoFlash = FALSE;
117 if ( RET_SUCCESS == retEEP ) {
120 bEepromExist = FALSE;
124 hostif = A_IS_HOST_PRESENT();
126 #if defined(PROJECT_MAGPIE)
127 rst_status = ioread32(WATCH_DOG_MAGIC_PATTERN_ADDR);
128 #elif defined(PROJECT_K2)
129 rst_status = ioread32(MAGPIE_REG_RST_STATUS_ADDR);
130 #endif /* #if defined(PROJECT_MAGPIE) */
133 A_PRINTF(" A_WDT_INIT()\n\r");
135 #if defined(PROJECT_K2)
136 save_cmnos_printf = fw_cmnos_printf;
139 if( hostif == HIF_USB ) {
140 #if defined(PROJECT_K2)
141 #if MOVE_PRINT_TO_RAM
142 save_cmnos_printf = _indir_tbl.cmnos.printf._printf;
143 _indir_tbl.cmnos.printf._printf = fw_cmnos_printf;
145 _indir_tbl.cmnos.usb._usb_fw_task = _fw_usb_fw_task;
146 _indir_tbl.cmnos.usb._usb_reset_fifo = _fw_usb_reset_fifo;
150 if( rst_status == WDT_MAGIC_PATTERN ) {
151 A_PRINTF(" ==>WDT reset<==\n");
152 #if defined(PROJECT_MAGPIE)
155 *((volatile uint32_t*)WATCH_DOG_RESET_COUNTER_ADDR)+=1;
156 } else if (rst_status == SUS_MAGIC_PATTERN) {
157 A_PRINTF(" ==>warm start<==\n");
159 A_PRINTF(" ==>cold start<==\n");
161 #if defined(PROJECT_MAGPIE)
162 *((volatile uint32_t*)WATCH_DOG_MAGIC_PATTERN_ADDR)=WDT_MAGIC_PATTERN;
163 #elif defined(PROJECT_K2)
164 iowrite32(MAGPIE_REG_RST_STATUS_ADDR, WDT_MAGIC_PATTERN);
165 #endif /* #if defined(PROJECT_MAGPIE) */
167 /* intr enable would left for firmware */
168 /* athos_interrupt_init(); */
170 DBG_MODULE_INSTALL();
171 #if defined(PROJECT_K2)
175 #if defined(PROJECT_K2)
176 #if SYSTEM_MODULE_SFLASH
177 SFLASH_MODULE_INSTALL();
182 HIF_MODULE_INSTALL();
183 HTC_MODULE_INSTALL();
184 WMI_SERVICE_MODULE_INSTALL();
185 BUF_POOL_MODULE_INSTALL();
186 VBUF_MODULE_INSTALL();
187 VDESC_MODULE_INSTALL();
189 //init each module, should be put together..
190 A_PRINTF("ALLOCRAM start 0x%x size %d\n", ALLOCRAM_START, ALLOCRAM_SIZE);
191 A_ALLOCRAM_INIT(ALLOCRAM_START, ALLOCRAM_SIZE);
193 if( hostif == HIF_USB ) {
194 _indir_tbl.hif._get_max_msg_len = _HIFusb_get_max_msg_len_patch;
195 _indir_tbl.cmnos.usb._usb_reg_out = usb_reg_out_patch;
196 _indir_tbl.hif._isr_handler = _HIFusb_isr_handler_patch;
197 _indir_tbl.cmnos.usb._usb_set_configuration = bSet_configuration_patch;
198 _indir_tbl.cmnos.usb._usb_status_in = usb_status_in_patch;
199 _indir_tbl.cmnos.usb._usb_get_descriptor = bGet_descriptor_patch;
200 _indir_tbl.cmnos.usb._usb_standard_cmd = bStandardCommand_patch;
201 _indir_tbl.usbfifo_api._init = _fw_usbfifo_init;
203 #if defined(PROJECT_MAGPIE)
204 _indir_tbl.cmnos.usb._usb_power_off = zfTurnOffPower_patch;
205 _indir_tbl.cmnos.usb._usb_reset_fifo = zfResetUSBFIFO_patch;
206 _indir_tbl.hif._start = _HIFusb_start_patch;
207 _indir_tbl.htc._HTC_MsgRecvHandler = HTCMsgRecvHandler_patch;
208 _indir_tbl.htc._HTC_ControlSvcProcessMsg = HTCControlSvcProcessMsg_patch;
211 if (!(ioread8_usb(ZM_MAIN_CTRL_OFFSET) & BIT6))
212 vUSBFIFO_EP6Cfg_FS_patch();
214 #ifdef FUSION_USB_ENABLE_TX_STREAM
215 // For K2, enable tx stream mode
216 A_PRINTF("Enable Tx Stream mode: 0x%x\r\n",
217 ioread32_usb(ZM_SOC_USB_MODE_CTRL_OFFSET));
219 /* Patch for K2 USB STREAM mode */
220 /* disable down stream DMA mode */
221 io32_rmw_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT6, BIT0);
222 #if SYSTEM_MODULE_HP_EP5
223 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT8);
226 #if SYSTEM_MODULE_HP_EP6
227 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT9);
229 /* enable down stream DMA mode */
230 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT0);
233 #ifdef FUSION_USB_ENABLE_RX_STREAM
234 /* Patch for K2 USB STREAM mode */
235 /* disable upstream DMA mode and enable upstream stream mode */
236 io32_clr_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT1 | BIT3);
238 /* K2, Set maximum IN transfer to 8K */
239 io32_rmw_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, 0x20, 0x30);
241 /* enable upstream DMA mode */
242 io32_set_usb(ZM_SOC_USB_MODE_CTRL_OFFSET, BIT1);
244 /* set stream mode timeout critirea */
245 iowrite32_usb(ZM_SOC_USB_TIME_CTRL_OFFSET, 0xa0);
246 #if defined(PROJECT_K2)
247 /*0x10004020 is vaild in k2 but could be invaild in other chip*/
248 if ((ioread32(0x10004020) & 0x2000) != 0) {
249 /* disable stream mode for AR9270 */
250 iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 0);
252 /* enable stream mode for AR9271 */
253 iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
256 iowrite32_usb(ZM_SOC_USB_MAX_AGGREGATE_OFFSET, 9);
260 #if defined(PROJECT_MAGPIE) && !defined(ROM_VER_1_1)
261 else if (hostif == HIF_PCI )
262 hif_pci_patch_install(&_indir_tbl.hif);
264 A_PRINTF("USB mode: 0x%x\r\n", ioread32_usb(0x100));
266 // patch the clock function
268 _indir_tbl.cmnos.clock._clock_init = cmnos_clock_init_patch;
269 _indir_tbl.cmnos.clock._refclk_speed_get = cmnos_refclk_speed_get_patch;
270 _indir_tbl.cmnos.clock._delay_us = cmnos_delay_us_patch;
271 _indir_tbl.cmnos.clock._clock_tick = cmnos_tick_patch;
272 _indir_tbl.cmnos.clock._milliseconds = cmnos_milliseconds_patch;
274 //default clock, setup initial variable, SYSTEM_FREQ=40
275 A_CLOCK_INIT(SYSTEM_FREQ);
280 #if MAGPIE_ENABLE_WLAN == 1
281 io32_clr(MAGPIE_REG_RST_RESET_ADDR, BIT10 | BIT8 | BIT7 | BIT6);
282 #if defined(PROJECT_MAGPIE)
283 io32_set(MAGPIE_REG_AHB_ARB_ADDR, BIT1);
286 wlan_pci_module_init();
291 A_PRINTF("Tgt running\n\r");
293 #if defined(PROJECT_MAGPIE)
295 A_PRINTF("======= Apply MISC Assert patch\n\r");
296 _assfail_ori = _indir_tbl.cmnos.misc._assfail;
297 _indir_tbl.cmnos.misc._assfail = exception_reset;
302 wlan_task(); //never return