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35 #ifndef __AR6K_MISC_H__
36 #define __AR6K_MISC_H__
39 * AR6001: CIS Tuple 0x82, "Board Hardware Configuration Information",
40 * is set at chip reset according to board configuration. Bits in this
41 * register indicate what type of Host connection is in use. We don't
42 * have proper header files to describe tuples, so the offset and layout
43 * for the one tuple that firmwware needs is defined here.
45 * AR6002: The RESET_TUPLE_STATUS register in the GPIO block holds
46 * Board Hardware Configuration Information.
48 * If the interface is SDIO, then the "INFO_MASK" must be "SDIO_NORMAL".
49 * For debug purposes, a Target with the KeepAlive jumper may be booted
50 * before the Host. In this case, INFO_MASK is 0.
52 * For NON-SDIO Host interfaces, the INFO_MASK may hold board information.
54 * By convention, hostless boards set INTERFACE to SDIO, and INFO to
55 * something OTHER than SDIO_NORMAL or 0.
57 * Layout of Board HW Cfg Info is below. These values are captured at
58 * reset and made available to software.
60 * These 3 bits are available on AR6002 via RESET_TUPLE_STATUS_ADDRESS;
61 * they are NOT available on AR6001.
63 * bit 9: cmode[1] Bits 9..8 indicate modes as follows:
64 * bit 8: cmode[0] 0-->normal
66 * 2-->functional test (ATE)
69 * These 8 bits are available on AR6002 through RESET_TUPLE_STATUS_ADDRESS
70 * and on both AR6001 and AR6002 through CIS Tuple 0x82.
71 * bit 7: gpio9 (aka hmode0) Bits 7..6 are the "Interface Config bits"
72 * bit 6: tdo (aka hmode1)
81 #if defined(RESET_TUPLE_STATUS_ADDRESS)
82 #define AR6K_BOARD_HWCFG_CMODE_MASK 0x300
83 #define AR6K_BOARD_HWCFG_CMODE_ATE 0x200
86 * CIS Tuple 0x82 happens to be located at offset 0x13c into CIS registers.
87 * This may change across tapeouts, if CIS tuple information changes.
89 #define AR6K_BOARD_HWCFG_TUPLE_OFFSET 0x13c
92 #define AR6K_BOARD_HWCFG_INTERFACE_MASK 0xc0
93 #define AR6K_BOARD_HWCFG_KEEP_ALIVE_MASK 0x20
94 #define AR6K_BOARD_HWCFG_INFO_MASK 0x1f
96 /* Values for INTERFACE_MASK indicate type of interface */
97 #define AR6K_BOARD_HWCFG_SPI 0x00
98 #define AR6K_BOARD_HWCFG_SDIO 0x40
99 #define AR6K_BOARD_HWCFG_LBCF 0x80
100 #define AR6K_BOARD_HWCFG_MSIO 0xc0
102 #define AR6K_BOARD_HWCFG_SDIO_NORMAL 0x1f
104 #endif /* __AR6K_MISC_H__ */