sysdev/mpic_msgr.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
   4  *
   5  * Some ideas based on un-pushed work done by Vivek Mahajan, Jason Jin, and
   6  * Mingkai Hu from Freescale Semiconductor, Inc.
   7  */
   8
   9 #include <linux/list.h>
  10 #include <linux/of_address.h>
  11 #include <linux/of_irq.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/errno.h>
  14 #include <linux/err.h>
  15 #include <linux/export.h>
  16 #include <linux/slab.h>
  17 #include <asm/hw_irq.h>
  18 #include <asm/ppc-pci.h>
  19 #include <asm/mpic_msgr.h>
  20
  21 #define MPIC_MSGR_REGISTERS_PER_BLOCK   4
  22 #define MPIC_MSGR_STRIDE                0x10
  23 #define MPIC_MSGR_MER_OFFSET            (0x100 / sizeof(u32))
  24 #define MSGR_INUSE                      0
  25 #define MSGR_FREE                       1
  26
  27 static struct mpic_msgr **mpic_msgrs;
  28 static unsigned int mpic_msgr_count;
  29 static DEFINE_RAW_SPINLOCK(msgrs_lock);
  30
  31 static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
  32 {
  33         out_be32(msgr->mer, value);
  34 }
  35
  36 static inline u32 _mpic_msgr_mer_read(struct mpic_msgr *msgr)
  37 {
  38         return in_be32(msgr->mer);
  39 }
  40
  41 static inline void _mpic_msgr_disable(struct mpic_msgr *msgr)
  42 {
  43         u32 mer = _mpic_msgr_mer_read(msgr);
  44
  45         _mpic_msgr_mer_write(msgr, mer & ~(1 << msgr->num));
  46 }
  47
  48 struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
  49 {
  50         unsigned long flags;
  51         struct mpic_msgr *msgr;
  52
  53         /* Assume busy until proven otherwise.  */
  54         msgr = ERR_PTR(-EBUSY);
  55
  56         if (reg_num >= mpic_msgr_count)
  57                 return ERR_PTR(-ENODEV);
  58
  59         raw_spin_lock_irqsave(&msgrs_lock, flags);
  60         msgr = mpic_msgrs[reg_num];
  61         if (msgr->in_use == MSGR_FREE)
  62                 msgr->in_use = MSGR_INUSE;
  63         raw_spin_unlock_irqrestore(&msgrs_lock, flags);
  64
  65         return msgr;
  66 }
  67 EXPORT_SYMBOL_GPL(mpic_msgr_get);
  68
  69 void mpic_msgr_put(struct mpic_msgr *msgr)
  70 {
  71         unsigned long flags;
  72
  73         raw_spin_lock_irqsave(&msgr->lock, flags);
  74         msgr->in_use = MSGR_FREE;
  75         _mpic_msgr_disable(msgr);
  76         raw_spin_unlock_irqrestore(&msgr->lock, flags);
  77 }
  78 EXPORT_SYMBOL_GPL(mpic_msgr_put);
  79
  80 void mpic_msgr_enable(struct mpic_msgr *msgr)
  81 {
  82         unsigned long flags;
  83         u32 mer;
  84
  85         raw_spin_lock_irqsave(&msgr->lock, flags);
  86         mer = _mpic_msgr_mer_read(msgr);
  87         _mpic_msgr_mer_write(msgr, mer | (1 << msgr->num));
  88         raw_spin_unlock_irqrestore(&msgr->lock, flags);
  89 }
  90 EXPORT_SYMBOL_GPL(mpic_msgr_enable);
  91
  92 void mpic_msgr_disable(struct mpic_msgr *msgr)
  93 {
  94         unsigned long flags;
  95
  96         raw_spin_lock_irqsave(&msgr->lock, flags);
  97         _mpic_msgr_disable(msgr);
  98         raw_spin_unlock_irqrestore(&msgr->lock, flags);
  99 }
 100 EXPORT_SYMBOL_GPL(mpic_msgr_disable);
 101
 102 /* The following three functions are used to compute the order and number of
 103  * the message register blocks.  They are clearly very inefficient.  However,
 104  * they are called *only* a few times during device initialization.
 105  */
 106 static unsigned int mpic_msgr_number_of_blocks(void)
 107 {
 108         unsigned int count;
 109         struct device_node *aliases;
 110
 111         count = 0;
 112         aliases = of_find_node_by_name(NULL, "aliases");
 113
 114         if (aliases) {
 115                 char buf[32];
 116
 117                 for (;;) {
 118                         snprintf(buf, sizeof(buf), "mpic-msgr-block%d", count);
 119                         if (!of_property_present(aliases, buf))
 120                                 break;
 121
 122                         count += 1;
 123                 }
 124                 of_node_put(aliases);
 125         }
 126
 127         return count;
 128 }
 129
 130 static unsigned int mpic_msgr_number_of_registers(void)
 131 {
 132         return mpic_msgr_number_of_blocks() * MPIC_MSGR_REGISTERS_PER_BLOCK;
 133 }
 134
 135 static int mpic_msgr_block_number(struct device_node *node)
 136 {
 137         struct device_node *aliases;
 138         unsigned int index, number_of_blocks;
 139         char buf[64];
 140
 141         number_of_blocks = mpic_msgr_number_of_blocks();
 142         aliases = of_find_node_by_name(NULL, "aliases");
 143         if (!aliases)
 144                 return -1;
 145
 146         for (index = 0; index < number_of_blocks; ++index) {
 147                 struct property *prop;
 148                 struct device_node *tn;
 149
 150                 snprintf(buf, sizeof(buf), "mpic-msgr-block%d", index);
 151                 prop = of_find_property(aliases, buf, NULL);
 152                 tn = of_find_node_by_path(prop->value);
 153                 if (node == tn) {
 154                         of_node_put(tn);
 155                         break;
 156                 }
 157                 of_node_put(tn);
 158         }
 159         of_node_put(aliases);
 160
 161         return index == number_of_blocks ? -1 : index;
 162 }
 163
 164 /* The probe function for a single message register block.
 165  */
 166 static int mpic_msgr_probe(struct platform_device *dev)
 167 {
 168         void __iomem *msgr_block_addr;
 169         int block_number;
 170         struct resource rsrc;
 171         unsigned int i;
 172         unsigned int irq_index;
 173         struct device_node *np = dev->dev.of_node;
 174         unsigned int receive_mask;
 175         const unsigned int *prop;
 176
 177         if (!np) {
 178                 dev_err(&dev->dev, "Device OF-Node is NULL");
 179                 return -EFAULT;
 180         }
 181
 182         /* Allocate the message register array upon the first device
 183          * registered.
 184          */
 185         if (!mpic_msgrs) {
 186                 mpic_msgr_count = mpic_msgr_number_of_registers();
 187                 dev_info(&dev->dev, "Found %d message registers\n",
 188                                 mpic_msgr_count);
 189
 190                 mpic_msgrs = kcalloc(mpic_msgr_count, sizeof(*mpic_msgrs),
 191                                                          GFP_KERNEL);
 192                 if (!mpic_msgrs) {
 193                         dev_err(&dev->dev,
 194                                 "No memory for message register blocks\n");
 195                         return -ENOMEM;
 196                 }
 197         }
 198         dev_info(&dev->dev, "Of-device full name %pOF\n", np);
 199
 200         /* IO map the message register block. */
 201         of_address_to_resource(np, 0, &rsrc);
 202         msgr_block_addr = devm_ioremap(&dev->dev, rsrc.start, resource_size(&rsrc));
 203         if (!msgr_block_addr) {
 204                 dev_err(&dev->dev, "Failed to iomap MPIC message registers");
 205                 return -EFAULT;
 206         }
 207
 208         /* Ensure the block has a defined order. */
 209         block_number = mpic_msgr_block_number(np);
 210         if (block_number < 0) {
 211                 dev_err(&dev->dev,
 212                         "Failed to find message register block alias\n");
 213                 return -ENODEV;
 214         }
 215         dev_info(&dev->dev, "Setting up message register block %d\n",
 216                         block_number);
 217
 218         /* Grab the receive mask which specifies what registers can receive
 219          * interrupts.
 220          */
 221         prop = of_get_property(np, "mpic-msgr-receive-mask", NULL);
 222         receive_mask = (prop) ? *prop : 0xF;
 223
 224         /* Build up the appropriate message register data structures. */
 225         for (i = 0, irq_index = 0; i < MPIC_MSGR_REGISTERS_PER_BLOCK; ++i) {
 226                 struct mpic_msgr *msgr;
 227                 unsigned int reg_number;
 228
 229                 msgr = kzalloc(sizeof(struct mpic_msgr), GFP_KERNEL);
 230                 if (!msgr) {
 231                         dev_err(&dev->dev, "No memory for message register\n");
 232                         return -ENOMEM;
 233                 }
 234
 235                 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
 236                 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
 237                 msgr->mer = msgr->base + MPIC_MSGR_MER_OFFSET;
 238                 msgr->in_use = MSGR_FREE;
 239                 msgr->num = i;
 240                 raw_spin_lock_init(&msgr->lock);
 241
 242                 if (receive_mask & (1 << i)) {
 243                         msgr->irq = irq_of_parse_and_map(np, irq_index);
 244                         if (!msgr->irq) {
 245                                 dev_err(&dev->dev,
 246                                                 "Missing interrupt specifier");
 247                                 kfree(msgr);
 248                                 return -EFAULT;
 249                         }
 250                         irq_index += 1;
 251                 } else {
 252                         msgr->irq = 0;
 253                 }
 254
 255                 mpic_msgrs[reg_number] = msgr;
 256                 mpic_msgr_disable(msgr);
 257                 dev_info(&dev->dev, "Register %d initialized: irq %d\n",
 258                                 reg_number, msgr->irq);
 259
 260         }
 261
 262         return 0;
 263 }
 264
 265 static const struct of_device_id mpic_msgr_ids[] = {
 266         {
 267                 .compatible = "fsl,mpic-v3.1-msgr",
 268                 .data = NULL,
 269         },
 270         {}
 271 };
 272
 273 static struct platform_driver mpic_msgr_driver = {
 274         .driver = {
 275                 .name = "mpic-msgr",
 276                 .of_match_table = mpic_msgr_ids,
 277         },
 278         .probe = mpic_msgr_probe,
 279 };
 280
 281 static __init int mpic_msgr_init(void)
 282 {
 283         return platform_driver_register(&mpic_msgr_driver);
 284 }
 285 subsys_initcall(mpic_msgr_init);